MGA-412P8
GaAs Enhancement-mode pHEMT Power Amplier
optimized for IEEE 802.11b/g applications
Data Sheet
Description
Avago Technologies’s MGA-412P8 linear power am-
plier is designed for applications in the (1.7-3) GHz
frequency range. The amplier is optimized for IEEE
802.11b/g WLAN applications and has a best-in-class
eciency (PAE) of 25.5% (54Mbps OFDM) achieved
through the use of Avago Technologies’ proprietary
GaAs Enhancement-mode pHEMT process.
The MGA-412P8 is housed in a miniature 2.0 x 2.0 x
0.75mm3 8-lead leadless-plastic-chip-carrier (LPCC)
package. The compact footprint, low prole and excellent
thermal eciency of the LPCC package makes the MGA-
412P8 an ideal choice as a power amplier for mobile IEEE
802.11b/g WLAN applications.
It achieves +19.0 dBm linear output power that meets 3%
EVM at 54Mbps data rate (OFDM Modulation), and 23dBm
at 11Mbps (CCCK modulation).
Component Image
Features
Advanced GaAs E-pHEMT
Integrated power detector & power down functions
High eciency
Single +3.3V Supply
Small Footprint: 2x2mm2
Low Prole: 0.8mm max.
Specications
At 2.452 GHz; 3.3V (Typ.) :
Gain: 25.5 dB
P1dB: 25.3 dBm
Pout linear with IEEE 802.11g OFDM modulation
@54Mbps data rate: 19.0 dBm @ 3% EVM.
Current @19dBm linear Pout: (54Mbps) : 95mA
Reverse Isolation (typ): > 40dB
Quiescent current (typ): 40mA
Meets IEEE 802.11b @11Mbps (CCCK modulation)
with Pout: 23dBm while consuming 200mA.
Applications
Power Amplier for IEEE 802.11b/g WLAN applica-
tions
Bluetooth Power Amplier
2.4GHz ISM band applications
2.0 x 2.0 x 0.75 mm
8-lead LPCC
Pin 8
Bottom View
Top View
Note:
Package marking provides Orientation and Identification
"1C" = Product Code
"X" = Date code indicates month of manufacture
1CX
Pin 7
Pin 6
Pin 5
Pin 1
Pin 2
Pin 3
Pin 4
1:Gnd
2:RFin
2:Gnd
4:Vdd1
8:Det
7:RFout
6:Vdd2
5:Pwr Down
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 50 V
ESD Human Body Model = 200 V
Refer to Avago Technologies Application
Note A004R: Electrostatic Discharge,
Damage and Control.
2
USL
30 35 40 50 5545
LSL
24 24.2 24.6 25 25.2 25.6 26
LSL
23 24 25 26 27 28
Thermal Resistance [3]
(Vdd = 3.3V), θjc = 33.3 °C/W
Notes:
1. Operation of this device in excess of any of
these limits may cause permanent damage.
2. Board (package belly) temperature, Tb is 25 °C.
Derate 30mW/ °C for Tb>123.36 °C.
3. Thermal resistance measured using 150 °C
Liquid Crystal Measurement Technique.
Absolute Maximum Rating [1] Tc=25°C
Product Consistency Distribution Charts [4,5]
Figure 1. Id@ 2.452GHz; Nominal = 40mA, USL: 55mA Figure 2. P1dB @ 2.452GHz; Nominal = 25.3dBm, LSL: 24dBm
Figure 3. Gain@ 2.452GHz; Nominal = 25.5dB, LSL: 23 dB
Symbol Parameter Units Absolute Max.
Vdd Device Voltage, RF output to ground V 5
Pin CW RF Input Power (Vdd = 3.3V) dBm 10
Pdiss Total Power Dissipation [2] W 0.8
TjJunction Temperature oC 150
TSTG Storage Temperature oC -65 to 150
Notes:
4. Distribution data sample size is 500 samples taken from 3 dierent
wafers and 3 dierent lots. Future wafers allocated to this product
may have nominal values anywhere between the upper and lower
limits.
5. Measurements are made on production test board, which represents
a trade-o between optimal Gain and P1dB. Circuit losses have been
de-embedded from actual measurements.
3
Symbol Parameter Units MIN TYP MAX
Idq Quiescent current mA 40 55
Isd Current drawn by Shutdown pin mA 0.5
I_leak Total current consumption at shutdown(Vsd=0V) uA 5
G Gain dB 23 25.5
Psat Saturated Power dBm 27
P1dB 1 dB Compression Point dBm 24 25.3
Gain Flatness (2.4 - 2.5GHz) dB 1
Poutn Max Pout per IEEE 802.11b mask (CCCK modulation) dBm 23
Idn Current @ 23dBm 802.11b BPSK mA 200
Poutl Linear Power @ 3% EVM, 54Mbps OFDM dBm 19
Idl Current @ 3% EVM mA 95
S11 Input Return Loss dB -5.5
S22 Output Return Loss dB -11.5
S12 Isolation dB >40
OIP3 Large Signal, Output IP3 (2-tone at ± 10MHz from carrier freq) dBm 38
Electrical Specications [6]
Tc = 25 °C, 2.452 GHz [typical, measured on demo board].DC bias for RF parameters Vdd =Vsd=3.3V
Unless otherwise specied, all data are taken with OFDM 64-QAM modulated signal per IEEE802.11g specications
at 54Mbps data rate.
Notes:
6. Measurements taken on demo board as shown on Figure 4. Excess circuit losses have been de-embedded from actual measurements. Standard
deviation and typical data based on at least 500 parts sample size from 2 wafer lots. Future wafers allocated to this product may have
nominal values any where within the upper and lower spec limits.
4
Demo board Diagram
Figure 4. Demo board and Application Circuit Components
Vdd
Rev 1.1
OCT 2005
INPUT
SD
DET
OUTPUT
5.6nH 5.6nH
6.8pF
0ohm
1.2pF
1.5pF
6.8pF
C
2.2uF
5.6nH
1000pF
1000pF
0.1uF
18nH
22ohm
0ohm
0.56mm
0.4mm
5
Schematic Diagram
Figure 5. Demo Board Schematic Diagram
TLIN
TL1
C
C7
C=2.2 uF
C
C6
C=0.1 uF
L
L4
L=18 nH
C
C8
C=1000 pF
C
C4
C=6.8 pF
C
C2
C=1.5 pF
C
C1
C=6.8 pF
L
L6
R=
L=5.6 nH
L
L5
R=
L=5.6 nH
R
R1
R=22 Ohm
L
L3
L=5.6 nH
P ort
P 2
P ort
P 1
C
C5
C=1000 pF
C
C3
C=1.2 pF
Vshutdown = +3.3V ON
Vshutdown =0V OFF Vdd = +3.3V nom
RF Input RF output
1
2
4
3
8
7
5
6
Detector output
*
* 0.56mm wide on 10mil thick Rogers RO4350 board
- Components L6, C2 and C3 should be located as close to the packaged device pins as possible.
- Components R1 and L4 are used to isolate the test board from Power Supply eects.
- Recommended PCB material is Roger, RO4350.
- Suggested component values may vary according to layout and PCB material.
6
Figure 6. Output Power and Gain vs Input Power Figure 7. Detector vs Output Power
Figure 8. EVM & Current vs Output Power Figure 9. EVM vs Modulated Output Power
Figure 10. Total Current vs Modulated Output Power Figure 11. PAE vs Modulated Output Power
MGA-412P8 Typical Performance I
Tc = +25 °C, Vdd = 3.3V Input Signal=CW unless stated otherwise.
MGA-412P8 Typical Performance II
Tc = +25 °C, Vdd = 3.3V Input Signal=OFDM signal with 54Mbps, Modulation=64QAM unless stated otherwise.
Pout and Gain vs Pin
0
5
10
15
20
25
30
-25 -20 -15 -10 -5 0 5
Input Power (dBm)
Pout(dBm) & Gain(dB)
Pout
Gain
Vdet vs Pout
0
0.5
1
1.5
2
2.5
5 7 9 11 13 15 17 19 21 23 25 27
Output Power (dBm)
Detector(V)
VDD=3V
VDD=3.3V
VDD=3.6V
EVM
Current
EVM vs Modulated Pout
0
1
2
3
4
5
6
7
8
9
10
11
12
5 7 9 11 13 15 17 19 21 23 25
Modulated Output Power (dBm)
EVM(%)
VDD=3.0V
VDD=3.3V
VDD=3.6V
Total current vs Modulated Output Power
0
20
40
60
80
100
120
140
160
180
5 7 9 11 13 15 17 19 21 23 25
Modulated Output Power(dBm)
IDD(mA)
VDD=3.0V
VDD=3.3V
VDD=3.6V
PAE vs Modulated Output Power
0
10
20
30
40
50
60
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Modulated Output Power (dBm)
PAE%
7
Figure 12. EVM vs Modulated Output Power at dierent Temperature
Figure 13. Typical Spectral Plot conforming compliance to IEEE 802.11b
11Mbps CCCK modulation mask at 23dBm output power
Figure 14. Typical Scattering Parameter Plots
EVM vs Modulated Output Power
0
1
2
3
4
5
6
7
8
9
10
11
12
5 7 9 11 13 15 17 19 21 23 25
Modulated Output Power (dBm)
EVM(%)
25 Deg C
-40 Deg C
85 Deg C
2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.582.40 2.60
22.5
23.0
23.5
24.0
24.5
25.0
25.5
26.0
26.5
22.0
27.0
freq, GHz
dB(S(2,1))
2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.582.40 2.60
-10
-8
-6
-12
-4
freq, GHz
dB(S(1,1))
dB(S(2,2))
2 x 2LPCC (JEDEC DFP-N) Package Dimensions
D
E
8
7
6
5
A
D1
E1
P
e
pin1
R
Lb
DIMENSIONS ARE IN MILLIMETERS
DIMENSIONS
MIN.
0.70
0
0.225
1.9
0.65
1.9
1.45
NOM.
0.75
0.02
0.203 REF
0.25
2.0
0.80
2.0
1.6
0.50 BSC
MAX.
0.80
0.05
0.275
2.1
0.95
2.1
1.75
SYMBOL
A
A1
A2
b
D
D1
E
E1
e
1
pin1
2
3
4
1CX
Top View
End View
End View
Bottom View
A2
AA1 0.2 0.25
0.4 REF
0.3
P
L
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2008 Avago Technologies. All rights reserved. Obsoletes AV01-0236EN
AV02-0848EN - August 26, 2008
Part Number Ordering Information
Part Number No. of Devices Container
MGA-412P8-TR1G 3000 7” Reel
MGA-412P8-TR2G 10000 13” Reel
MGA-412P8-BLKG 100 antistatic bag
PCB Land Pattern and Stencil Design
Device Orientation
2.80 (110.24)
0.70 (27.56)
0.25 (9.84)
0.25 (9.84)
0.50 (19.68)
0.28 (10.83)
0.60 (23.62)
0.20 (7.87)
PIN 1
Solder
mask
RF
transmission
line 0.80 (31.50)
0.15 (5.91)
0.55 (21.65)
1.60 (62.99)
+
2.72 (107.09)
0.63 (24.80)
0.22 (8.86)
0.32 (12.79)
0.50 (19.68)
0.25 (9.74)
0.63 (24.80)
Stencil Layout (top view)
PCB Land Pattern (top view)
0.72 (28.35)
PIN 1
1.54 (60.61)
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
8 mm
4 mm
1CX1CX1CX1CX