Switching DC-DC Converter General Description The MAX650 is a low-power fixed +5V output switching DC-DC converter designed for operation from very high negative input voltages. All control functions and a 120V, 250mA PNP transistor are contained in this device, re- ducing external components. A soft-start eliminates overshcot on turn on, and a Shutdown pin (SHDN) allows the outgut to be turned on and off. In addition, peak current limiting is provided on the PNP output. The MAX650 features user-controllable operating fre- quency and a separate low voltage detector with adjust- FVII AALS I -48V to +5V Output Features @ +5V at 250mA From a -48V Source @ Selectable Soft-Start Function @ Shutdown Pin tor Output On-Off Control @ Internal 120V, 250mA Switching PNP Transistor @ Low Component Count @ Low Battery Voltage Detector OSOXVN able hysteresis for monitoring the supply voltage. It can Ordering information ve oe to trip at any negative voltage with a simple voltage PART TEMP. RANGE PIN-PACKAGE Th MAX650 . ilable i A . ith 45% : tout MAX650ACPD 0C to +70C 14 Plastic DIP e@ is available in an A version wi % OUtPU voltage tolerance and a B version with +10% tolerance. MAX650ACWE O'C to +70C 16 Wide SO MAX650AC/D 0C to +70C Dice MAX650BCPD 0C to +70C 14 Plastic DIP Applications MAX650BCWE OC to +70C 16 Wide SO Telephone (-48V) Powered Devices MAX650BC/D OC to +70C Dice Negative Input to +5V Converter MAX650AEPD -40C to +85C 14 Plastic DIP MAX650AEWE -40C to +85C 16 Wide SO MAX650BEPD -40C to +85C 14 Plastic DIP Pin Configurations MAX650BEWE -40C to +85C 16 Wide SO MAX650AMJD -58C to +125C 14 Ceramic DIP Top View - MAX650BMJD 55C to +125C 14. Ceramic DIP s FB 14] SHON GND AAA fi3] OSC c 2 MAX650 a 6 Typical Operating Circuit NC. 14] L80 E [5 Ho] HYST E [6] [9] 1B BD [8 | NEG DIP E FB ALIREZA re[1 | 6] SHDN no MAX650 C be SV AT GND [2] aasmasan f15) 0SC | _| 250mA c (al MAX650 ia] SS = NEG OSC BD Neo. [4] ha] 180 = E [5] h2] HST e [6 14] LB! av Bo [7] HO] NEG ne. [3] ig] NC. so MAAXLSA Maxim integrated Products 1 For free samples & the latest literature: http:/;www.maxim-ic.com, or phone 1-800-998-8800. For smail orders, phone 1-800-835-8769.MAX650 -48V to +5V Output Switching DC-DC Converter ABSOLUTE MAXIMUM RATINGS {Unless otherwise noted, all vollages are referenced to the GND terminal.) Collector (C) Current,IC 00000. eee. -300mA HYST Source Current. IHYST 60 oe ee +10mA Collector (C) Voltage, VO ee -120V Power Dissipation Emitter (E) Voltage, VE 6... eee. -1V to +0.3V Plastic DIP (derate 6. 5mW/"C above 25C) ........ 470mWw Base BD Current. IBD ow... ee -5omA Small Outline (derate 1OmMW/C above 75C) ...... 750mW FB Voltage, VFB... cee +7V CERDIP (derate 11mW/"C above 75C). .0 0... 825mW LBI, SS and SHDN Currents... 0... eee +10mA Operating Temperature LBO Voltage, VLBO..........., (VNEG -0.3) to (VNEG +15) V MAXG50C_ owe ee O'C to +70C Voltage at OSC, BD, HYST, MAX650E_ we eee -40C to +85C LBI,SS, andSHDN ..............00... (VNEG -0.3) to OV MAX650M_......0.....00 000000000000, -55'C to +125C NEG Current. INEG 0. ees -25mA Storage Temperature ..0.0.0000..0.00... -65C to + 160C OSC Current, OSG 2. eee +10mA Lead Temperature (Soldering, 10sec.) .........,.. +300C LBO Sink Current, ILBO . 66. ee -10mA Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage io the device. These are stress ratings only. and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS (GND = OV, Ta = +25C, unless otherwise noted. MIN and MAX values are based on magnitude without regard to sign.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TA = Full Output (load) Voltage VFB MAX650A +4.75 +5 +5.25 V MAX650B +45 +5 +5.5 Feedback Input Current IFB VFB = +5V 40 100 LA | Internal Zener Voltage VNEG TA = Full, INEG = -500uA 6 -7 8 V internal Zener Current INEG Ta = Full -0.3 -0.5 -10 mA Current Sense Voltage VE -140 -175 -210 mv Peak Collector Current Ic -250 mA Collector Leakage Current Ic Ta = Full, Ve = -120V o1 10 mA Collector (C) Saturation Voltage VSAT eer 250MA, -4 Vv Ta = Full, Vc <-4V PNP Current Gain HFe Ic = -100MA 12 80 Ic = -250mA 7 13 losc = -12uA | Switching Frequency Fo TA = +25C 17 20 23 kHz Ta = Full 15 25 Oscillator Input Voltage Vosc josc = -t2yuA -2 Vv Oscillator Inout Current losc -4 -12 -100 pA Switching Duty Cycle %ON | Se = goon Creu oO 3 % Low Battery Input Threshold VLBI Ta = Full VNEG+O.13 VNEG+0.08 VNEG+0.03 Vv Low Battery Input Current ILBI Ta = Full 0.1 +100 nA Soft-Start Input Threshold Vss -3 -4.5 5 Vv Soft-Start Input Current Iss -10 uA Shutdown Input Threshold VSHDN -3 -45 5 Vv Shutdown Input Current ISHDN OV > VSHDN > -3V -10 A 2 MAAXIS/VISwitching DC-DC Converter -48V to +5V Output Pin Description PIN # PIN # 14-PIN | 16-PIN DIP | Wide SO 1 1 FB NAME FUNCTION Feedback Input. The 5V output is connected to FB, which regu- lates the output voltage. This input sinks approximately 40uA to VNEG. Ground. This is the positive side of the -48V input supply and the negative side of the +5V output. All specified volt- ages are referenced to this pin. Output (collector) of the PNP transistor switch. Connect to the transformer primary. This pin can withstand up to -140V on the flyback cycle and sources up to 250mA from E, depending cn the base drive current at BD. GND 4 4,89 N.C. | No Connection. These pins are open circuit. 5,6 5,6 E Current sense input (emitter} of PNP transistor. Connect to GND, either directly or through a low-value sense resistor. When the voltage on these pins ig more negative than -175mV, tne PNP transistor is turned off for an entire cycle. Base Drive Input of PNP transis- tor. Figure 1. NEG | Negative Power Connection. Anode of 7V Zener diode whose cathode is connected to GND. An external series limiting resis- tor is required between this pin and the -48V input supply. This resistor must also sink the LBO | | | current (up to 100A). | Operating Principle The MAX650 is a flyback switching converter, energy from the input supply is first transferred to the transformer core through the primary winding, then discharged from the secondary winding into the load. A typical circuit consists of a battery in series with the primary coil of a transformer, a switch, a rectifier, and a filter. (Figure 3}. During the first portion of the cycle, the switch is closed, and current builds up in the primary storing energy in the form of a magnetic field in the transtormer's core. During the second portion, or flyback part of the cycle, the switch opens, the magnetic field collapses, and the energy stored in the core is discharged through the secondary winding into the rectifier and the load. The switch is controlled by an oscillator whose output is gated SVIAAISVI 1 | NAME FUNCTION | PIN # | 14-PIN | 16-PIN DIP. | Wide SO Q* 11" LBI* PIN # OS9OXVIN CMOS input Low Battery Monitor Hysteresis Output. This P-channel FET sources up to 80nA to GND when the LBI input is 8OmMV more positive than VNEG; other- wise HYST is an open circuit. 10* 12 HYST* LBO | Low Battery Monitor Output. Sinks up to 100NA to NEG when LBlis 80mV more positive than VNEG. Soft-Start Input. Normally left open circuit for 50% duly cycle. Connect to GND through a ca- pacitor to change the oscillator duty cycle to 25% and reduce input current on startup. 12 14 ss* OSC Input (Figure 2). The voltage on this pin is approximately evo | Oscillator Frequency Conirol | SHDN | Shutdown Input. Leave open cir- cuit or connect to NEG for nor- mal operation. Connect to GND | through a 100kQ resistor to stop | oscillator and turn-off output. | * Voltage limitations on HYST, LBI, and SS terminals. HYST, LBI, and SS should not be connected to GND. This is because protection diodes associated with these terminals will be forward biased, interfering with correct operation. If low-voltage detection is not required, [BI must be connected to NEG, and the HYST terminal left open circuit. SS may be connected to GND through a O.1pFd, or smaller capacitor, to initiate soft-start on power up. If soft-startis not required, SS should also be connected to NEG. on and off by a comparator that monitors the output voltage. When the output voltage is below the comparator threshold (+5V) the switch turns on for the first half of the oscillator cycle. When the output voltage is above the comparator threshold, the switch skips an entire oscillator cycle. This pulse-skipping technique regulates by vary- ing the average number of cycles over time rather than varying the duty cycle of the switch on each cycle. Figure 4 shows the block diagram of the MAX650. PNP transistor, Q1, controls the input current to the trans- former. The emitter of this transistor can be connected to GND directly or through a low-value current sense resistor. The collector of the transistor connects to the primary of the transformer. Transistor base drive is set by an external resistor connected to BD. The oscillator frequency is set by another external resistor at OSC.MAX650 -48V to +5V Output Switching DC-DC Converter ACMOS voltage comparator, for low battery or low input voltage detection, is included in the MAX650. Its input threshold voltage, LBI, is biased 8OmV above the nega- tive supply pin, NEG. The output, LBO, is an N-channel FET which sinks up to 100uA to NEG, and its drain can be connected to positive potentials above GND (up to 15V above VNEG). Circuit Details A typical application circuit is shown in Figure 4. The basic operation is set by 4 external resistors, RNEG, Rosc, Reo, and RSENSE. Output current capability is determined by the transformer, as described later. TYPICAL sve 0 L I tt 0 50 100 = 150 200, 250300 Ic (mA) Figure 1. Hre vs. Collector Current a HFE m 3 || | le. | ao 7 ~ Frequency (kHz) Ss 8 ne \ nm o (Note that ViNMIN, VNEG and all currents are negative, but the calculations are simplified by using positive val- ues.) If the low battery function is used, the LBO output sinks or furnishes load current, ILBO, through the NEG pin, and this current must be added to the INEG current calculation as in Eq. 2. Resistor, RNEG, should be calculated using the lowest supply voltage, VINMIN, to insure an adequate INEG current. Calculations for a typical application look like this: ViNMIN = -36V; ViNMAX = -50V LBO output current = -100uUA The supply resistance is calculated for the lowest supply voltage and the highest current. [2] INEG = 500pA + ILBO = 500nA + 100A = 600nA [1] REG = (VINMIN - VNEG)/ INEG = (36V-7V)/600HA = 48,3339 (use 47kQ) With the highest input voltage, the maximum Current is: [3] INEG = (VINMAX - VNEG) / RNEG = ( 50V - 7V)/ 47,000Q = 915pA Oscillator Frequency, Rosc The MAX650 varies its oscillator frequency in order to keep the energy delivered to the primary of the trans- former constant with varying input voltages. The oscilla- tor frequency is a nearly linear function of the current into the OSC pin. The frequency is set by resistor, ROSc, connected between OSC and the negative supply volt- 0 10 20 30 40 50 Current (uA) | GND i Figure 2. Oscillator Frequency vs. Oscillator Current oe, BY Supply Current, Ruec : el . red : / : ) MAAXIAA | Q . aa Although the MAX650 is meant to operate with high MAX650 ak negative supply voltages (VINMIN to VINMAX), it uses al approximately -7V internally. This is set by an internal 7V | FB = | zener diode connected between GND and NEG. The current through this diode must be more than 300pA and less than 10mA. Itis set by the size of the external voltage e 1 dropping resistor, RNEG, and the supply voitage, VINMIN. NEG Ose 80 | [1] RNEG = (VINMIN - VveG) / INEG z : | where, -48V INPUT [2] INEG = 5OQUA + ILBo Figure 3. Typical Circuit 4 MAAIM-48V to +5V Output Switching DC-DC Converter RSENSE 110.(2.79) et GNO E SCHOTT 67122480 t. _ (SCHOTT 67122490) 475m P \ D1 ec a1 5 Iie 085 1 uf cf we N87 OUTPUT , * Fy AT 250mA Ome | N 4 f (100mA} 1 MAAXIAA __payst MAX650 Ooo me 1000.F RH [| 3.3M WV | | ae + 2 L_4ss | {ose | 40uA FB _ LBO | | | J LB em , 7 ae NEG | osc BD 953k 4 Rnec Rose 243k W. eB VALUES SHOWN ARE FOR +5V V 56k 36M > (29k, 1/2) Lote AT 250mA QUTPUT 4M to SAV = VALUES IN PARENTHESES ARE o FOR +5V AT 100mA OUTPUT Figure 4. Typical Application Circuit age. Therefore, the oscillator frequency Is nearly linearly proportional to the supply voltage, and the switch "on" period is inversely proportional to the supply voltage. The power stored in the primary is nearly constant with changes in supply voltage since the peak current through the switch and the primary of the transformer are propor- tional to the product of the "on" period of the switch and the input voltage. Normally, the osciliator frequency is 20kHz when IOsc is -12uA, as shown in Figure 2. The value of ROSC is: [4] Rose = ViNMIN /losc Soft-Start The duty cycle of the output transistor is controlied by the SS pin which has a 1pA pulldown current to the NEG pin. When the SS pin is left open or connected to NEG, soft-start is disabled and the duty cycle of the switch is approximately 50%. When it is temporarily grounded through a 0. 1pFd, or smaller capacitor, the switch is on for 25% of the time and off for 75%, until the capacitor is charged to VNEG. The MAX650 starts up slowly each time that power is applied and then switches over to normal operation. The soft-start circuit is shown in Figure 5. Note tnat the SS pin cannot be connected directly to GND. MIAXAILS/VI Current Sense, Rsense The Emitter, E, of the PNP transistor can be connected directly to GND. But, in order to protect the output tran- sistor against destructive short-circuit currents, it should be connected to GND via a low-value current sense resistor, RSENSE. An internal comparator compares the voltage generated across the sense resistor at E to an internal -175mV reference and turns off the transistor GND L | 7 _ | GND P OSC a d | ae [NEG Css - oie | MAAXIAA MAX650 RNEG ABV Figure 5. Soft-Start Circuit OSOXUWMAX650 -48V to +5V Output Switching DC-DC Converter when the peak current being switched exceeds this value. The value of RSENSE is given by the formula: (5) Rsense = 175mV/ IpEAK (mA) Since the maximum current that the transistor can switch is 250m<A, resistors less than 0.70Q will afford no protec- tion. For higher values, RSENSE will limit the switch cur- rent to a safe level. Transformer Transformer selection is governed by a number of fac- tors. To simplity the process, Table 1 lists two transform- ers which have been tested with the MAX650. The Transformer, T1, must store all of the energy that flows into the load. Accordingly, it should have a pow- dered iron or ferrite core, and it should have low resis- tance (10@ on the primary and 0.2Q on the secondary) to minimize losses. Smail toroids or pot cores are pre- ferred. The transformer design is based on four values: turns ratio, frequency and duty cycle, primary inductance, and peak current. The turns ratio is calculated by dividing the maximum supply voltage by the sum of the minimum output voltage (VFB) and the diode loss (VF) and multi- plying the result by 0.75 for a safety factor. 0.75 x ViInMAX {6] Turns Ratio = (VppMIN + dic diode Ve) The design works backwards from the load as follows: the diode and transformer secondary resistance losses can be lumped together as "1V" so that the maximum secondary output voltage is 6.5V. Knowing the required output current, IOUT, the Output Power, POUT, becomes: [7] Poyt = 6.5V x IOUT (Watts) Assuming 95% efficiency in the transformer (transformer only, not the whole circuit), the input power to the primary, PIN is: Pin = 6.5V x IOUT / 0.95 (Watts) {8] Pin = 6.84V x IOUT (Watts) With an oscillator frequency of 20kHz, the energy put into the coil, Ein, during each "on" cycle is: 19] Ein = Pin/ Fosc (Joules) or: [9A] Ein = 6.84V x IOUT / 20,000Hz (Joules) When the switch closes, the energy builds up in the primary inductance, L, to a maximum value. This energy can also be expressed as: [10] Eiy = (ViINMIN x ton) / 2 L (Joules) so that the primary inductance, L, Is: {11] L = (ViNMIN x ton)? / 2 Ein (Henries) Combining [9A] with [14], the primary inductance is: _ (VINMIN x ton) [12] L= IOUT At the end of the switch "on" period (tON = 25us for a 20kHz 50% duty-cycle switch), the current rises to a peak value, IPEAK. [13] IPEAK = VINMIN x ton /L (Amperes) (Henries) IPEAK must be less than 250mA to avoid exceeding the MAX650s collector current rating. When selecting the transformer, the transformer must have a peak primary current rating greater than IPEAK to prevent core saturation. In summary, set the oscillator frequency to 20kHz. The results of Equations 6, 12, and 13 determine the electrical characteristics of the transformer. Snubbers When the power switch opens, the primary voltage will flyback to a high negative value which depends on the leakage inductance and capacitance of the transformer. This voltage could exceed the 140V peak voltage rating of the MAX650 collector and damage it if not limited by a series R-C network, or "snubber. The snubber network is usually placed in parallel with the transformer primary, and the R-C values depend on the transformer charac- teristics and must be determined experimentally. 1000Q in series with 100pF is a good starting place. The snub- ber does dissipate some power, reducing the overall efficiency, but this can be minimized or eliminated by using a transformer with low leakage inductance. Larger R and smaller C values improve efficiency, but may not adequately suppress the negative spike al C. Smaller R and larger C values reduce the size of the spike, but then reduce efficiency. The optimum snubber balances these two goals. Under ideal conditions, the snubber may be omitted. If either of the two transformers shown in Table 1 is used, the snubber is not needed. Base Drive, Rep The output transistor, Q1, is turned on by a combination of the oscillator "on" pulse: ihe output voltage comparator output high, the sense comparator high, and the base drive current. The outout transistor is turned off by a P-channel! FET that shorts its base to GND. In order to conserve power, the base drive current to the switching PNP transistor is set by adjusting current through the base drive pin, BD. IBD is set to a value thal insures that Q1 nearly saturates when it is turned on, MIAAIL/VISwitching DC-DC Converter based on the minimum beta for the output current. For example: [14] IBD = IPEAK / HEE The HFe vs. collector current is shown in Figure 1. The base drive circuit includes a shunt zener that clamps the base drive voltage to VNEG during the off period. Thus, for half of the cycle the current through BD is wasied. This loss can be recovered, however, ifa 0. 1pFd capacitor is placed between BD and GND. This capac- itor effectively captures the lost current and makes it available for the whole cycle. More importantly, it effec- tively halves the required base drive current so that the base resistor is: [15] Rep = 2.x (ViNMIN 7V)/Ipp Note that with high current designs, RBD may need to dissipate up to 6OOmW. Capacitors The output capacitor should be at least 10uF, increasing approximately 1nF/mA of outout current. Low ESR ca- pacitors, such as tantalums, are preferred. But, if alumi- num electrolytics are used, each should be paralleled with a 0. 1pF disk ceramic. Because of possible switch- ing transients, 0.1F should also be connected between NEG and GND. Diodes Schottky diodes are preferred for the secondary rectifier. Their low forward voltage drop and fast switching times make them the best choice for efficiency. The 1N5817 is a good example. Low Battery Monitor A low battery monitor with adjustable hysteresis is built into the MAX650. When LBI is connected to NEG (ap- proximately -7V), LBO sinks up to -100uA to NEG, and the HYST pin, a P-channel FET drain, sources up to 100A to GND. When LBI is connected to a voltage more positive than -7V, LBO and HYST outputs are open circuits. Normally LBI is connected to the negative sup- ply via a voltage divider to GND, and a hysteresis resistor, RH, is connected between HYST and LBI. The resistors are shown in Figure 6 and are caiculated by the following formulas: [16] Rp = 20 x (ViNMAX -7V) (kQ) 7VxRp [17] RA = ay Where VTL is the low threshold voltage input, and VINMAX is the maximum power-supply voltage. Both are positive in these caiculations. SVIAAIS/VI -48V to +5V Output When hysteresis is used, the value of RH, which would otherwise be open circuit, is determined by: Ra xRpx7V [18] RH = Ra x (VTH -7V) (7V x Rp) (KQ2) or: Vv R R [18A} 0 Ry = Ey BAX = xX (VTH- VTL) Ra+Re | Where V7 is the lower threshold voltage, and VTH is the higher threshold voltage (again using positive values). The hysteresis is the difference between VTH and VT_. Since the voltage at NEG has a range of -6V to -8V (over temperature) LBI and, thus, the higher and lower thresh- old voltages, cannot be set to better than +16%. Voltage Limitations at HYST, LBI, and SS These three terminals may not be connected directly to GND. Connection to GND forward biases diodes asso- ciated with these terminals and interferes with the correct operation of the device. If the low voltage monitor is not CMOS DRIVER LED DRIVER +5V Hos) 45 sek 1a0_ 28403 os + IN914 . 120k eo Ped 36002 = 68k et a a OR LED a 1 100A GND| LB0| AALAXLAA MAX650 Ri wart F I a fet = Ra Re = 20(VINMAX -7V)kG2 RB AL) Rax Rex 7V N Ba ATH Vy ~ TW x Rp vit - LOWER THRESHOLD VOLTAGE ViH = HIGHER THRESHOLD i , VOLTAGE BOm\ ~ Re Lee + NEG VIM VIN _ Wy +5V =v = he 0 - -48V ViB0 -7V _ VIL 0 VIN HYSTERESIS RESPONSE Figure 6. Low Battery Detector Circuit OS9OXUWNMAX650 -48V to +5V Output Switching DC-DC Converter required, LBI should be connected to NEG and HYST left open circuit. SS may be connected to GND through a capacitor to initiate soft start on power-up. If the soft-start function is not required, SS must be connected to NEG. Shutdown The SHDN trip voltage is typically -4.5V. If the function is not required, SHDN may be left open circuit or connected to NEG. The terminal has a 1pA pulldown current to NEG. To activate SHDN, this terminal may be raised positively above -4.5V and connected to GND or to a positive voltage of up to +15V with respect to NEG. A Design Example Figure 4 shows a complete circuit with all values. Table 1 lists the transformers that may be used to produce +5V at 250mA or 100mA. These values are derived from the following procedure, which may be adjusted for any input voltage range and output current: ViNMIN = -42V VINMAX = -54V Output = +5V at 250mA VIL = -42V (the low threshold) VTH = -44V (the high threshold) ILBO = 100nA First, set the oscillator to 20kHz with the lowest input voltage. From Figure 2, losc = 12uA and ROSc is: [4] Rosc = VINMIN /losc = 42V / 12uA = 3.5MQ, use 3.6MQ Next, from Formula [1], calculate RNEG. [1] RNEG = (VINMIN - VNEG) / INEG = (42V - 7V)/ (S00pA + 100uA) = 8.33kQ, use 56kQ The transformer: calculate the primary inductance using the minimum supply voltage. ViINMIN x tony 2 x 1462 [12] L= (VIN ON) {OUT or, _ 42 x 42 x 25 x 25 x 107! x 1462 7 0.25 L = 6447pH = 6.5mH The turns ratio should be calculated using the maximum supply voltage and the minimum output voltage, incluc- ing the diode loss. L 0.75 x VinMAX (VeBMIN + diode VF) =0.75x%54/(45+4+ 4)=405/49 Turns Ratio = 8.27 , use 8 [6] Turns Ratio = Calculate the peak current in the primary and the transis- tor using the minimum input voltage again. [13] IPeak = VINMIN x ton /L = 42 x 25 x 10 / (6500 x 10) = 162mA From Figure 1, when Ic = 162mA and HFE = 10, and from Formula 14: [14] IBD = IPEAK / HFE = 162/10 = 0.0162A Calculate the Base Drive Resistor, RBD, from Formula 15 using VINMIN = 42V. 15] Rep = 2 (ViNMIN - 7V)/IBp = 2x (42V-7V)/0.0162A = 43210, use 4.3kQ Note that with the maximum supply voltage, the power dissipated by RBp is: Pap = VB07 Reo = (54-7) | 4300 = 0.52W Next, calculate value of RSENSE. [5] RSENSE = 175(mV) / IPEAK(mA) 175V /.162A = 1.080, use 1.12 Last, calculate the LBI resistors. [16] Re = 20 x (VINMAX -7V) (kQ) ~ 20 x (54-7) = 940k, use 953kQ _ 7V x Rp VqTpL-7V = 7 x 953k / (42 - 7) = 191kQ ___RaxRex? ~ Ra x (VTH-7V) (7V x Ra) _ 191k x 953k x7 ~ 191k x (44 7) (7 x 953k) = 3218k, use 3.3M [17] Ra [18] RH MA XI/VI-48V to +5V Output Switching DC-DC Converter Table 1. Transformer and Resistor Selection Guide SUPPLY V Rep 1OUT PRIMARY L TURNS RATIO (NEGATIVE) (ko) (mAATS5V) MANUFACTURER = MODEL # (PRI:SEC) | 42 to 54 43 250 Schott Corp. 67122480 6.45mH 8:1 ) 42 to 54 22" 100 Schott Corp. 67122490 16.0mH 81 * Use 0. 1pF from BD to GND, Rnec = 56k, Rasc = 3.6M, Schott Corporation: (615) 889-8800. Chip Topography SS | BO 0.081 (2.057mm) | _ HYST 0.094 {2.388mm) I MAAXIM OSOXVINMAX650 -48V to +5V Output Switching DC-DC Converter Package Information PCIPN EPS, E D | h= El CI ag | : will 0-15 ff Bl LL eA eB~ INCHES MILLIMETERS INCHES MILLIMETERS MIN MAX | MIN MAX MIN MAX | MIN MAX | N_|MSO01 A |--- [0.200 | --- [5.08 0.348 |0.390 | 8.84] 9.91 |8 [AB A1/0.015 |--- [0.38 = 0.735 |0.765 {18.67 |19.43 |14 |AC A2|0.125 [0175 1318 14.45 A3/0.055 |0.080 {1.40 [2.03 B\0.016 0022|041 056 B1 10.045 10.065 {114 [1.65 C {0.008 |0.012 |O20 (0.30 D1 |0.005 |0.080 |013 [203 0.745 [0.765 |18.92 |19.43 |16 |AA 0.885|0.915 |22.48/23.24|18 |AD 1015 [1.045 |25.78|26.54| 20 |AE 114 [1.265 |28.96|32.13 |24/AF 1.360 [1.380 |34.54]35.05 |28)*S DOW Solo |o F 10.300 10.3e517.62 [8.26 NOTES: E1[0.240 [0.310 [6.10 |7.87 SNEED PLASH ER PRETRUSIENS NET e 0.100 -- 2.54 -- TO EXCEED 5mm 0067> eAl0.300 |--- 17.62 [| -- a MEETS GEDEG MSOQIXx AS SHIWN. eB) --- |0.400 | --- |10.16 IN ABOVE TABLE L [0115 [0150 |2.92 13.81 or SIMILIAR a JEDEC MO" 05848 SVIAI AVA \PacKace FAMILY OUTLINE: PDIP 300" (4) 21-0043 A 10 MAK-48V to +5V Output Switching DC-DC Converter Package Information (continued) g 3 8 HHHA RHEE | N HHEER BEE . | __] (on? y eal ke pl ft b h-4 INCHES MILLIMETERS INCHES ILLIMETERS MIN MAX | MIN | MAX MI MAX I MAX 0.093] 0.104 | 2.35] 265 0.004 | 0.012 | 0.10 | 0.30 0.014 | 0.019 | 0.35/0.49 0.009 | 0.013 | 0.23 | 0.32 0.050 127 0.291 | 0.299] 7.40 | 7.60 0.394] 0.419 | 10.00] 10.63 vay: DO NOT INCLUDE MOLD FLASH 0.010 |}0.030)0.2e5/0.75 2. MOLD FLASH OR PROTRUSIONS NOT 0.016 [0.050 | 0.40 [1.27 3, LEADS 10 BE COPLANAR WITHIN 102mm .0047) 4 CONTROLLING DIMENSION: MILLIMETER 6 |S /IIm]9 jolw|e|> . MEETS JEDEC MS013-Xx AS SHOWN IN ABOVE TABLE . N = NUMBER OF PINS AVIA AVA lPacKaGe FAMILY DUTLINE: SOIC an (i) 21-0042 A MAXLM "1 OS9OXVNMAX650 -48V to +5V Outp ut Switching DC-DC Converter Package Information (continued) THPSEPS 014 | 0. B1| 0.038] 0.06 MAX | MI MAX 510.97 11.65 El poe cl. INCHES MILLIMETERS MIN | MAX | MIN | MAX | _N_|CASE D| --- |0.405| --- |10.e9 | 8 |PD4 D| --- |0.785| -- |19.94 /14 |C:D1 D}| -~-- |0.840| -- [21.34 |16 |ED2 D| --- |0.960| -- |24.38/18 |V:D6 D| --- {1.060 | --- |26.92/20 |RD8 D| --- [1.280 | -- [32.51/24 |LD9 NOTES: 1. CONTROLLING DIMENSION: INCH 2, MEETS 1835 CASE OUTLINE CONFIGURATION #1 AS SHOWN IN ABOVE TABLE 3. N = NUMBER OF PINS TO. SW CATL WSAATVALE CA Sie FAR A 727 A PROPRIETARY INFORMATIE LVIAXAIZV PACKAGE FAMILY OUTLINE: CDIP 300" | A \ 21-0045 4 TILE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 1997 Maxim Integrated Products Printed USA MAXIMA is a registered trademark of Maxim Integrated Products.