EN2340QI
Evaluation Board User Guide
March 2012
Page 1 of 9
Enpirion EN2340QI DC-DC Converter
w/Integrated Inductor Evaluation Board
Introduction
Thank you for choosing Enpirion, the source for ultra small foot print power converter
products. This evaluation board user guide applies to the EN2340 devices mounted on
PCB’s with the part number 06905 on the backside. In addition to this document, you
will also need the latest device datasheet.
• The EN2340QI features integrated inductor, power MOSFETS, controller, a bulk
of the compensation network, and protection circuitry against system faults. This
level of integration delivers a substantial reduction in footprint and parts count
over competing solutions. The evaluation board is optimized for engineering ease
of testing through programming options, clip leads, test points etc.
• The EN2340QI features a customer programmable output voltage by means of a
resistor divider. The resistor divider allows the user to set the output voltage to
any value within the range 0.75V to 5V. The evaluation board, as shipped is
populated with a 4 resistor divider option. The upper resistor is fixed and has a
phase lead capacitor in parallel. One of the 4 lower resistors is selected with the
jumper option for different output voltages. To change V
OUT
, retain the upper
resistor and capacitor and change only the lower resistor.
• The input and output capacitors are X5R or X7R multi-layer ceramic chip
capacitors. The Soft-start capacitor is a small value X7R MLCC. Pads are
available to have multiple input and output capacitors. This allows for evaluation
of performance over a wide range of input/output capacitor combinations.
• Clip-on terminals are provided for ENA and POK. Banana jacks are provided for
12V
IN
, AVIN, and V
OUT
terminals. Several signal and GND clip-on test points are
also provided to measure V
IN
, V
OUT
, and GND nodes.
• A jumper is provided for controlling the Enable signal. Enable may also be
controlled using an external switching source by removing the jumper and
applying the enable signal to the ENA clip-on terminal.
CAUTION: The M/S jumper J8 has to be either in the rightmost position, or
left open all the time. DO NOT put this jumper in the leftmost
position, or you will short AVIN to GND. The M/S function is not
available for the EN2340.
EN2340QI
Evaluation Board User Guide
March 2012
Page 2 of 9
• Foot print is also provided for a SMA connector to S_IN input. A switching input
to this pin allows the device clock to be phase locked to an external signal. This
external clock synchronization allows for moving any offending beat frequency to
be moved out-of-band. A swept frequency applied to this pin results in spread
spectrum operation and reduces the peaks in the noise spectrum of emitted EMI.
• A two pin header footprint is provided for the S_OUT pin. This signal can be used
to synchronize another EN2340 to the switching frequency coming out of the
S_OUT pin.
• The board comes with input decoupling and PVIN (12VIN) reverse polarity
protection to guard the device against common setup mishaps. Please note there
is no reverse polarity protection on AVIN input.
Quick Start Guide
STEP 1: Set the “ENABLE” jumper J3 to the Disable Position, as shown in Figure 1.
Figure 1: Shows the Enable jumper in the DISABLE position.
STEP 2: Connect the 12V nominal Power Supply to the input power connectors, 12VIN
(J7) and GND (J11) as indicated in Figure 4 and set the supply to the desired voltage.
CAUTION: be mindful of the polarity. Even though the evaluation board comes
with reverse polarity protection diodes, it may not protect the device under all
conditions.
STEP 3: Make sure the two-in header J1 is properly populated depending on how you
want to power AVIN. If you want to use the device in a single input supply mode, and
use the on-chip AVINO pin, then populate J1 with a shorting jumper. If you want to
supply your own external AVIN, then remove the jumper from J1, and connect a 3.3V
nominal power supply to the AVIN (J9) and GND (J11).
CAUTION: be mindful of the AVIN input polarity. There is no reverse polarity
protection on this input.
CAUTION: Do not apply an external AVIN to the device with the J1 jumper
populated. Doing so will damage the device.
EN2340QI
Evaluation Board User Guide
March 2012
Page 3 of 9
STEP 4: Connect the load to the output connectors VOUT (J6) and GND (J10), as
indicated in Figure 4.
STEP 5: Select the output voltage setting jumper. Figure 2 shows what output voltages
are achieved by selecting each jumper position. Note that depending on the tolerance of
the resistors populated on the board, each output voltage setting may have a larger
tolerance than just the VFB pin as specified in the datasheet. Please see Figure 5 and
the Bill of Materials section.
Figure 2: Output Voltage selection jumpers J5
Jumper shown selects 1.2V output
(Nominal jumper position voltages from left to right are: 3.29V, 2.48V, 1.2V and 1.0V)
Please note: The loop compensation circuit for this version of evaluation board
has been stabilized for PVIN greater than 10V. In order to further optimize the
loop for any operating point, please see the datasheet. See Figures 4 and 5.
STEP 6: Apply 12V
IN
and AVIN (either through AVINO output or through an external
voltage) to the device, and move the ENA jumper to the enabled position. The
EN2340QI is now powered up. Various measurements such as efficiency, line and load
regulation, input / output ripple, load transient, drop-out voltage measurements may be
conducted at this point. The over current trip level, short circuit protection, under voltage
lock out thresholds, temperature coefficient of the output voltage may also be measured
in this configuration.
Alternatively, you can leave the ENA jumper in the enabled position, and turn on the
device using the input voltage PVIN. Please review the Power Up Sequence section in
the datasheet before turning the unit on using PVIN.
CAUTION: Please refer to the datasheet for the maximum voltages on the 12V
(PVIN) and AVIN inputs.
STEP 6A: Power Up/Down Behavior – Remove ENA jumper and connect a pulse
generator (output disabled) signal to the clip-on test point below ENA and Ground. Set
the pulse amplitude to swing from 0 to 2.5 volts. Set the pulse period to 10msec. and
duty cycle to 50%. Hook up oscilloscope probes to ENA, SS, POK and VOUT with clean
EN2340QI
Evaluation Board User Guide
March 2012
Page 4 of 9
ground returns. Apply power to evaluation board. Enable pulse generator output.
Observe the SS capacitor and VOUT voltage ramps as ENA goes high and again as
ENA goes low. The device when powered down ramps down the output voltage in a
controlled manner before fully shutting down. The output voltage level when POK is
asserted /de-asserted as the device is powered up / down may be observed as well as
the clean output voltage ramp and POK signals.
STEP 7: External Clock Synchronization / Spread Spectrum Modes: In order to
activate this mode, it may be necessary to a solder a SMA connector at J4. Alternately
the input clock signal leads may be directly soldered to the through holes of J4 as
shown below.
Figure 3: SMA Connector for External Clock Input
Power down the device. Move ENA into disable position. Connect the clock signal as
just indicated. The clock signal should be clean and have a frequency in the range of
the nominal frequency ±10%; amplitude 0 to 2.5 volts with a duty cycle between 20 and
80%. With S_IN signal disabled, power up the device and move ENA jumper to Enabled
position. The device is now powered up and outputting the desired voltage. The device
is switching at its free running frequency. The switching waveform may be observed
between test points SW and GND. Now enabling the S_IN signal will automatically
phase lock the internal switching frequency to the externally applied frequency as long
as the external clock parameters are within the specified range. To observe phase-lock
connect oscilloscope probes to the input clock as well as to the SW test point. Phase
lock range can be determined by sweeping the external clock frequency up / down until
the device just goes out of lock at the two extremes of its range.
For spread spectrum operation the input clock frequency may be swept between two
frequencies that are within the lock range. The sweep (jitter) repetition rate should be
limited to 10 kHz. The radiated EMI spectrum may be now measured in various states –
free running, phase locked to a fixed frequency and spread spectrum.
Before measuring radiated EMI, place a 10uF/0805, X7R capacitor at the input and
output edges of the PCB (C8 and C9 positions), and connect the PVIN power and the
load to the board at or near these capacitors. The added capacitor at the input edge is
for high-frequency decoupling of the input cables. The one added at the output edge is
meant to represent a typical load decoupling capacitor. We recommend doing EMI
testing in single-supply mode only as this will simplify the test setup.
GND
Ext. Clock
Figure 4: Evaluation Board
jumper J8 has to be either in the rightmost position, or left open all
the time. DO NOT put this jumper in the leftmost position, or you
will short AVIN to GND. The M/S function is
EN2340.
EN2340QI
Evaluation Board User Guide
Page 5 of 9
Figure 4: Evaluation Board
Top and Assembly Layers.
The M/S
jumper J8 has to be either in the rightmost position, or left open all
the time. DO NOT put this jumper in the leftmost position, or you
will short AVIN to GND. The M/S function is
not available for the
Evaluation Board User Guide
March 2012
The M/S
jumper J8 has to be either in the rightmost position, or left open all
the time. DO NOT put this jumper in the leftmost position, or you
not available for the
EN2340QI Evaluation Board User Guide
March 2012
Page 6 of 9
Figure 5: EN2340 Evaluation Board Schematic
D1
S2A
C4
+
C14
R12
12VIN
TP33
AGND
TP27
J7
J6
J11
VFB
C1
FB1
0805
0805
0805
0805
0805
0805
C3
R13
C10
R14
TP30
TP31
TP6
TP3
J1
1
2
C3, 10 are 1206/0805
J10
VOUT
ENA
AVINO
AVINO
J4
TP9
1
2
TP15TP14
C8
C9
N/U
R20
TP32
C2
GND VIN
ENA
POK
VOUT GND
Provision for Implementing
Adaptive Voltage Scaling
0805
0805
R17
R18 PIN53
PIN53 PIN60
PIN60
C6
R8
R7
R3
R6
0402
0402
SW
C7
AVIN
U1
EN2340
NC1
1
NC2
2
NC3
3
NC4
4
NC5
5
NC6
6
NC7
7
NC8
8
NC9
9
NC10
10
NC11
11
NC12
12
NC13
13
NC14
14
NC15
15
VOUT
16
VOUT
17
VOUT
18
VOUT
19
VOUT
20
VOUT
21
VOUT
22
VOUT
23
VOUT
24
NC25
25
NC26
26
NC(SW)27
27
NC(SW)28
28
PGND
29
PGND
30
PGND
31
PGND
32
PGND
33
PGND
34
S_OUT 48
S_IN 47
BGND 46
VDDB 45
BTMP 44
PG 43
AVINO 42
PVIN 41
PVIN 40
PVIN 39
PVIN 38
PVIN 37
PVIN 36
PVIN 35
NC68 68
NC67 67
NC66 66
NC65 65
NC64 64
NC(SW)63 63
NC(SW)62 62
NC(SW)61 61
AGND 60
NC59 59
FADJ 58
RCLX 57
SS 56
EAOUT 55
VFB 54
AGND 53
AGND 52
AVIN 51
ENABLE 50
POK 49
0603
0402
C5
C20
EAOUT
VFB
VFB
TP5
R4
0805
0603
FADJ
0805
J9
TP28
TP34
C16
R5
TP21
TP22
AVIN
C17
C18
0805
VFBEAOUT
0805
0805
0805
12VIN
AVIN
GND
GND
5.5V MAX
VOUT
C19
R15
C12
0402
0402
SIN
SOUT
C13
SCH 06904
PCB 06905
C15
C21
R2
0805
08050805
C12, 13, 15, 21
are 1206/0805
TP19
1
2
TP20
1
2
R10
12VIN
VOUT
R1
TP10
0402
TP8
TP7
J5
1
3
5
2
4
6
87
0805
TP29
TP17
1
2
TP18
1
2
R9
R19
VR1
5.1V
TP11
R16
TP12
12VIN
J3
1
2
3
AVIN
Short across R9
when all other
routing completed
TP4
TP1
AVIN
TP23
TP2
TP24
TP16
TP25
TP13
TP26
EN2340QI
Evaluation Board User Guide
March 2012
Page 7 of 9
Test Recommendations
Recommendations
To guarantee measurement accuracy, the following precautions should be observed:
1. Make all input and output voltage measurements at the board using the test
points provided (TP13 to TP16). This will eliminate voltage drop across the
line and load cables that can produce false readings.
2. Measure input and output current with series ammeters or accurate shunt
resistors. This is especially important when measuring efficiency.
3. Use a low-loop-inductance scope probe tip shown below to measure
switching signals and input / output ripple to avoid noise coupling into the
probe ground lead. Input ripple, output ripple, and load transient deviation are
best measured near the respective input / output capacitors. For more
accurate ripple measurement, please see Enpirion App Note regarding this
subject.
4. The board includes a pull-up resistor for the POK signal and ready to monitor
the power OK status at clip lead marked POK.
5. The over-current protection circuit typically limits the maximum load current to
approximately 1.5X the rated value. For the EN2340, the OCP trip point can
be programmed via the RCLX pin. Table 1 below shows the RCLX value that
should be used to achieve a nominal 6A OCP trip point as a function of output
voltage. The board as shipped is populated with a 31.6kΩ RCLX resistor. The
OCP threshold has some tolerance for a given board. If the OCP threshold is
at the low end of the tolerance for some output voltages above 1.2V, you may
have to change the RCLX resistor according to Table 1.
V
OUT
Range
R
CLX
resistor value
0.75V < V
OUT
<
1.2V 31kΩ
1.2V < V
OUT
<
2.0V 33kΩ
2.0V < V
OUT
<
5.0V 36kΩ
Table 1: Recommended RCLX value as a function of V
OUT
EN2340QI
Evaluation Board User Guide
March 2012
Page 8 of 9
Bill of Materials
Designator
Qty
Description
C1, C16 2 CAP, 10UF 0805 X7R 10% 10V CERAMIC
C2 1 CAP, 47000PF 0805 X7R 10% 50V CERAMIC
C3, C10 2 CAP, 22UF 1210 X5R 20% 25V CERAMIC
C6, C19 2 CAP, 0.10UF 0402 X5R 10% 25V CERAMIC
C5, C20 2 CAP, 1.0UF 0402 X5R 10% 10V CERAMIC
C7 1 CAP, 68PF 0805 NP0 5% 50V CERAMIC
C12, C13 2 CAP, 47UF 1210 X5R 20% 10V CERAMIC
C14 1 CAP, SMT ELECTROLYTIC, 150UF, 25V
C4, C8, C9, C11,
C15, C17, C18,
C21, J4, R2, R9,
R11-R15, TP34
17
NOT USED
D1 1 S2A DIODE, Micro Commercial S2A-TP
FB1 1 SMT FERRITE BEAD 4A 0805, Wurth Electronik 742792012
J1 1 CONNECTOR HEADER, 2 POSITION, Samtec TSW-102-07-T-S
J3, J8 2 CONNECTOR HEADER, 3 POSITION, Samtec TSW-103-07-T-S
J5 1 CONNECTOR HEADER, 8 POSITION Dual, Samtec TSW-104-24-T-D
J6, J7, J9-J11 5 BANANA JACK, KEYSTONE 575-4
R1 1 RES 100K OHM 1/16W 1% 0402 SMD
R3 1 RES 200K OHM 1/8W 0.1% 0805 SMD
R4 1 RES 10K OHM 1/8W 0.1% 0805 SMD
R5 1 RES 59K OHM 1/8W 1% 0805 SMD
R6 1 RES 604K OHM 1/8W 1% 0805 SMD
R7 1 RES 332K OHM 1/8W 1% 0805 SMD
R8 1 RES 86.6K OHM 1/8W 1% 0805 SMD
R10 1 RES 3.01K OHM 1/8W 1% 0805 SMD
R16 1 RES 31.6K OHM 1/8W 0.1% 0805 SMD
R7, R18 2 RES ZERO OHM 1/10W 5% 0402 SMD
R19 1 RES 5.62K OHM 1/8W 1% 0805 SMD
R20 1 RES 4.75K OHM 1/8W 1% 0603 SMD
TP1-TP5, TP13-
TP16, TP21,TP22,
TP28,TP32, TP33
14
TEST POINT SURFACE MOUNT, KEYSTONE 5016
TP30, TP31 2 TEST POINT SURFACE MOUNT, KEYSTONE 5015
U1 1 EN2340QI QFN 4A
VR1 1 DIODE ZENER 5.1V 200MW SOD-323 On Semi MM3Z5V1T1G
EN2340QI
Evaluation Board User Guide
March 2012
Page 9 of 9
Contact Information
Enpirion, Inc.
Perryville III Corporate Park
53 Frontage Road - Suite 210
Hampton, NJ 08827 USA
Phone: +1-908-894-6000
Fax: +1.908-894-6090
www.enpirion.com
Enpirion reserves the right to make changes in circuit design and/or specifications at
any time without notice. Information furnished by Enpirion is believed to be accurate and
reliable. Enpirion assumes no responsibility for its use or for infringement of patents or
other third party rights, which may result from its use. Enpirion products are not
authorized for use in nuclear control systems, as critical components in life support
systems or equipment used in hazardous environments without the express written
authority from Enpirion.
