REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
A
Change to one part - one part number format. Add device ty pe 02. Add vendor
CAGE 01295 for device type 02. Add characterization for device classes B, S,
Q, and V. Add ground bounce and lat c h-up changes to table I. Editorial
changes throughout
93-01-15 Monica L. Poelking
B
Change the power dissipat ion capac itance parameters in table I.
93-04-14 Monica L. Poelking
C
Technical and editorial changes throughout . Add RHA requirements. - CS 97-11-05 Monica L. Poelking
D
Add device type 03. Add vendor CAGE F 8859. Add case outline X. Add
radiation features for device type 01. Update boilerplate to MIL-PRF- 38535
requirements. - jak
02-07-03 Thomas M. Hess
E
Add radiation features for device type 03 in section 1.5. Update the boilerplate
to include radiation hardness assured requirements for device type 03.
Editorial changes throughout. - jak
04-05-05 Thomas M. Hess
REV
SHEET
REV C D E E D D E E D
SHEET 15 16 17 18 19 20 21 22 23
REV STATUS REV E E E E E E E E E E E E D D
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14
PMIC N/A PREPARED BY
Jeffery Tunstall
DEFENSE SUPPLY CENTER COLUMBUS
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
D. A. DiCenzo
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
APPROVED BY
N. A. Hauck
MICROCIRCUIT, DIGITAL, CMOS, 1-OF-8
DECODER/DEMULTIPLEXER, TTL
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
87-05-26
COMPATIBLE INPUTS, MONOLITHIC
SILICON
AMSC N/A
REVISION LEVEL
E SIZE
A CAGE CO DE
67268
5962-87554
SHEET
1 OF
23
DSCC FORM 2233
APR 97 5962-E179-04
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A
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DEFENSE SUPPLY CENTER COLUMBUS
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E SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes B, Q
and M), and space application (device classes S and V). A choice of case outlines and lead finishes are available and are
reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are
reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962 F 87554 01 M X A
Federal
stock class
designator
RHA
designator
(see 1.2.1)
Device
type
(see 1.2.2)
Device
class
designator
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\ /
(see 1.2.3)
\/
Drawing number
1.2.1 RHA designator. Device classes B, S, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels
and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535,
appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function
01 54ACT138 1-of-8 decoder/demultiplexer,
TTL compatible inputs
02 54ACT11138 1-of-8 decoder/demultiplexer,
TTL compatible inputs
03 54ACT138 1-of-8 decoder/demultiplexer,
TTL compatible inputs
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class Device requirements documentation
M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
B, S, Q, or V Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
E GDIP1-T16 or CDIP2-T16 16 Dual-in-line
F GDFP2-F16 or CDFP3-F16 16 Flat pack
X CDFP4-F16 16 Flat pack
2 CQCC1-N20 20 Leadless-chip-carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes B, S, Q, and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
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DEFENSE SUPPLY CENTER COLUMBUS
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E SHEET 3
DSCC FORM 2234
APR 97
1.3 Absolute maximum ratings. 1/ 2/
Supply voltage range (VCC)........................................................................................ -0.5 V dc to +6.0 V dc
DC input voltage (VIN)................................................................................................ -0.5 V dc to VCC + 0.5 V dc
DC output voltage range (VOUT)................................................................................. -0.5 V dc to VCC + 0.5 V dc
DC input diode current (IIK) (0.0V > VIN, VIN > VCC).................................................... ±20 mA
DC output diode current (IOK) (0.0V > VOUT, VOUT > VCC)........................................... ±20 mA
DC output current (IOUT) (per output)......................................................................... ±50 mA
DC VCC or GND current (ICC, IGND) (per pin)............................................................... ±200 mA 3/
Storage temperature range (TSTG)............................................................................. -65°C to +150°C
Maximum power dissipation (PD)............................................................................... 500 mW
Lead temperature (soldering, 10 seconds):
Case outline X........................................................................................................ +260°C
All other case outlines except case X..................................................................... +300°C
Thermal resistance, junction-to-case (θJC) ................................................................ See MIL-STD-1835
Junction temperature (TJ).......................................................................................... +175°C
Case operating temperature (TC)............................................................................... -55°C to +125°C
1.4 Recommended operating conditions. 2/ 4/
Supply voltage range (VCC)........................................................................................ +4.5 V dc to +5.5 V dc
Input voltage range (VIN)............................................................................................ +0.0 V dc to VCC
Output voltage range (VOUT) ...................................................................................... +0.0 V dc to VCC
Maximum low level input voltage (VIL)....................................................................... 0.8 V
Minimum high level input voltage (VIH)...................................................................... 2.0 V
Case operating temperature range (TC) .................................................................... -55°C to +125°C
Input rise and fall rate (tr and tf) maximum:
V
CC = 4.5 V ............................................................................................................. 10 ns/V
V
CC = 5.5 V ............................................................................................................. 8 ns/V
Maximum high level output current (IOH).................................................................... -24 mA
Maximum low level output current (IOL)...................................................................... 24 mA
1.5 Radiation features.
Device type 01:
Maximum total dose available (dose rate = 50 – 300 rads (Si)/s)........................ 100 krads (Si)
Single Event Latch-up (SEL)................................................................................ ≥ 100 MeV-cm2/mg
Device type 03:
Maximum total dose available (dose rate = 50 – 300 rads (Si)/s)........................ 300 krads (Si)
Single Event Latchup (SEL) or Single Event Upset (SEU)................................... ≥ 93 Me V-cm2/mg
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for
allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883.
2/ Unless otherwise noted, all voltages are referenced to GND.
3/ For packages with multiple VCC and GND pins, this value represents the maximum total current flowing into or out of all VCC
or GND pins.
4/ Unless otherwise specified, the values listed above shall apply over the full VCC and TC recommended operating range.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
E SHEET 4
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
ELECTRONIC INDUSTRIES ALLIANCE (EIA)
EIA/JEDEC Standard No. 78 - IC Latch-Up Test
JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed
CMOS Devices
(C opi es o f these doc uments are avail abl e onlin e at http://www.jedec.org or from the Electronic Industries Alliance, 2500
Wilson Boulevard, Arlington, VA 22201-3834.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes B, S, Q, and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level C devices and as specified
herein.
STANDARD
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SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
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E SHEET 5
DSCC FORM 2234
APR 97
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes B, S, Q, and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing or acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range. Test conditions for these specified characteristics and limits are as specified in table I.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M
shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes B, S, Q, and V shall be a "QML" or "Q" as
required in MIL-PRF-38535. The compliance mark for device class M sha ll be a "C" as required in MIL-PRF-38535,
appendix A.
3.6 Certificate of compliance. For device classes B, S, Q, and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a
certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in
MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source
of supply for this drawing shall affirm that the manufacturer's product meets, for device classes B, S, Q, and V, the
requirements of MIL-PRF-38535 and herein or for device class M the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes B, S, Q, and V in MIL-PRF-38535
or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 39 (see MIL-PRF-38535, appendix A).
3.11 Substitution. Substitution data shall be as indicated in the appendix herein.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
E SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and device
class
VCC Group A
subgroups
Limits 5/ Unit
Min Max
High level output
voltage
3006
VOH1
6/
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
All
All
4.5 V
1, 2, 3 4.4 V
VOH2
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
All
All
5.5 V
1, 2, 3 5.4
For all other inputs
VIN = VCC or GND
IOH = -50 µA
M, D, P, L, R 01
B, S, Q, V
1
VOH3
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
All
All
4.5 V
1, 2, 3 3.7
For all other inputs
VIN = VCC or GND
IOH = -24 mA
M, D, P, L, R 01
B, S, Q, V
1
VOH4
6/
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
For all other inputs
VIN = VCC or GND
IOH = -24 mA
All
All
5.5 V
1, 2, 3 4.7
VOH5
7/
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
All
All
5.5 V
1, 2, 3 3.85
For all other inputs
VIN = VCC or GND
IOH = -50 mA
M, D, P, L, R 01
B, S, Q, V
1
See footnotes at end of table.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
E SHEET 7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and device
class
VCC Group A
subgroups
Limits 5/
Unit
Min Max
Low level output
voltage
3007
VOL1
6/
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
All
All
4.5 V
1, 2, 3 0.1 V
VOL2
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
All
All
5.5 V
1, 2, 3 0.1
For all other inputs
VIN = VCC or GND
IOL = 50 µA
M, D, P, L, R
01
B, S, Q, V
1
VOL3
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
All
B, S, Q, V
4.5 V
1, 3 0.4
VIL = 0.8 V 2 0.5
For all other inputs
VIN = VCC or GND M, D, P, L, R
01
B, S, Q, V
1
0.4
I
OL = 24 mA All 1 0.4
M
2, 3 0.5
VOL4
6/
For all inputs affecting
output under test
All
B, S, Q, V
5.5 V
1, 3 0.4
VIN = VIH or VIL
VIH = 2.0 V
2 0.5
VIL = 0.8 V
For all other inputs
VIN = VCC or GND
All
M
1 0.4
I
OL = 24 mA 2, 3 0.5
VOL5
7/
For all inputs affecting
output under test
VIN = VIH or VIL
VIH = 2.0 V
VIL = 0.8 V
For all other inputs
All
All
5.5 V
1, 2, 3 1.65
VIN = VCC or GND
IOL = 50 mA M, D, P, L, R
01
B, S, Q, V 1
See footnotes at end of table.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
E SHEET 8
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test and
MIL-STD-883
test method 1/
Symbol
Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and device
class
VCC Group A
subgroups
Limits 5/ Unit
Min Max
Positive input clamp
voltage
VIC+
For input under test
IIN = 1 mA
All
B, S, Q, V
GND 1 0.4 1.5 V
3022 M, D, P, L, R 01
B, S, Q, V
1
Negative input clamp
voltage
VIC-
For input under test
IIN = -1 mA
All
B, S, Q, V
Open
1 -0.4 -1.5 V
3022 M, D, P, L, R 01
B, S, Q, V
1
Input current high
IIH All 5.5 V
1 0.1 µA
3010 B, S, Q, V 2 1.0
All 1 0.1
For input under test
VIN = VCC
For all other inputs
VIN = VCC or GND M 2, 3 1.0
M, D, P, L, R 01
B, S, Q, V
1
0.1
Input current low
IIL All 5.5 V
1 -0.1 µA
3009 B, S, Q, V 2 -1.0
All 1 -0.1
For input under test
VIN = GND
For all other inputs
VIN = VCC or GND M 2, 3 -1.0
M, D, P, L, R 01
B, S, Q, V
1
-0.1
Input capacitance
3012
CIN
See 4.4.1c
TC = +25°C
All
All
GND 4 10.0 pF
Power dissipation
capacitance
CPD
8/
01, 03
All
5.0 V
4 85.0
See 4.4.1c
TC = +25°C 02
All
110.0
pF
01 3 1.6
B, S, Q, V 1, 2 1.0
03
Q, V
1, 2, 3
1.6
For input under test
VIN = VCC - 2.1 V
For all other inputs
VIN = VCC or GND
All
M
1, 2, 3 1.6
Quiescent supply
current delta, TTL
input levels
3005
∆ICC
9/
M, D 01
5.5 V
1 1.6
mA
P, L, R B, S, Q, V 3.5
See footnotes at end of table.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
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E SHEET 9
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test and
MIL-STD-883
test method 1/
Symbol
Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and device
class
VCC Group A
subgroups
Limits 5/ Unit
Min Max
ICCH All 5.5 V
1 2.0 µA
B, S, Q, V 2 40.0
All 1 8.0
Quiescent supply
current, output
high
3005
For all inputs
VIN = VCC or GND
M 2, 3 160.0
M 100.0
µA
D 01 1 1.0
P, L, R B, S, Q, V 3.5
mA
M, D, P, L, R, F
10/ 03
Q, V 50
µA
ICCL All 5.5 V
1 2.0 µA
B, S, Q, V 2 40.0
All 1 8.0
Quiescent supply
current, output
low
3005
For all inputs
VIN = VCC or GND
M 2, 3 160.0
M 01 1 100.0
µA
D B, S, Q, V 1.0
mA
P, L, R 3.5
M, D, P, L, R, F
10/ 03
Q, V 50
µA
Latch-up input/
output over-
voltage
ICC
(O/V1)
11/
tw ≥ 100 µs
tcool ≥ tw
5 µs ≤ tr ≤ 5 ms
5 µs ≤ tf ≤ 5 ms
Vtest = 6.0 V
VCCQ = 5.5 V
Vover = 10.5 V
All
B, S, Q, V
5.5 V
2 200 mA
Latch-up input/
output positive
over-current
ICC
(O/I1+)
11/
tw ≥ 100 µs
tcool ≥ tw
5 µs ≤ tr ≤ 5 ms
5 µs ≤ tf ≤ 5 ms
Vtest = 6.0 V
VCCQ = 5.5 V
Itrigger = +120 mA
All
B, S, Q, V
5.5 V
2 200 mA
See footnotes at end of table.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
E SHEET 10
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and
device
class
VCC Group A
subgroups
Limits 5/ Unit
Min Max
Latch-up input/
output negative
over-current
ICC
(O/I1-)
11/
tw ≥ 100 µs
tcool ≥ tw
5 µs ≤ tr ≤ 5 ms
5 µs ≤ tf ≤ 5 ms
Vtest = 6.0 V
VCCQ = 5.5 V
Itrigger = -120 mA
All
B, S, Q, V
5.5 V 2 200 mA
Latch-up supply
over-voltage
ICC
(O/V2)
11/
tw ≥ 100 µs
tcool ≥ tw
5 µs ≤ tr ≤ 5 ms
5 µs ≤ tf ≤ 5 ms
Vtest = 6.0 V
VCCQ = 5.5 V
Vover = 9.0 V
All
B, S, Q, V
5.5 V 2 100 mA
Truth table test,
output voltage
12/ All
All
4.5 V 7, 8 L H
3014
VIL = 0.40 V
VIH = 2.40 V
Verify output VOUT
See 4.4.1e
All
M
5.5 V 7, 8 L H
M, D, P, L, R 01
B, S, Q, V
4.5 V 7 L H
Propagation delay
tPHL1, All 4.5 V 9, 11 1.0 11.0 ns
time, select to
output, An to On tPLH1 B, S, Q, V
10 1.0 12.5
3003 13/ 14/ All 9 1.0 11.0
CL = 50 pF minimum
RL = 500Ω
See figure 4
M
10, 11 1.0 12.5
M, D, P, L, R 01
B, S, Q, V
9 1.0 11.0
All 4.5 V 9, 11 1.0 12.0 ns
B, S, Q, V
10 1.0 13.5
All 9 1.0 12.0
tPHL2,
tPLH2
13/ 14/
CL = 50 pF minimum
RL = 500Ω
See figure 4
M
10, 11 1.0 13.5
Propagation delay
time, enable to
output, E1 or E2
to On
3003
M, D, P, L, R 01
B, S, Q, V
9 1.0 12.0
See footnotes at end of table.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
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TABLE I. Electrical performance characteristics - Continued.
Group A
subgroups
Limits 5/ Unit
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Device
type 4/
and
device
class
VCC
Min Max
Propagation delay
tPHL3, 9, 11 1.0 12.5 ns
time, enable to
output, E3 to On tPLH3
All
B, S, Q, V
10 1.0 14.0
3003 13/ 14/ 9 1.0 12.5
CL = 50 pF minimum
RL = 500Ω
See figure 4 All
M 10, 11 1.0 14.0
M, D, P, L, R 01
B, S, Q, V
4.5 V
9 1.0 12.5
1/ For tests not listed in the referenced MIL-STD-883 (e.g. ∆ICC), utilize the general test procedure under the conditions listed
herein. All inputs and outputs shall be tested, as applicable, to the tests in table I herein.
2/ Each input/output, as applicable shall be tested at the specifi ed temperature for the specified limits. Output terminals not
designated shall be high level logic, low level logic, or open, except as follows:
a. VIC (pos) tests, the GND terminal can be open. TC = +25°C.
b. VIC (neg) tests, the VCC terminal shall be open. TC = +25°C.
c. All ICC and ∆ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be
placed in the circuit such that all current flows through the meter.
3/ RHA parts for device type 01 are tested at all levels M, D, P, L, and R of irradiation. Pre and post irradiation values are
identical unless otherwise specified in table I.
RHA parts for device type 03 meet all levels M, D, P, L, R, and F of irradiation. Pre and post irradiation values are identical
unless otherwise specified in table I
When performing post irradiation electrical measurements for any RHA level for any device, TA = +25 °C.
4/ The word "All" in the device type and device class column, means limits for all device types and classes.
5/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and
the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum
and maximum limits, as applicable, listed herein.
6/ For device classes B, S, Q, and V, this test is guaranteed, if not tested, to the limits specified in table I.
7/ Transmission driving tests are performed at VCC = 5.5 V dc with a 2 ms duration maximum. This test may be performed
using VIN = VCC or GND. When VIN = VCC or GND is used, the test is guaranteed for VIN = 2.0 V or 0.8 V. For device class
M, subgroup 1 testing shall be guaranteed if not tested to the limits specified in table I. For radiation hardness assured
devices, subgroup 1 tests shall be performed.
8/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC)f
+(ICC x VCC) + (n x d x ∆ICC x VCC), and the dynamic current consumption, IS = (CPD + CL)VCCf + ICC + n x d x ∆ICC. For both
PD and IS, n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the
input signal.
9/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at
VIN = VCC - 2.1 V (alternate method). Classes M, B, S, Q, and V shall use the preferred method. When the test is
performed using the alternate test method, the maximum limit is equal to the number of inputs at a high TTL input level
times ∆ICC maximum limits; and the preferred method and limits are guaranteed.
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TABLE I. Electrical performance characteristics - Continued.
10/ The maxi mum limit for this par ameter at 100 krads (Si) is 2 µA.
11/ See JEDEC Standard No. 17 for electrically induced latch-up test methods and procedures. The values listed for
I
trigger and Vover are to be accurate wi thin ± 5 percent.
12/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic
patterns used for fault detection. Functional tests shall be performed in sequence as approved by the qualifying activity on
qualified devices. H ≥ 2.5 V, L < 2.5 V; high inputs = 2.4 V and low inputs = 0.4 V. The input voltage levels have the
allowable tolerances in accordance with MIL-STD-883 already incorporated.
13/ Device classes B, S, Q, and V are tested at VCC = 4.5 V and TC = +125°C for sample testing and at VCC = 4.5 V and TC
= +25°C for screening. Other voltages of VCC and temperatures are guaranteed, if not tested (see 4.4.1d).
14/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits
for VCC = 5.5 V are 1.0 ns and guaranteed by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. For propagation
delay tests, all paths must be tested.
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Device types 01 and 03 02
Case outlines E, F, and X 2 E 2
Terminal number Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A0
A1
A2
E1
E2
E3
O7
GND
O6
O5
O4
O3
O2
O1
O0
VCC
---
---
---
---
NC
A0
A1
A2
E1
NC
E2
E3
O7
GND
NC
O6
O5
O4
O3
NC
O2
O1
O0
VCC
O1
O2
O3
GND
O4
O5
O6
O7
E2
E1
E3
VCC
A2
A1
A0
O0
---
---
---
---
NC
A2
A1
A0
O0
NC
O1
O2
O3
GND
NC
O4
O5
O6
O7
NC
E2
E1
E3
VCC
NC = No connection.
Terminal description
Terminal symbol Description
An (n = 0 to 2)
Address (data) inputs
E1, E2
Asynchronous enable control inputs
(active low)
E3
Asynchronous enable control input
(active high)
On (n = 0 to 7)
Outputs (active low)
FIGURE 1. Terminal connections.
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Device types 01, 02, and 03
Inputs Outputs
E1
E2
E3
A0
A1
A2
O0
O1
O2
O3
O4
O5
O6
O7
H
X
X
L
L
L
L
L
L
L
L
X
H
X
L
L
L
L
L
L
L
L
X
X
L
H
H
H
H
H
H
H
H
X
X
X
L
H
L
H
L
H
L
H
X
X
X
L
L
H
H
L
L
H
H
X
X
X
L
L
L
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H = High voltage level
L = Low voltage level
X = Immaterial
FIGURE 2. Truth table.
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FIGURE 3. Logic diagram.
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NOTES:
1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance).
2. RT = 50Ω or equivalent. RL = 500Ω or equivalent.
3. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR ≤ 10 MHz; tr ≤ 3 ns; tf ≤ 3 ns; duty cycle = 50 percent.
4. Timing parameters shall be tested at a minimum input frequency of 1 MHz.
5. Outputs are measured one at a time with one output per measurement.
FIGURE 4. Switching waveforms and test circuit.
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4. VERIFICATION
4.1 Sampling and inspection. For device classes B, S, Q, and V, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification
in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection
procedures shall be in accordance with MIL-PRF-38535, appendix A
4.2 Screening. For device classes B, S, Q, and V, screening shall be in accordance with MIL-PRF-38535, and shall be
conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be
in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance
inspection.
4.2.1 Additional criteria for device classes M, B, and S.
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
(2) TA = +125°C, minimum.
(3) Delete the sequence specified in 3.1.10 through 3.1.14 of method 5004 and substitute the first 7 test
requirements of table II herein.
(4) For device class M, unless otherwise noted, the requirements for device class B in method 1015 of MIL-STD-883
shall be followed.
(5) Unless otherwise specified in the QM plan for static burn-in, device classes B and S, test condition A, method
1015 of MIL-STD-883, the test duration for each static test shall be 24 hours minimum for class S devices and in
accordance with table I of method 1015 for class B devices.
(a) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to
VCC/2 ±0.5 V. Resistors R1 are optional on both inputs and open outputs and required on outputs connected
to VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ.
(b) For static burn-in II, all inputs shall be connected through the R1 resistors to VCC. Outputs may be open or
connected to VCC/2 ±0.5 V. Resistors R1 are optional on open outputs, and required on outputs connected to
VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ.
(c) VCC = 5.5 V ±0.5 V.
(6) Unless otherwise specified in the QM plan for dynamic burn-in, device classes B and S, test condition D, method
1015 of MIL-STD-883, the following shall apply:
(a) Input resistors = 220 Ω to 2 kΩ ±20 percent.
(b) Output resistors = 220Ω ±20 percent.
(c) VCC = 5.5 V ±0.5 V.
(d) The A0 pin shall be connected through a resistor to clock pulse 1 (CP1). The A1 pin shall be connected
through a resistor to clock pulse 2 (CP2). The A2 pin shall be connected through a resistor to clock pulse 3
(CP3). The enable pins shall be connected to VCC or GND, as applicable, to enable the outputs. Outputs shall
be connected through the resistors to VCC/2 ±0.5 V.
(e) CP1, CP2, CP3 = 25 kHz to 1 MHz square wave; fCP2 = fCP1/2; fCP3 = fCP2/2;
duty cycle = 50 percent ± 15 percent; VIH = 4.5 V to VCC; VIL = 0.0 V ± 0.5 V; tr, tf ≤ 100ns.
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b. Interim and final electrical test parameters shall be as specified in table II herein.
c. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements
may, at the manufacturer’s option, be performed separately or included in the final electrical parameter requirements.
4.2.2 Additional criteria for device classes B, S, Q, and V.
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b. Interim and final electrical test parameters shall be as specified in table II herein.
c. Additional screening for device class V or S beyond the requirements of device class Q or B shall be as specified in
MIL-PRF-38535, appendix B.
4.2.3 Percent defective allowable (PDA).
a. The PDA for class S or V devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in, based on the
exact number of devices submitted to each separate burn-in.
b. Static burn-in I and II failures shall be cumulative for determining the PDA.
c. The PDA for class B or Q devices shall be in accordance with MIL-PRF-38535 for static burn-in. Dynamic burn-in is not
required.
d. The PDA for class M devices shall be in accordance with MIL-PRF-38535, appendix A for static burn-in and dynamic
burn-in.
e. Those devices whose measured characteristics, after burn-in, exceed the specified delta limits or electrical parameter
limits specified in table I, subgroup I, are defective and shall be removed from the lot. The verified number of failed
devices times 100 divided by the total number of devices in the lot initially submitted to burn-in shall be used to
determine the percent defective for the lot and the lot shall be accepted or rejected based on the specified PDA.
4.3 Qualification inspection.
4.3.1 Qualification inspection for device classes B, S, Q, and V. Qualification inspection for device classes B, S, Q, and V
shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5).
4.4 Conformance inspection. Technology conformance inspection for classes B, S, Q, and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.5).
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TABLE II. Electrical test requirements.
Test requirements Subgroups 1/
(in accordance with
MIL-STD-883,
method 5005, table I)
Subgroups 1/
(in accordance with
MIL-PRF-38535, table III)
Device
class M Device 2 /
class B De vice 2/
class S Device
class Q Device
class V
Interim electrical parameters,
method 5004 1 1 1 1
Static burn-in I, method 1015
(4.2.1a) 3/ Not
required Required 4/ Not
required Required 4/
Interim electrical parameters,
method 5004 (4.2.1b) 1 5 / 1 5/
Static burn-in II, method 1015
(4.2.1a) 3/ Required 6/ Required 4/ Required 6/ Required 4/
Interim electrical parameters,
method 5004 (4.2.1b) 1 2/ 5/ 1 2/ 5/ 1 2/ 5/ 1 2/ 5/
Dynamic burn-in I, method 1015
(4.2.1a) 3/ Not
required Required 4/ Not
required Required 4/
Interim electrical parameters,
method 5004 (4.2.1b) 1 5 / 1 5/
Final electrical parameters,
method 5004 1, 2, 3, 7, 8, 9 2/ 1, 2, 7, 9
2/ 6/ 1, 2, 7, 9
2/ 1, 2, 3, 7, 8,
9, 10, 11
2/ 6/
1, 2, 3, 7,8, 9,
10, 11
2/
Group A test requirements,
method 5005 (4.4.1) 1, 2, 3, 4, 7, 8, 9, 10,
11 1, 2, 3, 4, 7,
8, 9, 10, 11 1, 2, 3, 4, 7,
8, 9, 10, 11 1, 2, 3, 4, 7,
8, 9, 10, 11 1, 2, 3, 4, 7,
8, 9, 10, 11
Group B end-point electrical
parameters, method 5005
(4.4.2)
1, 2, 3, 7, 8,
9, 10, 11 5/
Group C end-point electrical
parameters, method 5005
(4.4.3)
1, 2, 3 1, 2 5/ 1, 2, 3 5/ 1, 2, 3, 7, 8,
9, 10, 11 5/
Group D end-point electrical
parameters, method 5005
(4.4.4)
1, 2, 3 1, 2 1, 2, 3 1, 2, 3 1, 2, 3
Group E end-point electrical
parameters, method 5005
(4.4.5)
1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9
1/ Blank spaces indicate tests are not applicable.
2/ PDA applies to subgroup 1 (see 4.2.3). For device classes S and V, PDA applies to subgroups 1 and 7 (see 4.2.3).
3/ The burn-in shall meet the requirements of 4.2.1a herein.
4/ On all class S lots, the device manufacturer shall maintain read-and-record data (as a minimum on disk) for burn-in
electrical parameters (group A, subgroup 1), in accordance with test method 5004 of MIL-STD-883. For pre-burn-in
and interim electrical parameters, the read-and-record requirements are for delta measurements only.
5/ Delta limits shall be required only on table I, subgroup 1. The delta values shall be computed with reference to the
previous interim electrical parameters. The delta limits are specified in table III.
6/ The device manufacturer may, at his option, either complete subgroup 1 electrical parameter measurements,
including delta measurements, within 96 hours after burn-in completion (removal of bias) or may complete
subgroup 1 electrical measurements without delta measurements within 24 hours after burn-in completion (removal
of bias). When the manufacturer elects to perform the subgroup 1 electrical parameter measurements without delta
measurements, there is no requirement to perform the pre-burn-in electrical tests (first interim electrical parameters
test in table II).
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TABLE III. Burn-in and operating life test, delta parameters (+25°C).
Parameter 1/ Symbol Device types
Delta limits
01 ±100 nA 2/
Supply current ICCH, ICCL 03 ±300 nA
Supply current delta ∆ICC 03 ±0.4 mA
Input current low level IIL 03
±20 nA
Input current high level IIH 03
±20 nA
Output voltage low level
VCC = 5.5 V, IOL = 24 mA VOL 03
±0.04 V
Output voltage high level
VCC = 5.5 V, IOH = -24 mA VOH 03
±0.20 V
1/ These parameters shall be recorded before and after the
required burn-in and life tests to determine delta limits.
2/ Guaranteed, if not tested.
4.4.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Latch-up tests are required for device classes B, S, Q, and V. These tests shall be performed only for initial
qualification and after process or design changes which may affect the performance of the device. Latch-up tests
shall be considered destructive. For latch-up tests, test all applicable pins on five devices with zero failures.
c. CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect
capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. CPD shall be
tested in accordance with the latest revision of JEDEC Standard No. 20 and table I herein. For CIN and CPD, test all
applicable pins on five devices with zero failures.
d. For device classes B, S, Q, and V, subgroups 9 and 11 tests shall be measured only for initial qualification and after
process or design changes which may affect dynamic performance.
e. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. The test vectors used to verify
the truth table shall test all possible input to output logic patterns. For device classes B, S, Q, and V, subgroups 7 and
8 shall include verifying the functionality of the device.
4.4.2 Group B inspection. When applicable, the group B inspection end-point electrical parameters shall be as specified in
table II herein. For device class S steady steady-state life tests, the test circuit shall be maintained by the manufacturer and
shall be made available to the acquiring or preparing activity upon request.
4.4.3 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
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4.4.3.1 Additional criteria for device class M . Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition A, B, C or D. The test circuit shall maintained by the manufacturer under document revision level control
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b. TA = +125°C, minimum.
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.3.2 Additional criteria for device classes B, S, Q, and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB,
in accordance with MIL-PRF-38535, and shall be made available to the acquiring or preparing activity upon request. The test
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
4.4.4 Group D inspection. Group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.5 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a. End-point electrical parameters shall be as specified in table II herein.
b. For device classes B, S, Q, and V, the devices or test vehicle shall be subjected to radiation hardness assured tests
as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein.
c. RHA tests for device classes M, B, S, Q, and V for levels M, D, P, L, R, and F shall be performed through each level to
determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial
qualification and after design or process changes that may affect the RHA performance of the device.
d. Prior to irradiation, each selected sample shall be assembled in its qualified package. It shall pass the specified
group A electrical parameters in table I for subgroups specified in table II herein.
4.4.5.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883,
method 1019, condition A and as specified herein. Prior to and during total dose irradiation characterization and testing, the
devices for characterization shall be biased so that 50 percent are at inputs high and 50 percent are at inputs low, and the
devices for testing shall be biased to the worst case condition established during characterization. Devices shall be biased as
follows:
a. Device type 01:
(1) Inputs tested high, VCC = 5.5 V dc +5%, RCC = 10 Ω +20%, VIN = 5.0 V dc +5%, RIN = 1 kΩ +20%, and
all outputs are open.
(2) Inputs tested low, VCC = 5.5 V dc +5%, RCC = 10 Ω +20%, VIN = 0.0 V dc, RIN = 1 kΩ +20%, and all outputs
are open.
b. Device type 03:
(1) Inputs tested high, VCC = 5.5 V dc ±5%, VIN = 5.0 V dc +10%, RIN = 1 kΩ ±20%, and all outputs are open.
(2) Inputs tested low, VCC = 5.5 V dc ±5%, VIN = 0.0 V dc, RIN = 1 kΩ ±20%, and all outputs are open.
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4.4.5.1.1 Accelerated aging test. Accelerated aging shall be performed on classes M, B, S, Q, and V devices requiring an
RHA level greater than 5K rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein
and shall be the pre-irradiation end-point electrical parameter limit at 25°C ± 5°C. Testing shall be performed at initial
qualification and after any design or process changes which may affect the RHA response of the device.
4.5 Methods of inspection. Methods of inspection shall be specified as follows.
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes B, S, Q, and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Mi crocircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.1.2 Substitutability. Device classes B and Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes B, S, Q, and V. Sources of supply for device classes B, S, Q, and V are listed in
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device classes M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCI RCUIT DRAWING
SIZE
A
5962-87554
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000 REVISION LEVEL
D SHEET 23
DSCC FORM 2234
APR 97
APPENDIX A
A.1. SCOPE
A.1.1 Scope. This appendix contains the PIN substitution information to support the one part-one part number system. For
new designs, after the date of this document the new PIN shall be used in lieu of the old PIN. For existing designs prior to the
date of this document, the new PIN can be used in lieu of the old PIN. This appendix is a mandatory part of the specification.
The information contained herein is intended for compliance. The PIN substitution data shall be as follows.
A.2. APPLICABLE DOCUMENTS. This section is not applicable to this appendix.
A.3. SUBSTITUTION DATA
New PIN Old PIN
5962-8755401MEA 5962-8755401EA
5962-8755401MFA 5962-8755401FA
5962-8755401M2A 5962-87554012A
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 04-05-05
Approved sources of supply for SMD 5962-87554 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded
by the next dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8755401MEA 27014 54ACT138DMQB
5962-8755401MFA 27014 54ACT138FMQB
5962-8755401M2A 27014 54ACT138LMQB
5962-8755401BEA 27014 JM54ACT138BEA
5962-8755401BFA 3/ JM54ACT138BFA
5962-8755401B2A 3/ JM54ACT138B2A
5962-8755401SFA 3/ JM54ACT138SFA
5962-8755401SEA 3/ JM54ACT138SEA
5962-8755401S2A 3/ JM54ACT138S2A
5962R8755401BEA 27014 JM54ACT138BEA-R
5962R8755401BFA 27014 JM54ACT138BFA-R
5962R8755401B2A 27014 JM54ACT138B2A-R
5962R8755401SEA 27014 JM54ACT138SEA-R
5962R8755401SFA 27014 JM54ACT138SFA-R
5962R8755401S2A 27014 JM54ACT138S2A-R
5962-8755402MEA 3/ 54ACT11138J
5962-8755402M2A 3/ 54ACT11138FK
5962-8755403QXA F8859 54ACT138K02Q
5962-8755403QXC F8859 54ACT138K01Q
5962-8755403VXA F8859 54ACT138K02V
5962-8755403VXC F8859 54ACT138K01V
5962F8755403QXA F8859 RHFACT138K02Q
5962F8755403QXC F8859 RHFACT138K01Q
5962F8755403VXA F8859 RHFACT138K02V
5962F8755403VXC F8859 RHFACT138K01V
1/ The lead finish shown for each PIN representing a hermetic package
is the most readily available from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor to determine its availability.
2/ Caution. Do not use this number for item acquisition. Items acquired to
this number may not satisfy the performance requirements of this drawing.
3/ No longer available from an approved supplier.
Vendor CAGE Vendor name
number and address
27014 National Semiconductor
2900 Semiconductor Drive
P.O. Box 58090
Santa Clara, CA 95052-8090
F8859 ST Microelectronics
3 rue de Suisse
BP4199
35041 RENNES cedex2 - France
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
