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Document No. 70-0104-07 www. psemi.com ©2003-2009 Peregrine Semiconductor Corp. All rights reserved.
The PE 42 45 RF Swit c h is des ign ed to c over a bro ad r an ge of
applications from near DC to 4000 MHz. This switch integrates
on-board CMOS control logic with a low voltage CMOS
comp atible contro l input . Using a +3-volt no mina l po wer
supp ly voltage, a 1 dB compression point of +27 dBm can be
achieved. The PE4245 also exhibits excellent isolation of
better than 42 dB at 1000 MHz and is offered in a small 3x3
mm DFN package.
The PE4245 is manufactured on Peregrine’s UltraCMOS™
pro cess, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the econom y an d i nte gr ation of conventi on al
CMOS.
Pro duct Specificat ion
SPDT UltraCMOS™ RF Switch
DC - 4000 MHz
Product Description
Figure 1. Functional Diagram
PE4245
Features
Single 3 .0 V Power Suppl y
Low insertion loss: 0.6 dB at 1000 MHz,
0.7 dB at 2000 MHz
High isolation of 42 dB at 10 00 MHz,
32 dB at 2000 MHz
Typical 1 dB compression of +27 dBm
Single-pin CMOS logic control
Available in a 6-lead DFN package
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the outp ut of an y port of the switch when the control voltage is switched from Low to
High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (Z S = Z L = 50 )
Fig ure 2. Package Type
6-lead DFN
Parameter Conditions Minimum Typical Maximum Units
Operation Frequency1 DC 4000 MHz
Inser t io n Los s 1000 MH z
2000 MH z 0.6
0.7 0.75
0.85 dB
dB
Isolation – RFC to RF1/RF2 1000 MH z
2000 MH z 39
30 42
32 dB
dB
Isolation – R F1 to R F2 1000 MH z
2000 MH z 34
27 36
29 dB
dB
Retur n Loss 1000 MH z
2000 MH z 21
20 23
22 dB
dB
‘ON’ Switching Time CTRL to 0.1 dB final value, 2 GHz 200 ns
‘OFF’ Switching Time CTRL to 25 dB isolation, 2 GHz 90 ns
Video F eedthrough2 15 mVpp
Inp ut 1 dB C o mpre s s io n 2000 MH z 26 27 dB m
Inp ut IP 3 2000 MH z , 14 dB m 43 45 dB m
RF1
CTRL
RFC
CMOS
Control
Driver
ESD ESD
ESD
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
Page 2 of 8
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 UltraCMOS™ RFIC Solutions
Table 2 . Pin Descriptions
Table 4. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When hand ling this UltraCM OS ™ devi ce, obs erve
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latc h-Up Avoidance
Unlike conventional CMO S device s, UltraCMOS™
devices are immune to latch-up.
Table 3. Operating Ranges
Notes: 1. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Rang es
tabl e. Oper ation betw e en op er a ti ng ran ge
max imum and abs olute maximum fo r extende d
periods may redu ce reliability.
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
RF2
GND
RF1
RFC
CTRL
V
DD
4
5
6
3
2
1
Pin
No. Pin
Name Description
1 RF2 RF2 port (Note 1)
2 GND
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed so lder pa d that al so m ust
be sold ered to th e gro und pl ane for bes t
performance.
3 RF1 RF1 port (Note 1)
4 VDD Nominal 3 V supply connection.
5 CTRL
CMOS logic level:
High = RFC to RF 1 signal path
Low = RFC to RF2 signal path
6 RFC Common RF port for switch (Note 1)
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any input -0.3 VDD+
0.3 V
TST Storage temperature range -65 150 °C
PIN Input power (50) 30 dBm
VESD ESD voltage (Human Bod y
Model) 1500 V
Parameter Min Typ Max Units
VDD Power Supply Voltage 2.7 3.0 3.3 V
IDD Powe r Supply Curre nt
VDD = 3V, VCTRL = 3V 250 500 nA
Control Voltage High 0.7x
VDD V
Control Voltage Low 0.3x
VDD V
TOP Opera ti ng te m perat u re
range -40 85 °C
Control Voltage Signal Path
CTRL = CMOS High RFC to RF1
CTRL = CMOS Low RFC to RF2
Moist u re Sensiti vity L ev el
The Moisture Sensitivity Level rating for the
PE4245 in the 6-lead 3x3 DFN package is MSL1.
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 www. psemi.com
Page 3 of 8
-100
-80
-60
-40
-20
0
0 800 1600 2400 3200 4000
Isolation (dB)
Frequency (MHz)
T = -40 °C to 85 °C
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 800 1600 2400 3200 4000
Insertion Loss (dB)
Frequency (MHz)
-40°C
25°C85°C
20
30
40
50
60
20
30
40
50
60
0 800 1600 2400 3200 4000
IIP3 (dBm)
1dB Compression Point (dBm)
Frequency (MHz)
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 800 1600 2400 3200 4000
Insertion Loss (dB)
Frequency (MHz)
-40°C
25°C85°C
Typical Pe rformance Data @ 25 °C (Unless Otherwise Noted)
T = -40 °C to 85 °C
Figure 4. Insertion Loss - RFC to RF1 Figure 5. Input 1dB Compression Point and IIP3
Figure 6. Insertion Loss - RFC to RF2 Figure 7. Isolation - RFC to RF1
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
Page 4 of 8
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 UltraCMOS™ RFIC Solutions
-40
-30
-20
-10
0
0 800 1600 2400 3200 4000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
-40
-30
-20
-10
0
0 800 1600 2400 3200 4000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
-100
-75
-50
-25
0
0 800 1600 2400 3200 4000
Isolation (dB)
Frequency (MHz)
-100
-80
-60
-40
-20
0
0 800 1600 2400 3200 4000
Isolation (dB)
Frequency (MHz)
Typical Performance Data @ 25 °C
Figure 8. Isolation – RFC to RF2 Figure 9. Isolation – RF1 to RF2, RF2 to RF1
Figure 10. Return Loss – RFC to RF1, RF2 Figure 11. Return Loss – RF1, RF2
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 www. psemi.com
Page 5 of 8
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease c ustomer eval u ation of th e
PE42 45 SP DT switch. The RF common port is
connected through a 50 transmission l ine to the
top left SMA connector, J1. Port 1 and Port 2 are
conne cted th r ough 50 transmission lines to the
top two SMA connectors on the right side of the
board, J2 and J3. A through transmission line
connects SMA connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The tran smission lines we re
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric th ickness of 0.028”,
metal thickness of 0.0021” and εr of 4.4.
J6 provide s a means for contro lling DC and digita l
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device CTRL input. The fourth pin to the
right (J6-7) is connected to the device VDD input.
Figure 12. Evaluation Board Layouts
Figure 13. Evaluation Board Schematic
Peregr ine S pec ificat ion 102/0110
Peregr ine S pec ificat ion 101/0085
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
Page 6 of 8
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 UltraCMOS™ RFIC Solutions
6-lead DFN
Figure 14. Package Drawing
NOTE: The exposed solder pad (on the bottom of the package) is electrically connected to pin 2 (fused.)
06L SLP
(3x3mm)
Figure 15. Marking Specifications
4245
YYWW
ZZZZZ
YYWW = Date Code (last two digits of year and work week)
ZZZZZ = Last five digits of Lot Number
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 www. psemi.com
Page 7 of 8
Table 6. Dimensions
Dimensio n DFN 3x3 mm
Ao 3.23 ± 0.1
Bo 3.17 ± 0.1
Ko 1.37 ± 0.1
P 4 ± 0.1
W 8 +0.3, -0.1
T 0.254 ± 0.02
R7 Quantity 3000
R13 Quantity N.A.
Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lo ck Reel
6-lead DFN
Table 7. Ordering Information
Or der Code Part Marking Description Package Shipping Method
4245-51 4245 PE 4 24 5G - 0 6D FN 3x 3m m- 1 28 00 F Gr ee n 6-le ad 3x 3 mm DFN Tap e or lo os e
4245-52 4245 PE4245G-06DFN 3x3mm-3000C Green 6-lead 3x3 mm DFN 3000 units / T&R
4245-00 PE4245-EK PE4245-06DFN 3x3mm-EK Evaluation Kit 1 / Box
Figure 16. Tape and Reel Specifications
Device Orientation in Tape
Top of
Device
Pin 1
Tape Feed Dire c tion
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE4245
Page 8 of 8
©2003-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0104-07 UltraCMOS™ RFIC Solutions
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timent Maine
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Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet cont ains design target specifications f or product
development. Spec ifications and feat ures may change in
any manner without notice.
Preliminary Specification
The data sheet cont ains preliminar y data. Additional data
may be added at a later date. Peregr ine reserves the right
to change specifications at any time without notice in or der
to supply t he best possible product.
Product Specification
The data sheet con tains final data. In the event Peregrine
dec ide s to cha nge the spe c ific ations, Pereg rine will not ify
customers of the intended changes by iss u ing a DCN
(Document Change Notice).
The inform ation in this dat a sheet is believed to be reliable.
Howeve r, Peregrine assum es no liabilit y for the use of this
information. Use shall be ent irely at the user’s own risk.
No pat ent rights or licenses t o any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or syst ems intended for sur gical implant, or in other
applications int ended to support or sustain life, or in any
application in which the failure of t he Per egrine product could
create a situat ion in which personal injury or deat h might occur .
Peregr ine assum e s no liability for damages, including
consequential or incidental damages, arising out of the use of
its product s in such applications.
The Per egrine name, logo, and UTSi ar e register ed trademarks
and UltraCMOS, HaRP, Mult iSwitch and DuNE are trademarks
of Peregr ine Semiconductor Corp.
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