PCI/PCIe-7300A, cPCI-7300 80 MB/s High-Speed 32-CH Digital I/O Cards CompactPCI Introduction ADLINK's PCI/PCIe-7300A and cPCI-7300 are ultra-highspeed digital I/O card consisting of 32 digital input/output channels. High performance designs and state-of-the-art technology make these cards ideal for a wide range of applications, such as high-speed data transfer, digital pattern generation and digital pattern capture applications, and logic analyzer applications. Trigger signals are available to start the data acquisition of pattern generation. PCI-7300A Maximum Data Acquisition Rate For sustained data transfer directly from or to host memory, the maximum data acquisition rate can be 80 MB/s. The maximum data transfer rates between external device and onboard FIFO can be up to 80 MB/s for DO and 160 MB/s for DI. 80MB/s is achieved by 32-bit data width multiplied by an internal 20 MHz clock. 160 MB/s is achieved by 32-bit data width with an external 40 MHz clock for digital input channels only. The PCI/PCIe-7300A, cPCI-7300 can reach 160 MB/s throughput only when the acquired data length is less than FIFO size (16 k samples). Bus Mastering DMA The PCI/PCIe-7300A, cPCI-7300 performs high-speed data transfers between onboard FIFO and host memory using bus mastering DMA and scatter gather. When the PCI/PCIe-7300A, cPCI-7300 becomes the bus master, it takes control of the PCI/PCIe/cPCI bus, transfers data at burst speed, and then releases the bus. The host memory can be utilized as much as possible to store data when the data acquisition throughput is less than the sustained PCI bus bandwidth. PCIe-7300A Scatter Gather Support For bus master devices, the hardware has the special-design built-in support for transferring data to and from non-contiguous ranges of physical memory. The PCI/PCIe-7300A, cPCI-7300 contains multiple pairs of address and length registers, each one describing a single contiguous buffer segment. This allows the PCI/PCIe-7300A, cPCI-7300 to perform I/O using buffers that are scattered throughout DMA address space. These multiple address and count registers are often referred to as a scatter/gather list, and you can also think of these bus masters as having their own built-in mapping registers. With scatter gather support, the data transfer size is no longer a limitation, and moreover, ring buffer is easily achieved with the link list of the scattered memory. cPCI-7300 I/O Port Configurations The PCI/PCIe-7300A, cPCI-7300 is initially configured as two ports: PORT A and PORT B. Each port controls 16 digital I/O lines. The I/O ports can be configured as either input or output. According to outside device environment, the PCI/PCIe-7300A, cPCI-7300 can be configured to meet all high-speed digital I/O data transferring. PCI/PCIe-7300A, cPCI-7300 can support many different digital I/O operation modes: Features Words FIFO Words Words FIFO G REG REG x1 lane PCI Express(R) Interface (PCIe-7300A) Supports a 32-bit 5 V PCI bus (PCI-7300A) 3U Eurocard form factor, CompactPCI compliant (PICMG 2.0 R2.1) (cPCI-7300) Internal clock: The digital input and output operations are handled by internal clock and data is transferred by busmastering DMA. 32-CH 5 V/TTL digital inputs/outputs External clock: The digital input and output operations are handled by external In/Out strobe signals (DI_REQ or DO_ACK) 20 MHz (80 MB/s) maximum transfer rate and data is transferred by busmastering DMA. 8, 16, or 32-bit transfers Handshaking: Through REQ and ACK signals, the digital I/O data can have simple handshaking data transfer to guarantee no data loss. 4 auxiliary DI & 4 auxiliary DO Onboard 64 kB FIFO Pattern generation: The PCI/PCIe-7300A, cPCI-7300 reads or writes digital data at a prede termined rate. Users can control the rate Onboard programmable timer pacer clock internally via by onboard counters with 50 ns timing resolution. Timed digital input sampling controlled by internal timer or external 6 Local Bus D31..1 clock Fragmented Data FIFO Scatter Gather Physical Memory REG Independent trigger signals to start data DI acquisition and pattern generation D15..0 Scatter-gather DMA REG PCI Bus Timer PCI/PCIe Controller Supports handshaking digital I/O transfer mode Controller D15..0 REG digital pattern generation from FIFO Repeated Retrieves DO Active terminators for high-speed and longdistance Data CPU D31..1 6 data transfer REG OperatingD3..0 Systems 8254 * Windows 7/Vista/XP/2000/2003 TimerServer D7..4 * Linux Control Recommended Software & Timing * AD-Logger Block Diagram of PCI-7300A Port A (16DIO) PCI/PCIe Bus * VB.NET/VC.NET/VB/VC++/BCB/Delphi * DAQBench Driver Support * DAQPilot for LabVIEWTM * PCIS-DASK for Windows * PCIS-DASK/X for Linux 2-41 www.adlinktech.com Active Terminators Port B (16DIO) Active Terminators REG 16K Words FIFO REG 16K Words REG REG REG REG REG D15..0 D15..0 AUX DO 3..0 D3..0 AUX DI 3..0 REG D7..4 REG Control & Timing Block Diagram of PCI-7300A Timer PCI/PCIe Controller PCI Bus Controller DO D31..1 6 REG DITRIG,DIREQ DIACK DOTRIG,DOACK DOREQ Fragmented Scatter Gather Physical Me Data FIFO DI REG 16K Words FIFO D31..1 6 Local Bus CPU 8254 Timer PCI/PCIe Bus Retrieves Data High-Speed DIO Specifications Digital I/O Pin Assignment Programmable Counter Base clock: 10 MHz * 16 DI & 16 DO Timer #0 as digital input pacer * 32 DI Timer #1 as digital output pacer * 32 DO Timer #2: as interrupt source Numbers of channel (Software configurable) Compatibility: 5 V/TTL Digital logic levels * Input high voltage: 2-5.25 V Auxiliary Digital I/O * 4-CH digital inputs * Input low voltage: 0-0.8 V * Output high voltage: 2.7 V minimum * Output low voltage: 0.5 V maximum Input load * Terminator OFF - Input high current: 1 mA - Input low current: 20 mA * Terminator ON - Termination resistor: 111 - Termination voltage: 2.9 V - Input high current: 1 mA - Input low current: 22.4 mA * 4-CH digital outputs Compatibility: 5 V/TTL Data transfers: programmed I/O I/O connector: One 100-pin SCSI-II female Operating temperature: 0C to 60C Storage temperature: -20C to 80C Relative humidity: 5% to 95%, non-condensing Power requirements Device PCIe-7300A * Source current: 8 mA Transfer Characteristics Data transfers: Bus-mastering DMA with Scatter/Gather Data width: 32/16/8 bits (programmable) Data Transfer Count 2 M double words (8 MB) for non-chaining mode DMA No limitation for chaining mode (scatter/gather) DMA Max Transfer Rate DO: 80 MBytes/s, 32-bit output @ 20 MHz DI: 80 MBytes/s, 32-bit input @ 20 MHz Trigger DI_TRG for digital inputs, DO_TRG for digital outputs Compatibility: 5 V/TTL Trigger types: rising or falling edges Minimum pulse width: 32 ns Clocking Mode Internal clock * Internal clock sources: 20 MHz, 10 MHz, Timer#0 output (digital input pacer) and Timer #1 Power +5 V +12 V +3.3 V cPCI-7300 +5 V PCI-7300A Output driving capacity * Sink current: 48 mA Number of channels Onboard terminator off Onboard terminator on 830 mA typical 119 mA typical 499 mA typical 830 mA typical 1.0 A typicall 287 mA typical 543 mA typical 1.0 A typical Dimensions (not including connectors) * 179 mm x 106 mm (PCI-7300A) * 168 mm x 112 mm (PCIe-7300A) * 160 mm x 100 mm (cPCI-7300) Terminal Boards & Cables DIN-100S-01 Terminal Board with One 100-pin SCSI-II Connector and DIN-Rail Mounting (Cables are not included.) Note: Legacy DIN-502S can be replaced by two DIN-50S-01 and ACL-10252-1 (100-Pin to two 50-Pin Cable, 1 M) ACL-102100-1 100-pin SCSI-II cable (mating with AMP-787082-9), 1 M * For more information on mating cables, please refer to P2-61/62. Ordering Information PCI-7300A 80 MB/S High-Speed 32-CH Digital I/O Card GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 PB15 PB14 PB13 PB12 PB11 PB10 PB9 PB8 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 DO_ACK DO_REQ DO_TRG AUXO3 AUXO2 AUXO1 AUXO0 TERMPWR TERMPWR TERMPWR TERMPWR AUXI3 AUXI2 AUXI1 AUXI0 DI_ACK DI_REQ DI_TRG PA15 PA14 PA13 PA12 PA11 PA10 PA9 PA8 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PCIe-7300A 80 MB/S High-Speed 32-CH Digital I/O PCIe Card cPCI-7300 80 MB/s High-Speed 32-CH Digital I/O Module output (digital output pacer) External clock up to 40 MHz Handshaking Burst handshaking Updated 03-28, 2012. (c)2012 ADLINK Technology, Inc. All Rights Reserved. All specifications are subject to change without further notice. www.adlinktech.com 2-42 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: ADLINK Technology: cPCI-7300