1/9July 2001
IRF634
IRF634FP
N-CHANNEL 250V - 0.38Ω - 8A TO-220/TO-220FP
MESH OVERL AY™ MOSFET
■TYPICAL RDS(on) = 0.38 Ω
■EXTREMEL Y HIGH dv /dt CAPABIL IT Y
■100% AVALANCHE TESTED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company’s proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWIT H MODE PO WER SUPPLIES ( SMPS)
■DC-DC CONVERTERS FOR TELECOM,
INDUSTRIA L, AND LIGHTING EQUI PMENT
■IDEAL FOR MONITOR’s B+ FUNCTION
ABSOLUTE MAXIMUM RATINGS
(•) Pul se width l i mited by safe operating ar ea
TYPE VDSS RDS(on) ID
IRF634
IRF634FP 250 V
250 V < 0.45 Ω
< 0.45 Ω8 A
8 A
Symbol Parameter Value Unit
IRF634 IRF634FP
VDS Drain-source Voltage (VGS = 0) 250 V
VDGR Drain-gate Voltage (RGS = 20 kΩ)250 V
VGS Gate- sourc e Vol tage ± 20 V
IDDrain Current (continuos) at TC = 25°C 8 8(*) A
IDDrain Current (continuos) at TC = 100°C 5 5(*) A
IDM (●)Drain Current (pulsed) 32 32(*) A
PTOT Total Dissipation at TC = 25°C 80 30 W
Derating Factor 0.64 0.24 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns
VISO Insulation Withstand Voltage (DC) - 2000 V
Tstg Storage Temperature –65 to 150 °C
TjMax. Operating Junction Temperature 150 °C
(1 ) ISD≤ 8A, di / dt≤300 A/µs, VDD≤ V(BR)DSS, Tj≤TjMAX
(*) Li m i ted onl y by max i m um temperat ure allowed
INTERNAL SCHEMATIC DIAG RAM
TO-220
123
123
TO-220FP
IRF634/IRF634FP
2/9
THE RMAL D A TA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACT E RISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1.56 4.11 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
TlMaximum Lead Temperature For Soldering Purpose 300 °C
Symbol Paramet er Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max) 8A
E
AS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V) 300 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID = 250 µA, VGS = 0 250 V
IDSS Zero Gate Voltage
Drain Current (VGS = 0) VDS = Max Rating 1µA
V
DS = Max Rating, TC = 125 °C 10 µA
IGSS Gate-body Leakage
Current (VDS = 0) VGS = ±20V ±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 234V
R
DS(on) Static Drain-source On
Resistance VGS = 10V, ID = 4 A 0.38 0.45 Ω
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS > ID(on) x RDS(on)max,
ID=4A 78 S
C
iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 770 pF
Coss Output Capacitance 118 pF
Crss Reverse Transfer
Capacitance 48 pF
3/9
IRF634/IRF634FP
Safe Op erating Area for TO-220
ELECTRICAL CHARACT E RISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRA IN DIODE
Note: 1. Pul sed: Pu l se duration = 300 µs, dut y cycle 1.5 %.
2. Pulse width l i mited by safe operati ng area .
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 125 V, ID = 4 A
RG= 4.7Ω VGS = 10 V
(see test circuit, Figure 3)
13 ns
trRise Time 18 ns
QgTotal Gate Charge VDD = 200V, ID = 8 A,
VGS = 10V 37 51.8 nC
Qgs Gate-Source Charge 5.2 nC
Qgd Gate-Drain Charge 14.8 nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(Voff)
tfTurn-off- Delay Time
Fall Time VDD = 125V, ID = 4 A,
RG=4.7Ω, VGS = 10V
(see test circuit, Figure 3)
51
16 ns
ns
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross -over Time
Vclamp = 200V, ID = 8 A,
RG=4.7Ω, VGS = 10V
(see test circuit, Figure 5)
12.5
12.5
28
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 8 A
ISDM (2) Source-drain Current (pulsed) 32 A
VSD (1) Forward On Voltage ISD = 8 A, VGS = 0 1.7 V
trr Reverse Recovery Time ISD = 8 A, di/dt = 100A/µs
VDD = 30V, Tj = 150°C
(see test circuit, Figure 5)
198 ns
Qrr Reverse Recovery Charge 1.1 µC
IRRM Reverse Recovery Current 11.3 A
Safe Op erating Area for TO-220 FP
IRF634/IRF634FP
4/9
Thermal Impedence for TO-220FP
Static Drain-source On Resis tanceTransconductance
Output Characteristics Transfer Characteristics
Thermal Im pede nce for TO- 220
5/9
IRF634/IRF634FP
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temp eratu reNormalized Gate Thereshold Voltage vs Temp.
Gate Charge vs Gate-so urc e Voltage Capacitan ce Variation s
IRF634/IRF634FP
6/9
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gat e Charge test Circuit
Fig. 2: Unclam ped I nduct ive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
7/9
IRF634/IRF634FP
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
IRF634/IRF634FP
8/9
L2
A
B
D
E
H
G
L6
F
L3
G1
123
F2
F1
L7
L4
L5
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
TO-220FP MECHANICA L DATA
9/9
IRF634/IRF634FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequ ences
of use of such inform ation n or for an y infring em ent of patents or other rig hts of th ird pa rties wh ich may result fro m its use . No li cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
ar e not aut horized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
Th e ST l ogo is a trademark of STMicroelectronics
© 2001 S TMicroelect r o nics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singap ore - Spain - Sweden - Swit zerland - United Ki ngdom - U.S.A.
http://www.st.com
