AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Advanced LinCMOS Silicon-Gate
Technology
D
Easily interfaced to Microprocessors
D
On-Chip Data Latches
D
Monotonicity Over Entire A/D Conversion
Range
D
Segmented High-Order Bits Ensure
Low-Glitch Output
D
Designed to Be interchangeable With
Analog Devices AD7524, PMI PM-7524, and
Micro Power Systems MP7524
D
Fast Control Signaling for Digital Signal
Processor Applications Including Interface
With SMJ320
KEY PERFORMANCE SPECIFICATIONS
Resolution 8 Bits
Linearity error 1/2 LSB Max
Power dissipation at VDD = 5 V 5 mW Max
Settling time 100 ns Max
Propagation delay 80 ns Max
description
The AD7524M is an Advanced LinCMOS 8-bit
digital-to-analog converter (DAC) designed for
easy interface to most popular microprocessors.
The AD7524M is an 8-bit multiplying DAC with input latches and with a load cycle similar to the write cycle of
a random access memory. Segmenting the high-order bits minimizes glitches during changes in the
most-significant bits, which produce the highest glitch impulse. The AD7524M provides accuracy to 1/2 LSB
without the need for thin-film resistors or laser trimming, while dissipating less than 5 mW typically.
Featuring operation from a 5-V to 15-V single supply, the AD7524M interfaces easily to most microprocessor
buses or output ports. Excellent multiplying (2 or 4 quadrant) makes the AD7524M an ideal choice for many
microprocessor-controlled gain-setting and signal-control applications.
The AD7524M is characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
TACERAMIC CHIP
CARRIER
(FK)
CERAMIC DIP
(J)
–55°C to 125°C AD7524MFK AD7524MJ
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUT1
OUT2
GND
DB7
DB6
DB5
DB4
DB3
RFB
REF
VDD
WR
CS
DB0
DB1
DB2
J PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
VDD
WR
NC
CS
DB0
GND
DB7
NC
DB6
DB5
FK PACKAGE
(TOP VIEW)
OUT2
OUT1
NC
DB2
DB1 R
REF
DB4
DB3
NC
NC–No internal connection
FB
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
Data Inputs
Data Latches
13
WR
12
CS
REF 15
11654
DB7
(MSB)
RFB
16
RRR
S-8S-3S-2S-1
2R
DB6 DB5 DB0
(LSB)
2R 2R 2R 2R
R
OUT1
OUT2
GND
1
2
3
operating sequence
DB0–DB7
WR
CS
ÎÎÎ
ÎÎÎ
tw(WR)
ÎÎÎÎ
tsu(CS)
ÎÎÎÎ
ÎÎÎÎ
tsu(D)
ÎÎÎ
ÎÎÎ
th(CS)
ÎÎÎ
ÎÎÎ
th(D)
10%
10% 10%
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VDD –0.3 V to 17 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage between RFB and GND ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range, VI –0.3 V to VDD+0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference voltage range, Vref ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak digital input current, II 10 µA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, TC: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
VDD = 5 V VDD = 15 V
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
Supply voltage, VDD 4.75 5 5.25 14.5 15 15.5 V
Reference voltage, V ref ±10 ±10 V
High-level input voltage, VIH 2.4 13.5 V
Low-level input volage, VIL 0.8 1.5 V
CS setup time, tsu(CS) 40 40 ns
CS hold time, th(CS) 0 0 ns
Data bus input setup time, tsu(D) 25 25 ns
Data bus input hold time, th(D) 10 10 ns
Pulse duration, WR low, tw(WR) 40 40 ns
Operating free-air temperature, TA–55 125 –55 125 °C
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, Vref = 10 V,
OUT1 and OUT2 at GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VDD = 5 V VDD = 15 V
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
IIH
High level in
p
ut current
Full-range 10 10
µA
I
IH
High
-
le
v
el
inp
u
t
c
u
rrent
I =
DD 25°C 1 1 µ
A
IIL
Low level in
p
ut current
Full-range –10 –10
µA
I
IL
Lo
w-
le
v
el
inp
u
t
c
u
rrent
I =
25°C–1 –1 µ
A
OUT1 DB0–DB7 at 0,
WR and CS at 0 V Full-range ±400 ±200
Ik
Output leakage Vref = ±10 V 25°C±50 ±50
nA
I
pkg
g
current
OUT2 DB0–DB7 at VDD,
WR and CS at 0 Full-range ±400 ±200
nA
Vref = ±10 V 25°C±50 ±50
Quiescent DB0–DB7 at VIHmin or VILmax 2 2 mA
IDD Supply current
Standby
Full-range 500 500
µA
Standb
y
–
DD 25°C 100 100 µ
A
kSVS
Supply voltage sensitivity,
Full-range 0.16 0.04 %/%
k
SVS
yg y,
∆gain/∆VDD
DD =
25°C 0.002 0.02 0.001 0.02 pF
CiInput capacitance, DB0–DB7,
WR, CS VI = 0 5 5 pF
OUT1
DB0 DB7 at 0 WR and CS at0V
30 30
C
Output OUT2
DB0
–
DB7
a
t
0
,
WR
an
d
CS
a
t
0
V
120 120 p
F
C
ocapacitance OUT1
DB0 DB7 at V WR and CS at0V
120 120
pF
OUT2
DB0
–
DB7
a
t
V
DD,
WR
an
d
CS
a
t
0
V
30 30
Reference input impedance
(REF to GND) 5 20 5 20 kΩ
operating characteristics over recommended operating free-air temperature range, Vref = 10 V,
OUT1 and OUT2 at GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC = 5 V VDD = 15 V
UNIT
PARAMETER
TEST
CONDITIONS
MIN MAX MIN MAX
UNIT
Linearity error ±0.2 ±0.2 %FSR
Gain error
See Note 1
Full range ±1.4 ±0.6
%FSR
Gain
error
See
Note
1
25°C±1±0.5
%FSR
Settling time (to 1/2 LSB) See Note 2 100 100 ns
Propagation delay from digital input to
90% of final analog output current See Note 2 80 80 ns
Feedthrough at OUT1 or OUT2
V
ref
= ±10 V (100 kHz sinewave), Full range 0.5 0.5
%FSR
Feedthro
u
gh
at
OUT1
or
OUT2
ref (),
WR and CS at 0, DB0–DB7 at 0 25°C 0.25 0.25
%FSR
Temperature coef ficient of gain TA = 25°C to tmin or tmax ±0.004 ±0.001 %FSR/
°C
NOTES: 1. Gain error is measured using the internal feedback resistor. Nominal Full Scale Range (FSR) = Vref – 1 LSB.
2. OUT1 load = 100 Ω, Cext = 13 pF, WR at 0 V, CS at 0 V, DB0–DB7 at 0 V to VDD or VDD to 0 V.
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
The AD7524M is an 8-bit multiplying D/A converter consisting of an inverted R-2R ladder , analog switches, and
data input latches. Binary weighted currents are switched between the OUT1 and OUT2 bus lines, thus
maintaining a constant current in each ladder leg independent of the switch state. The high-order bits are
decoded and these decoded bits, through a modification in the R-2R ladder, control three equally weighted
current sources. Most applications only require the addition of an external operational amplifier and a voltage
reference.
The equivalent circuit for all digital inputs low is seen in Figure 1. With all digital inputs low , the entire reference
current, Iref, is switched to OUT2. The current source 1/256 represents the constant current flowing through the
termination resistor of the R-2R ladder, while the current source IIkg represents leakage currents to the
substrate. The capacitances appearing at OUT1 and OUT2 are dependent upon the digital input code. With all
digital inputs high, the off-state switch capacitance (30 pF maximum) appears at OUT2 and the on-state switch
capacitance (120 pF maximum) appears at OUT1. With all digital inputs low , the situation is reversed as shown
in Figure 1. Analysis of the circuit for all digital inputs high is similar to Figure 1; however , in this case, Iref would
be switched to OUT1.
Interfacing the AD7524M D/A converter to a microprocessor is accomplished via the data bus and the CS and
WR control signals. When CS and WR are both low , the AD7524M analog output responds to the data activity
on the DB0–DB7 data bus inputs. In this mode, the input latches are transparent and input data directly affects
the analog output. When either the CS signal or WR signal goes high, the data on the DB0–DB7 inputs are
latched until the CS and WR signals go low again. When CS is high, the data inputs are disabled regardless
of the state of the WR signal.
The AD7524M is capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant or 4-quadrant multiplication are shown in Figures 2 and 3. Input coding for unipolar and bipolar
operation are summarized in Tables 1 and 2, respectively.
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
REF OUT2
OUT1
RFB
R
120 pF
30 pF
I1kg
1/256
I1kg
Figure 1. AD7524M Equivalent Circuit With All Digital Inputs Low
+
–Output
RA = 2 kΩ
(see Note A)
WR
CS
DB0–DB7
Vref
C (see Note B)
RB
VDD
GND
OUT2
OUT1
RFB
Figure 2. Unipolar Operation (2-Quadrant Multiplication)
20 kΩ
–
+
+
–
20 kΩ
5 kΩ
10 kΩ
RA = 2 kΩ
(see Note A)
Output
WR
CS
DB0–DB7
Vref
C (see Note B)
RB
VDD
GND OUT2
OUT1
RFB
Figure 3. Bipolar Operation (4-Quadrant Operation)
NOTES: A. RA and RB used only if gain adjustment is required.
B. C phase compensation (10 – 15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
Table 1. Unipolar Binary Code
DIGITAL INPUT
(see NOTE 3) ANALOG OUTPUT
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
–Vref (255/256)
–Vref (129/256)
–Vref (128/256) = –V ref /2
–Vref (127/256)
–Vref (1/256)
0
NOTES: 3. LSB = 1/256 (V ref).
Table 2. Bipolar (Offset Binary) Code
DIGITAL INPUT
(see NOTE 4) ANALOG OUTPUT
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
Vref (127/128)
Vref (128)
0
–Vref (128)
–Vref (127/128)
–Vref
NOTES: 4. LSB = 1/128 (V ref).
microprocessor interfaces
A0–A15
Z-80A
IORQ
Address Bus
Decode
Logic
OUT2
OUT1
CS
WR
DB0–DB7
Data Bus
WR
D0–D7
AD7524M
Figure 4. AD7524M–Z-80A Interface
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
VMA
Φ2
A0–A15
6800
Address Bus
Decode
Logic
Data Bus
D0–D7
OUT2
OUT1
CS
WR
DB0–DB7
AD7524M
Figure 5. AD7524M–6800 Interface
WR
AD0–AD7
ALE
A8–A15
8051
Address Bus
Decode
Logic
OUT2
OUT1
CS
WR AD7524M
8-Bit
Latch
Address/Data Bus
DB0–DB7
Figure 6. AD7524M–8051 Interface
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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