TPD2005F
2005-06-09
1
TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS Integrated Circuit
TPD2005F
Low-Side Power Switch Array (8 Channels) for Motors, Solenoids, and Lamp Drivers
The TPD2005F is an 8-channel high-side switch array for vertical power
MOS FET output. A monolithic power IC, it can directly drive a power
load from a CMOS or TTL logic circuit (such as an MPU). It offers
overcurrent and overtemperature protection functions.
Features
A high-side switch array incorporating an N-channel power MOS FET
(1.2 max.) and an 8-channel charge pump
Can directly drive a power load from a microprocessor.
Built-in protection against thermal shutdown protection and
overcurrent protection
8-channel access enables space-saving design
High operating voltage : 40 V
Low on resistance : 1.2 max. (@VDD = 12 V, IO = 0.5 A (per channel))
Supports parallel operation.
Low operating current : 5 mA max. (@VDD = 40 V, VIN = 0 V)
Supplied in an SSOP-24 package (300 mil) in embossed taping.
Pin Assignment Marking
Note: Due to its MOS structure, this product is sensitive to static electricity.
Weight: 0.29g (typ.)
1 VDD
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
VDD
GND
N.C.
N.C.
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
N.C.
N.C.
(top view)
TPD2005F
Lot No.
A dot indicates
lead (Pb)-free package or
lead (Pb)-free finish.
Part No. (or abbreviation code)
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Block Diagram
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Pin Description
Pin No. Symbol Description
1 VDD Power supply pin; in common with the pin No.12 internally.
2 GND GND pin; in common with the pin No.11 internally.
3 IN1 Control input pin for channel 1 and built-in pull-down resistor (100 k typ.)
4 IN2 Control input pin for channel 2 and built-in pull-down resistor (100 k typ.)
5 IN3 Control input pin for channel 3 and built-in pull-down resistor (100 k typ.)
6 IN4 Control input pin for channel 4 and built-in pull-down resistor (100 k typ.)
7 IN5 Control input pin for channel 5 and built-in pull-down resistor (100 k typ.)
8 IN6 Control input pin for channel 6 and built-in pull-down resistor (100 k typ.)
9 IN7 Control input pin for channel 7 and built-in pull-down resistor (100 k typ.)
10 IN8 Control input pin for channel 8 and built-in pull-down resistor (100 k typ.)
11 GND GND pin; in common with the pin No.2 internally.
12 VDD Power supply pin; in common with the pin No.1 internally.
13 N.C.
14 N.C.
15 OUT8 Output pin for channel 8
16 OUT7 Output pin for channel 7
17 OUT6 Output pin for channel 6
18 OUT5 Output pin for channel 5
19 OUT4 Output pin for channel 4
20 OUT3 Output pin for channel 3
21 OUT2 Output pin for channel 2
22 OUT1 Output pin for channel 1
23 N.C.
24 N.C.
Timing Chart
Note: The overheating detector circuits feature hysteresis. After overheating is detected, normal operation is
restored only when the junction temperature falls by the hysteresis amount (1C typ.) in relation to the
overheating detection temperature.
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Trut h Table
Input Signal Output Signal State
L L
H H
Normal
L L
H Internally limited
Overcurrent
L L
H L
Overtemperature
Maximum Ratings (Ta = 25°C)
Characteristic Symbol Rating Unit
Supply voltage VDD 45 V
Input voltage VIN 0.5 ~ 7 V
Drain-source voltage VDS 60 V
Output current IO Internally
limited A
0.8
Power dissipation
(operating all channels, ta = 25°C) PT
1.2 (Note)
W
Single pulse avalanche energy EAS 10 mJ
Operating temperature Topr 40 ~ 85 °C
Junction temperature Tj 150 °C
Storage temperature Tstg 55 ~ 150 °C
Thermal Characteristics
Characteristic Symbol Rating Unit
156.3
Thermal resistance junction to ambient
(Operating all channels, Ta = 25°C) ΣRth (j-a)
104.2 (Note)
°C / W
Note: 60 mm × 60 mm × 1.6 mm when a device is mounted on a glass epoxy PCB (DC).
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Electrical Characteristics
(Unless otherwise specified, VDD = 8 ~ 40V, Tj = 25°C)
Characteristic Symbol
Test
Cir-
cuit
Test Condition Min Typ. Max Unit
Operating supply voltage VDD 8 40 V
Supply current IDD V
DD = 40 V, VIN = 0 V 5 mA
“L” level VIL 1.5
Input voltage
“H” level VIH 3.5
V
IIL V
DD = 24 V, VIN = 0 V 10 10
Input current
IIH V
DD = 24 V, VIN = 5V 50 200
µA
On resistance RDS (ON) V
DD = 12 V, IO = 0.5 A 0.9 1.2
Output leakage current IOL V
DD = 40 V, VIN = 0 V 100 µA
Overcurrent protection IS 1 3 A
TSD 160
Thermal shutdown
TSD 10
°C
tON 11 200
Switching time
tOFF
1 VDD = 12 V, RL = 24
4 50
µs
Description of Protector Circuit
(1) Overtemperature Protection
There are four built-in overheating detector circuits, one each for channels 1 and 2; channels 3 and 4;
channels 5 and 6; and channels 7 and 8, respectively. The circuit logic is such that, when any of the four
detectors detects overheating, the circuit turns off the output of both its channels(for example, both
channels 1 and 2).
The overheating detector circuits feature hysteresis. After overheating is detected, normal operation is
restored only when the junction temperature falls by the hysteresis amount (10°C typ.) in relation to the
overheating detection temperature.
(2) Overcurrent Protection
When overcurrent is detected, the overcurrent limiter function limits the output current. Normal operation
is restored when the load current drops below the overcurrent detection value.
Test Circuit
Switching Time
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PULSE WIDTH tw (s)
TRANSIENT THERMAL RESITANCE
rth (/W)
60mm×60mm×1.6mm
when a device is mounted
on glass epoxy PCB.
(operating all channels)
Measuring single pulse
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Caution on Usage
1. As protection against reverse connection of batteries is not provided, take protective measures using external
circuits.
2. As a negative bias protector circuit is not built into the output pins, if negative bias is applied to the output
pins, be sure to connect a freewheel diode between OUT and GND.
Moisture-Proof Packing
After the pack is opened, use the devices in a 30°C, 60% RH environment, and within 48 hours.
Embossed-tape packing cannot be baked. Devices so packed must be within their allowable time limits after
unpacking, as specified on the packing.
Standard tape packing quantity: 2000 devices / reel (EL1)
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Package Dimensions
SSOP24-P-300-1.00C Unit: mm
Weight: 0.29g (typ.)
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030619EBA
RESTRICTIONS ON PRODUCT USE