R08DS0132EJ0100 Rev.1.00 Page 1 of 19
Aug 31, 2015
1. V
DD
1
2. V
IN+
3. V
IN
–
4. GND1
5. GND2
6. V
OUT
–
7. V
OUT+
8. V
DD
2
PIN CONNECTION
(Top View)
12 43
6587
SHIELD
+
–
+
–
Preliminary Data Sheet
PS8352AL2
ANALOG OUTPUT TYPE
OPTICAL COUPLED ISOLATION AMPLIFIER
DESCRIPTION
The PS8352AL2 is an optically coupled isolation amplifier that uses an IC with a high-accuracy sigma-delta A/D
converter and a GaAIAs light-emitting diode with high-speed response and high luminance efficiency on the input side,
and an IC with a high-accuracy D/A converter on the output side.
The PS8352AL2 is designed specifically for high common mode transient immunity (CMTI) and high linearity (non-
linearity). The PS8352AL2 is designed for current and voltage sensing.
FEATURES
Non-linearity (N L200 = 0.35% MAX.)
High common mode transient immunity (CMTI = 10 kV/
s MIN.)
High isolati on vol t a ge (BV = 5 000 Vr.m .s.)
Gain tolerance (G = 7.92 to 8.08 (1%))
Gain: 8 V/V TYP.
Package: 8-pin DIP lead bending type for long creepage distance
for surface mount (L2)
Embossed tape product: PS8352AL2-E3: 2 000 pcs/reel
Pb-Free product
Safety standards
• UL approved: No. E72422
• CSA approved: No. CA 101391 (CA5A, CAN/CSA-C22.2 60065, 60950)
• DIN EN 60747-5-5 (VDE 0884-5) approved (Option)
APPLICATIONS
AC Servo, inverter
Solar power conditioner
Measurement equipment
Start of mass production
2015-09
R08DS0132EJ0100
Rev.1.00
A
ug 31, 2015
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 2 of 19
Aug 31, 2015
PACKAGE DIMENSIONS (UNIT: mm)
Lead Bending Type (Gull-wing) For Long Creepage Distance For Surface Mount (L2)
8
1
5
4
5.85±0.25
6.8±0.25
(0.82)
3.5±0.2
3.7±0.25
1.27
0.4±0.1
0.25
M
11.5±0.3
0.75±0.25
(7.62)
0.25±0.15
0.2±0.15
S
0.1 S
Weight: 0.316g (typ.)
PHOTOCOUPLER CONSTRUCTION
Parameter Unit (MIN.)
Air Distance 8 mm
Outer Creepage Distance 8 mm
Isolation Distance 0.4 mm
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 3 of 19
Aug 31, 2015
MARKING EXAMPLE
ORDERING INFORMATION
Part Number Order Number Solder Plating
Specification Packing Style Safety Standard
Approval Application
Part Number*1
PS8352AL2 PS8352AL2-AX Pb-Free Magazine case 50 pcs Standard products PS8352AL2
PS8352AL2-E3 PS8352AL2-E3-AX (Ni/Pd/Au) Embossed Tape 1 000
pcs/reel
(UL, CSA approved)
PS8352AL2-V PS8352AL2-V-AX Magazine case 50 pcs UL, CSA approved
PS8352AL2-V-E3 PS8352AL2-V-E3-AX Embossed Tape 1 000
pcs/reel
DIN EN 60747-5-5
(VDE 0884-5)
2011-11 approved
(Option)
*1 For the application of the Safety Standard, following part number should be used.
9332
R
N304
3N 04
No. 1 pin
Mark
Year Assembled
(Last 1 Digit)
Rank Code
Week Assembled
Assembly Lot
Type Number
Company Initial
8352
A
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 4 of 19
Aug 31, 2015
ABSOLUTE MAXIMUM RATINGS (TA = 25C, unless otherwise specified)
Parameter Symbol Ratings Unit
Operating Ambient Temperature TA –40 to +110 C
Storage Temperature Tstg –55 to+125 C
Supply Voltage VDD1, VDD2 0 to 5.5 V
Input Voltage VIN, VIN –2 to VDD1+0.5 V
2 Seconds Transient Input Voltage VIN, VIN –6 to VDD1+0.5 V
Output Voltage VOUT, VOUT –0.5 to VDD2+0.5 V
Isolation Voltage*1 BV 5 000 Vr.m.s.
*1 AC voltage for 1 minute at TA = 25C, RH = 60% between input and output.
Pins 1-4 shorted together, 5-8 shorted together.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol MIN. MAX. Unit
Operating Ambient Temperature TA –40 110 C
Supply Voltage VDD1, VDD2 4.5 5.5 V
Input Voltage
(Accurate and Linear) *1
VIN, VIN –200 200 mV
*1 Using VIN = 0 V (to be connected to GND1) is recommended. Avoid using VIN of 2.5 V or more, because the
internal test mode is activated when the voltage VIN reaches more than 2.5 V.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 5 of 19
Aug 31, 2015
ELECTRICAL CHARACTERISTICS (DC Characteristics)
(TYP.: TA = 25C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Input Offset Voltage Vos TA = 25C 2 0.25 2 mV
3 0.25 3
Input Offset Voltage Drift
vs. Temperature
dVos/dTA 1.6 10
V/C
Gain *1 G
200 mV VIN 200 mV,
TA = 25C
7.92 8 8.08 V/V
Gain Drift vs. Temperature dG/dTA 0.0006 V/VC
VOUT Non-linearity (200 mV) *2 NL200 200 mV VIN 200 mV 0.014 0.35 %
VOUT Non-linearity (200 mV) Drift
vs. Temperature
dNL200/dT
A
0.0001 %/C
VOUT Non-linearity (100 mV) *2 NL100 100 mV VIN 100 mV 0.011 0.2 %
Maximum Input Voltage before
VOUT Clipping
VINMAX. 320 mV
Input Supply Current IDD1 V
IN = 400 mV 13.5 16 mA
Output Supply Current IDD2 V
IN = 400 mV 7.8 16 mA
Input Bias Current IIN V
IN = 0V 1 0.65 1
A
Input Bias Current Drift
vs. Temperature
dIIN/dTA 0.3 nA/C
Low Level Saturated Output
Voltage
VOL V
IN = 400 mV 1.29 V
High Level Saturated Output
Voltage
VOH V
IN = 400 mV 3.8 V
Output Voltage (VIN = VIN = 0 V) VOCM V
IN = VIN = 0 V 2.2 2.55 2.8 V
Output Short-circuit Current IOSC 20 mA
Equivalent Input Resistance RIN 450 k
VOUT Output Resistance ROUT 4
Input DC Common-Mode
Rejection Ratio*3
CMRRIN 76 dB
*1 The differential output voltage (VOUT+ VOUT) with respect to the differential input voltage (VIN+ VIN), where VIN+ =
200 mV to 200 mV and VIN = 0 V) is measured under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon
the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least
squares.
*2 The differential output voltage (VOUT+ VOUT) with respect to the differential input voltage (VIN+ VIN) is measured
under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon the resulting chart, the optimum line is obtained by
using the method of least squares. Non-linearity is defined as the ratio (%) of the optimum line obtained by
dividing [Half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage].
For example, if the differential output voltage is 3.2 V, and the peak to peak value of the (residual) deviation is
22.4 mV, while the input VIN+ is 200 mV, the output non-linearity is obtained as follows:
NL200 = 22.4/(2 3 200) = 0.35%
*3 CMRRIN is defined as the ratio of the differential signal gain (when the differential signal is applied between the
input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). This
value is indicated in dB.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 6 of 19
Aug 31, 2015
ELECTRICAL CHARACTERISTICS (AC Characteristics)
(TYP.: TA = 25C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
VOUT Bandwidth (3 dB) fC V
IN = 200 mVp-p, sine wave 50 100 kHz
VOUT Noise NOUT V
IN = 0 V 15.6 mVr.m.s.
VIN to VOUT Signal Delay (50 to 10%) tPD10 V
IN = 0 to 150 mV step 2.4 3.3
s
VIN to VOUT Signal Delay (50 to 50%) tPD50 4.2 5.6
VIN to VOUT Signal Delay (50 to 90%) tPD90 6.1 9.9
VOUT Rise Time/Fall Time (10 to 90%) tr/tf V
IN = 0 to 150 mV step 3.1 6.6
s
Common Mode Transient Immunity*1 CMTI
VCM = 0.5 kV, tr = 20 ns,
TA = 25C
10 28 kV/
s
Power Supply Noise Rejection*2 PSR f = 1 MHz 40 mVr.m.s.
*1 CMTI is tested by applying a pulse that rises and falls suddenly (VCM = 0.5 kV) between GND1 on the input side
and GND2 on the output side (pins 4 and 5) by using the circuit shown in Fig. 9 CMTI Test Circuit. CMTI is
defined at the point where the differential output voltage (VOUT+ VOUT) fluctuates 200 mV (>1
s) or more from the
average output voltage.
*2 This is the value of the transient voltage at the differential output when 1 Vp-p, 1 MHz, and 40 ns rise/fall time
square wave is applied to both VDD1 and VDD2.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 7 of 19
Aug 31, 2015
TEST CIRCUIT
Fig. 1 V
OS
Test Circuit
Fig. 2 NL200, G Test Circuit
Fig. 3 I
DD
1 Test Circuit Fig. 4 I
DD
2 Test Circuit
V
DD1
V
DD2
10 kΩ
10 kΩ
0.1 F
μ
SHIELD
+
–
+
–
0.1 F
μ
0.47 F
μ
0.47 F
μ
V
OUT
+15 V
–15 V
0.1 F
μ
0.1 F
μ
AD624CD
(x100)
V
DD1
V
IN
V
DD2
10 kΩ
10 kΩ
0.1 F
μ
SHIELD
+
–
+
–
0.1 F
μ
0.47 F
μ
0.01 F
μ
0.47 F
μ
0.47 F
μ
10 kΩ
13.2 Ω
404 Ω
+15 V
–15 V
0.1 F
μ
0.1 F
μ
AD624CD
(x4)
V
OUT
+15 V
–15 V
0.1 F
μ
0.1 F
μ
AD624CD
(x10)
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
0.01 F
μ
SHIELD
+
–
+
–
1
5 V
I
DD
1
400 mV
2
3
4
8
7
6
5
0.1 F
μ
0.01 F
μ
SHIELD
+
–
+
–
1
5 V
–
400 mV
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V
I
DD
2
−
+
−
+
−
+
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 8 of 19
Aug 31, 2015
Fig. 5 I
IN+
Test Circuit
Fig. 6 V
OUT
Test Circuit
V
OL
V
OCM
V
OH
0.01 F
μ
SHIELD
+
–
+
–
1
–
400 mV
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V 5 V
0.01 F
μ
SHIELD
+
–
+
–
1
5 V
I
IN+
2
3
4
8
7
6
5
0.1 F
μ
V
OL
0.01 F
μ
SHIELD
+
–
+
–
1
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V 5 V
V
OCM
0.01 F
μ
SHIELD
+
–
+
–
1
400 mV
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V 5 V
V
OH
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 9 of 19
Aug 31, 2015
Fig. 7 |I
OSC
| Test Circuit
Fig. 8 t
PD
Test Circuit
Fig. 9 CMTI Test Circuit
V
DD1
V
IN
V
DD2
2 kΩ
10 kΩ
2 kΩ
0.1 F
μ
SHIELD
+
–
+
–
0.1 F
μ
0.01 F
μ
+15 V
–15 V
0.1 F
μ
0.1 F
μ
NE5534
V
OUT
1
2
3
4
8
7
6
5
I
OSC
0.01 F
μ
SHIELD
+
–
+
–
1
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V
9 V
78L05
5 V
I
OSC
0.01 F
μ
SHIELD
+
–
+
–
1
2
3
4
8
7
6
5
0.1 F
μ
0.1 F
μ
5 V 5 V
10 kΩ
V
DD2
2 kΩ
2 kΩ
0.1 F
μ
0.1 F
μ
SHIELD
+
–
+
–
0.1 F
μ
PC813
V
OUT
1
2
3
4
8
7
6
5
10 kΩ
150 pF
10 kΩ
150 pF
IN OUT
V
CM
+15 V
–15 V
–+
0.1 F
μ
0.1 F
μ
μ
+
−
+
−
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 10 of 19
Aug 31, 2015
TYPICAL CHARACTERISTICS (TA = 25C, unless otherwise specified)
Ambient Temperature Ta (°C)
Supply Voltage V
DD1
, V
DD2
(V)
Supply Voltage V
DD1
, V
DD2
(V)
Ambient Temperature Ta (°C)
Ambient Temperature Ta (°C)
Supply Voltage V
DD1
, V
DD2
(V)
INPUT OFFSET VOLTAGE vs.
AMBIENT TEMPERATURE
GAIN vs. AMBIENT TEMPERATURE
NON-LINEARITY vs.
AMBIENT TEMPERATURE
GAIN vs. SUPPLY VOLTAGE
NON-LINEARITY vs.
SUPPLY VOLTAGE
Input Offset Voltage V
OS
(mV)
Input Offset Voltage V
OS
(mV)
Gain G (V/V)
Non-linearity NL200 (%)
Non-linearity NL200 (%) Gain G (V/V)
INPUT OFFSET VOLTAGE vs.
SUPPLY VOLTAGE
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
-50 -25 0 25 50 75 100 125 -2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
4.5 4.75 5 5.25 5.5
7.8
7.9
8.0
8.1
8.2
-50 -25 0 25 50 75 100 125 7.8
7.9
8.0
8.1
8.2
4.5 4.75 5 5.25 5.5
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
-50 -25 0 25 50 75 100 125 0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
4.5 4.75 5 5.25 5.5
V
DD1
= V
DD2
= 5 V
V
IN+
= V
IN-
= 0 V
V
IN+
= V
IN-
= 0 V
V
DD1
= V
DD2
= 5 V
V
IN+
= -200 mV to +200 mV,
V
IN-
= 0 V
V
IN+
= -200 mV to +200 mV,
V
IN-
= 0 V
V
DD1
= V
DD2
= 5 V
V
IN+
= -200 mV to +200 mV,
V
IN-
= 0 V
V
IN+
= -200 mV to +200 mV,
V
IN-
= 0 V
Remark The graphs indicate nominal characteristics.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 11 of 19
Aug 31, 2015
Input Voltage V
IN+
(V)
Frequency f (Hz)
Supply Voltage V
DD1
, V
DD2
(V)
Input Voltage V
IN
(V)
Ambient Temperature Ta (°C)
Input Voltage V
IN
(V)
OUTPUT VOLTAGE vs. INPUT VOLTAGE
INPUT CURRENT vs. INPUT VOLTAGE
FREQUENCY vs.
AMBIENT TEMPERATURE
GAIN vs. FREQUENCY
FREQUENCY vs. SUPPLY VOLTAGE
Output Voltage V
O
(V)
Supply Current I
DD
(mA)
Input Current I
IN+
(µA)
Frequency f
C
-3 dB (Hz)
Frequency f
C
-3 dB (Hz) Gain G
V
(dB)
SUPPLY CURRENT vs. INPUT VOLTAGE
1
1.5
2
2.5
3
3.5
4
-0.4 -0.2 0 0.2 0.4 0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
16.0
-0.4 -0.2 0.0 0.2 0.4
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
-0.4 -0.2 0.0 0.2 0.4 -8
-7
-6
-5
-4
-3
-2
-1
0
1
10 100 1000 10000 100000 1000000
0.0
20.0
40.0
60.0
80.0
100.0
120.0
-50 -25 0 25 50 75 100 125 0.0
20.0
40.0
60.0
80.0
100.0
120.0
4.5 4.75 5 5.25 5.5
V
OUT+
V
OUT-
I
DD1
I
DD2
V
DD1
= V
DD2
= 5 V V
DD1
= V
DD2
= 5 V
V
DD1
= V
DD2
= 5 V
V
IN-
= 0 V
V
DD1
= V
DD2
= 5 V
V
IN-
= 0 V
V
IN+
= 200 mVp-p sine wave
V
DD1
= V
DD2
= 5 V
V
IN-
= 0 V
V
IN+
= 200 mVp-p sine wave
V
DD1
= V
DD2
= 5 V
V
IN-
= 0 V
V
IN+
= 200 mVp-p sine wave
Remark The graphs indicate nominal characteristics.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 12 of 19
Aug 31, 2015
SIGNAL DELAY TIME vs.
AMBIENT TEMPERATURE
Signal Delay Time PD (µs)
Ambient Temperature Ta (°C)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
-50-25 0 255075100125
t
PD90
t
PD50
t
PD10
tftr
V
DD1
= V
DD2
= 5 V
V
IN-
= 0 V
V
IN+
= 0 to 150 mVstep
Remark The graphs indicate nominal characteristics.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 13 of 19
Aug 31, 2015
TAPING SPECIFICATIONS (UNIT: mm)
Tape Direction
Outline and Dimensions (Tape)
Outline and Dimensions (Reel)
Packing: 2 000 pcs/reel
330±2.0
100±1.0
2.0±0.5
13.0±0.2
R 1.0 21.0±0.8
2.0±0.5
23.9 to 27.4
Outer edge of
flange
25.5±1.0
29.5±1.0
2.0±0.1
4.0±0.1
6.35±0.1
8.0±0.1
2.0
+0.1
–0
1.5
+0.1
–0
+0.3
–0.1
4.05±0.1 1.75±0.1
24.0
4.5 MAX.
12.0±0.1
0.35
11.5±0.1
PS9332L2-E3
PS8352AL2-E3
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 14 of 19
Aug 31, 2015
RECOMMENDED MOUNT PAD DIMENSIONS (UNIT: mm)
Part Number Lead Bending ABCD
D
CB
A
PS9307L2 lead bending type (Gull-wing)
for long creepage distance (surface mount) 10.2 1.27 0.8 2.2
PS9332L2
PS8352AL2
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 15 of 19
Aug 31, 2015
NOTES ON HANDLING
1. Recommended soldering conditions
(1) Infrared reflow soldering
• Peak reflow temperature 260C or below (package surface temperature)
• Time of peak reflow temperature 10 seconds or less
• Time of temperature higher than 220C 60 seconds or less
• Time to preheat temperature from 120 to 180C 12030 s
• Number of reflows Three
• Flux Rosin flux containing small amount of chlorine (The flux with a
maximum chlorine content of 0.2 Wt% is recommended.)
120±30 s
(preheating)
220°C
180°C
Package Surface Temperature T (°C)
Time (s)
Recommended Temperature Profile of Infrared Reflow
(heating)
to 10 s
to 60 s
260°C MAX.
120°C
(2) Wave soldering
• Temperature 260C or below (molten solder temperature)
• Time 10 seconds or less
• Preheating conditions 120C or below (package surface temperature)
• Number of times One (Allowed to be dipped in solder including plastic mold portion.)
• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content
of 0.2 Wt% is recommended.)
(3) Soldering by Soldering Iron
• Peak Temperature (lead part temperature) 350C or below
• Time (each pins) 3 seconds or less
• Flux Rosin flux containing small amount of chlorine (The flux with a
maximum chlorine content of 0.2 Wt% is recommended.)
(a) Soldering of leads should be made at the point 1.5 to 2.0 mm from the root of the lead
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 16 of 19
Aug 31, 2015
(4) Cautions
• Fluxes
Avoid removing the residual flux with freon-based and chlorine-based cleaning solvent.
2. Cautions regarding noise
Be aware that when voltage is applied suddenly between the photocoupler’s input and output at startup, the output
transistor may enter the on state, even if the voltage is within the absolute maximum ratings.
USAGE CAUTIONS
1. Usage cautions
(1) This product is weak for static electricity by designed with high-speed integrated circuit so protect against static
electricity when handling.
(2) When the primary power supply (VDD1) is off and only the secondary power supply (VDD2) is being applied
(VDD1 = 0 V and VDD2 = 5 V), VOUT+ outputs a low level, and VOUT− outputs a high level (VOUT+ = 1.3 V TYP.,
VOUT– = 3.8 V TYP.), regardless of the input voltages (VIN+ and VIN−).
(3) The output level of VOUT+ and VOUT− might be unstable for several seconds immediately after the secondary
power supply (VDD2) is applied while the primary power supply (VDD1) is being applied.
2. Board designing
(1) By-pass capacitor of more than 0.1
F is used between VCC and GND near device. Also, ensure that the
distance between the leads of the photocoupler and capacitor is no more than 10 mm.
(2) Keep the pattern connected the input (VIN+, VIN-) and the output (VOUT+, VOUT-), respectively, as short as possible.
(3) Do not connect any routing to the portion of the frame exposed between the pins on the package of the
photocoupler. If connected, it will affect the photocoupler's internal voltage and the photocoupler will not
operate normally.
(4) Because the maximum frequency of the signal input to the photocoupler must be lower than the allowable
frequency band, be sure to connect an anti-aliasing filter (an RC filter with R = 68 and C = 0.01
F, for
example).
(5) The signals output from the PS8352A include noise elements such as chopping noise and quantization noise
generated internally. Therefore, be sure to restrict the output frequency to the required bandwidth by adding a
low-pass filter function (an RC filter with R =10 k and C = 150 pF, for example) to the operational amplifier
(post amplifier) in the next stage to the PS8352A.
3. Avoid storage at a high temperature and high humidity.
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 17 of 19
Aug 31, 2015
SPECIFICATION OF VDE MARKS LICENSE DOCUMENT
Parameter Symbol Spec. Unit
Climatic test class (IEC 60068-1/DIN EN 60068-1) 40/110/21
Dielectric strength
maximum operating isolation voltage
Test voltage (partial discharge test, procedure a for type test and random test)
Upr = 1.5 UIORM, Pd 5 pC
UIORM
Upr
1 130
1 695
Vpeak
Vpeak
Test voltage (partial discharge test, procedure b for all devices)
Upr = 1.875 UIORM, Pd 5 pC
Upr 2 119 Vpeak
Highest permissible overvoltage UTR 8 000 Vpeak
Degree of pollution (DIN EN 60664-1 VDE0110 Part 1) 2
Comparative tracking index (IEC 60112/DIN EN 60112 (VDE 0303 Part 11)) CTI 175
Material group (DIN EN 60664-1 VDE0110 Part 1) III a
Storage temperature range Tstg –55 to +125 °C
Operating temperature range TA –40 to +110 °C
Isolation resistance, minimum value
VIO = 500 V dc at TA = 25°C
VIO = 500 V dc at TA MAX. at least 100°C
Ris MIN.
Ris MIN.
1012
1011
Safety maximum ratings (maximum permissible in case of fault, see thermal
derating curve)
Package temperature
Current (input current IF, Psi = 0)
Power (output or total power dissipation)
Isolation resistance
VIO = 500 V dc at TA = Tsi
Tsi
Isi
Psi
Ris MIN.
175
400
700
109
°C
mA
mW
Dependence of maximum safety ratings with package temperature
0
100
200
300
400
500
600
700
800
900
1000
0 25 50 75 100 125 150 175 200
Package temp Tsi (°C)
Total Power Dissipation Psi (mW)
Input Current Isi (mA)
Psi: Total Power Dissipation
Isi: Input Current
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 18 of 19
Aug 31, 2015
Method a Destructive Test, Type and Sample Test
t
1
t
ini
t
2
t
3
t
m
t
4
V
INITIAL
=8000V
V
pr
=1808V
V
IORM
=1130V
V
t
t
1
,t
2
= 1 to 10 sec
t
3
,t
4
= 1 sec
t
m(PARTIAL DISCHARGE)
= 10 sec
t
test
= 12 sec
t
ini
= 60 sec
t
test
Method b Non-destructive Test, 100% Production Test
Vpr =2119V
VIORM =1130V
t3tpt4
V
t3,t4 = 0.1 sec
tm(PARTIAL DISCHARGE)= 1.0 sec
ttest = 1.2 sec
ttest t
PS8352AL2 Chapter Title
R08DS0132EJ0100 Rev.1.00 Page 19 of 19
Aug 31, 2015
Caution GaAs Products This product uses gallium arsenide (GaAs).
GaAs vapor and powder are hazardous to human health if inhaled or ingested, so please observe
the following points.
• Follow related laws and ordinances when disposing of the product. If there are no applicable laws
and/or ordinances, dispose of the product as recommended below.
1. Commission a disposal company able to (with a license to) collect, transport and dispose of
materials that contain arsenic and other such industrial waste materials.
2. Exclude the product from general industrial waste and household garbage, and ensure that the
product is controlled (as industrial waste subject to special control) up until final disposal.
• Do not burn, destroy, cut, crush, or chemically dissolve the product.
• Do not lick the product or in any way allow it to enter the mouth.
Notice
1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for
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