2N7635-GA - GeneSiC Semiconductor

2N7635-GA

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Normally – OFF Silicon Carbide

Junction Transistor

Features

Package

• 210°C maximum operating temperature

• Electric ally Isol ated B ase Plat e

• Gate Oxide Free SiC Switch

• Exceptional S afe Operati ng Area

• Excellent Gain Linearit y

• Compatible with 5 V TTL Gate Drive

• Temperature Independent S witc hing Performance

• Low Output Capacitance

• Positive Temperature Coef fici ent of RDS,ON

• Suitable for Connecti ng an Anti-parallel Di ode

• RoHS Compliant

TO – 257 (Isolated Base-plate Hermetic Package)

Advantages

Applications

•

Compatible with Si MOSFET/IGB T Gate Drive ICs

• > 20 µs Short-Circuit Withstand Capability

• Lowest-in-class Conduction Losses

• High Circuit Efficiency

• Minimal Input Signal Distortion

• High Amplifi er Bandwidth

•

Down Hole Oil Drilling

• Geothermal Instrumentation

• Solenoid Actuators

• General Purpose High-T emperature Switchi ng

• Amplifiers

• Solar Inverters

• Switched-Mode Power Supply (SMPS)

•

Power Factor Correction (PFC)

Table of Contents

Sectio n I: Absolute Maximum Ratings ...........................................................................................................1

Section II: Static Electrical Characteristics ....................................................................................................2

Section III: Dynamic Electrical Characteristics .............................................................................................2

Sectio n IV : F igures ...........................................................................................................................................3

Section V: Driving the 2N7635-GA ..................................................................................................................6

Sectio n VI : Package Dimensions ....................................................................................................................9

Section VII: SPICE Model Parameters ......................................................................................................... 10

Section I: Absolute Maximum Ratings

Parameter Symbol Conditions Value Unit Notes

Drain – Source Voltage

VGS = 0 V

600

Continuous Drain Current

TJ = 210°C, TC = 25 °C

Continuous Gate Current

0.5

Turn-Off Safe Operating Area RBSOA TVJ = 210°C, IG = 0.5 A,

Clamped Inductive Lo ad

D,max

= 10

@ VDS ≤ VDSmax

Short Circuit Safe Operati ng Area SCSOA

= 210°C, I

= 0.5 A, V

= 400 V,

Non Repetitive

>20 µs

Reverse Gate – Source Voltage

Reverse Drain – Source Voltage

Power Dissipation Ptot TC = 25 °C, tp > 100 ms 47 W

Storage Temperature Tstg -55 to 210 °C

VDS = 600 V

RDS(ON) = 425 mΩ

ID (Tc = 25°C) = 10 A

hFE (Tc = 25°C) = 110

2N7635-GA

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Section II: Static Electrical Characteristics

A: On State

B: Off State

C: Thermal

Section III: Dynamic Electrical Characteristics

A: Capacitance and Gate Charge

B: Switching1

1 – All times are relative to the Drain-Source Voltage VDS

Parameter Symbol Conditions

Value

Unit Notes

Min.

Typical

Max.

Drain – Source On Resistance RDS(ON) ID = 4 A, Tj = 25 °C

ID = 4 A, Tj = 175 °C

ID = 4 A, Tj = 210 °C

425

800

1180

mΩ Fig. 5

Gate – Source Saturation Voltage VGS,sat ID = 5 A, ID/IG = 40, Tj = 25 °C

ID = 5 A, ID/IG = 30, Tj = 175 °C

3.45

3.22

V Fig. 7

DC Current Gain hFE VDS = 5 V, ID = 5 A, Tj = 25 °C

VDS = 5 V, ID = 5 A, Tj = 210 °C

110

– Fig. 5

Drain Leakage Current IDSS VDS = 600 V, VGS = 0 V, Tj = 25 °C

VDS = 600 V, VGS = 0 V, Tj = 175 °C

VDS = 600 V, VGS = 0 V, Tj = 210 °C

0.1

μA Fig. 8

Gate Leakage Current

VSG = 20 V, Tj = 25 °C

Thermal resistanc e, junct i on - case

RthJC

4.18

°C/W

Parameter Symbol Conditions

Value

Unit Notes

Min.

Typical

Max.

Input Capacitance

iss

VGS = 0 V, VD = 600 V, f = 1 MHz

310

Fig. 9

Reverse Transfer/Out put Capac itance

rss

oss

VDS = 600 V, f = 1 MHz

Fig. 9

Output Capacitance Stored Energy

EOSS

= 0 V, V

= 600 V, f = 1 MHz

2.8

µJ

Fig. 10

Effective Out put Capacit ance,

time related

Coss,tr ID = constant, VGS = 0 V, VDS = 0…40 0 V 27 pF

Effective Out put Capacit ance,

energy related

Coss,er VGS = 0 V, VDS = 0…400 V 21 pF

Gate-Source Charge

QGS

VGS = -5…3 V

Gate-Drain Charge

QGD

= 0 V, V

= 0…400 V

Gate Charge - Total

+ Q

Internal Gate Resistance – zero bias RG(INT-ZERO) f

= 1 MHz, V

= 50 mV, V

= 0 V,

VGS = 0 V, Tj = 175 ºC

14.5 Ω

Internal Gate Resistance – ON

RG(INT-ON)

VGS > 2.5 V, VDS = 0 V, Tj = 175 ºC

0.37

Turn On Delay Time

td(on)

Tj = 175 ºC, VDS = 400 V,

ID = 4 A, Resistive Load

Refer to Section V for additional

driving information.

Fall Time, V

Fig. 11

Turn Off Delay Time

d(off)

Rise Time , V

Fig. 12

Turn On Delay Time

td(on)

Tj = 210 ºC, VDS = 400 V,

ID = 4 A, Resistive Load

Fall Time, VDS

Fig. 11

Turn Off Delay Time

td(off)

115

Rise Time , VDS

Fig. 12

Turn-On Energy Per Pulse

Tj = 175 ºC, VDS = 400 V,

ID = 4 A, Inductive Load

Refer to Section V.

µJ

Fig. 11

Turn-Off Energy Per Pulse

off

µJ

Fig. 12,

Total Switching Energy

Etot

µJ

Turn-On Energy Per Pulse

Eon

Tj = 210 ºC, VDS = 400 V,

ID = 4 A, Inductive Load

µJ

Fig. 11

Turn-Off Energy Per Pulse

Eoff

µJ

Fig. 12

Total Switching Energy

Etot

µJ

2N7635-GA

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Section IV: Figures

A: Static Characteristic

Figure 1: Typical Ou tpu t Characteristics at 25 °C Figure 2: Typical Output Characteristics at 175 °C

Figure 3: Typical Outp ut Characteristics at 210 °C Figure 4: Drain-Sour ce Voltage vs. Gate Curren t

Figure 5: DC Current Gain and Normalized On-Resistance

vs. Temperature

Figure 6: DC Current Gain vs. Drain Current

2N7635-GA

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Figure 7: Typical G ate – Source Saturation Volta ge

Figure 8: Typical Blocking Characteristi cs

B: Dynamic Character i st ic Figures

Figure 9: Input, Output, and Reverse Transfer Capacitance Figure 10: Output Capacitance Stored Energy

Figure 11: Typical Switching Times and Turn On Energy

Losses vs. Temperature

Figure 12: Typical Switching Times and Turn Off Energy

Losses vs. Temperature

2N7635-GA

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Figure 13: Typical Hard Swi tch ed Device Power Loss vs.

Switching Frequency

Figure 14: Turn-Off Safe Operating Area

2N7635-GA

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Section V: Driving the 2N7635-GA

The 2N7635-GA is a current controlled SiC transistor which requires a positive gate current for turn-on and to remain in on-state. It may be

driven by different drive topol ogi es depending on the intended appl ication.

Table 1: Estimated Power Consumption and switching frequencies for variou s Gate Drive topologies.

Drive Topology

Gate Drive Power

Consumption

Switching

Frequency

Simple TTL

High

Low

Constant Current

Medium

High Speed – Boost Capacitor

Medium

High

High Speed – Boost Inductor

Low

High

Proportional

Lowest

Medium

Pulsed Power

Medium

N/A

A: Simple TTL Drive

The 2N7635-GA m ay be driven by 5 V TTL logic using a simple current amplification st age. The current amplifier output current must meet or

exceed the steady state gate current, IG,steady, required to operate the 2N7635-GA. An external gate resistor RG, shown in the

Figure 15 topology, sets IG,steady to the required level which is dependent on the SJT drain current ID and DC current gain hFE, RG may be

calculated from t he equation below. The value of VEC,sat c an be taken from the PNP datasheet, a partial l ist of high-t emperature PNP and NPN

transist ors opti ons is given below. High-temperature MOSFETs may also be used in the topology.

, =5.0   , () , () (,)

1.5

Figure 15: Simple TTL Gate Drive Topology

Table 2: Partial List of High-Temperatur e BJTs for TTL Gate Dr ivi ng

BJT Part Number Type Tj,max (°C)

PHPT60603PY

PNP

175

PHPT60603NY

NPN

175

2N2222

NPN

200

2N6730

PNP

200

2N2905

PNP

200

2N5883

PNP

200

2N5885

NPN

200

SiC SJT

TTL

Gate Signal

0 / 5 V

TTL i/p

inverted

G,steady

5 V

PNP

NPN

Inverting

Current

Boost

Stage

0 / 5 V

TTL o/p R

2N7635-GA

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B: High Speed Driving

For ultra high speed 2N7635-GA switching (tr, tf < 20 ns) while maintaining low gate drive losses the supplied gate current should include a

positive current peak during turn-on, a negative volt age peak during turn-off, and continuous gate current IG to remain on.

An SJT is rapidly switched f rom its bl ocking state t o on-stat e, when the necessary gat e charge for tur n-on, QG, is supplied by a burst of hi gh

gate current until the gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged. Ideally, the burst should terminate

when the drain voltage has fal l en to its on-state value in order t o avoid unnecessary drive losses. A negative voltage peak is rec ommended for

the turn-off transition in order t o ensure that t he gate current is not being supplied under high dV/ dt due to the Mill er effect. Whi le satisfactory

turn off can be achieved with VGS = 0 V, a negative VGS value m ay be used in order to speed up the turn-off transition.

B:1: High Speed, Low Loss Drive with Boost Capacitor

The 2N7635-GA may be driven using a High Speed, Low Loss Drive with Boost Capacitor topology in which multiple voltage levels, a gate

resistor, and a gate capacitor are used to provide c urrent peaks at turn-on and turn-of f for fast switching and a continuous gate current while in

on-state. As shown in Figure 16, in thi s topology two gate driver ICs are util ized. An external gate resistor RG is driven by a low voltage driver

to supply t he continuous gate current t hroughout on-state. and a gate capacitor CG is driven at a high er voltage level to suppl y a high current

peak at turn-on and turn-off. A 3 kV isolated evaluation gate drive board (GA03IDDJT30-FR4) from GeneSiC Semiconductor utilizing this

topology is commercial l y availabl e for high and low-side driving, its datas heet provides additi onal details about t his dri ve topology.

Figure 16: High Speed, Low Loss Drive with Boost Capacitor Topology

B:2: High Speed, Low Loss Drive with Boost Inductor

A High Speed, Low-Loss Driver with Boost Inductor is also capable of driving the 2N7635-GA at high-speed. It utilizes a gate drive inductor

instead of a capacitor t o provide the high-current gate current pulses IG,on and IG,off. During operation, inductor L is charged to a specified IG,on

current value then made to discharge IL into the SJT gate pin using logic control of S1, S2, S3, and S4, as shown in Figure 17. After turn on,

while the device rem ai ns on the nec essary st eady state gat e current I G,steady is s uppl i ed from source VCC through RG. P leas e refer to t he articl e

“A current -source concept for fast and efficient driving of silicon carbide transistors” by Dr. Jacek Rąbkowski for additional information on this

driving topology. 3

Figure 17: High Spe ed, Low-Loss Driver with Boost Inductor Topology

3 – Archives of Electrical Engineering. Volume 62, Issue 2, Pages 333–343, ISS N (Prin t) 00 04-0746, DOI: 10.2478/aee-2013-0026, June 2013

Gate

CGIG

SiC SJT

VGH

VGL

Gate Signal

SiC SJT D

2N7635-GA

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C: Proportional Gate Current Driving

A proportional gat e drive topology m ay be beneficial f or applications in which the 2N7635-GA will operat e over a wide range of drain current

conditi ons to lower the gate drive power consumpt ion. A proportional gat e driver relies on instant aneous drain current ID feedback to vary the

steady state gate current IG,steady supplied to the 2N7635-GA.

C:1: Voltage Controlled Proportional Driver

A voltage controlled proporti onal driver relies on a gate drive int egrated circuit t o detect the 2N7635-GA drain-source voltage VDS during on-

state to sense ID. The integrated circ uit will then increas e or decrease IG in response t o ID. This allows IG and gate drive power consumpt ion to

reduce while ID is low or for IG to increase when ID increases. A high voltage diode connected between the drain and sense protects the

integrated circuit from high-voltage when blocking. A simplified version of this topology is shown in Figure 18. Additional information will be

available in the future at http://www.genesicsemi.com/references/product-notes/.

Figure 18: Simplified Voltage Controlled Proportional Driver

C:2: Current Controlled Proportional Driver

The current controlled proportional driver relies on a low-loss transformer in the drain or source path to provide feedback of the

2N7635-GA drain current during on-state to supply IG,steady into the gate. IG,steady will increase or decrease in response to ID at a fixed forced

current gain which is set be the turns ratio of the transformer, hforce = ID / IG = N2 / N1. 2N7635-GA is initially tuned-on using a gate current pulse

supplied into an RC drive circuit to allow ID current to begin flowing. This topology allows IG,steady and the gate drive power consumption to

reduce while ID is relatively low or for IG,steady to increase when ID increases. A simplified version of this topology is shown in Figure 19.

Additional information will be available in the future at http://www.genesicsemi.com/references/product-notes/.

Figure 19: Simplified Current Controlled Proportional Driver

SiC SJT

Proportional

Gate Current

Driver D

Gate Signal

G,steady

HV Diode

Sense

Signal Output

SiC SJT D

Gate Signal

2N7635-GA

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Section VI: Package Dimensions

TO-257 PACKAGE OUTLINE

NOTE

1. CONTROLLED DIMENSION IS INC H. DIMENSION IN BRACKET IS MILLIMETER.

2. DIMENSIONS DO NOT INCLUDE END FLASH, MOLD FLASH, MATERIAL PROTRUSIONS

Revision History

Date Revision Comments Supersedes

2014/12/12 6 Updated Electrical Charact erist ics

2014/08/23 5 Updated Electrical Charact erist ics

2014/03/20 4 Updated Gate Drive Section

2014/02/11 3 Updated Electrical Charact erist ics

2013/12/19 2 Updated Gate Drive Section

2013/11/18 1 Updated Electrical Charact erist ics

2012/08/24 0 Initi al releas e

Publis hed by

GeneSiC Semiconductor, Inc.

43670 Trade Center Place Suite 155

Dulles, VA 20166

GeneSiC Semiconductor, Inc. reserves right to make changes to the product specific ations and dat a in this document without notic e.

GeneSiC disclaims all and any warranty and liabil ity arising out of use or application of any product. No license, express or implied t o any

intellect ual propert y rights is granted by this document.

Unless otherwise expressly i ndicated, GeneS i C products are not designed, test ed or authorized f or use in life-saving, medical, aircraft

navigation, comm unication, ai r t raffic control and weapons sys t ems, nor in applications where their failure may result in death, personal

injury and/or property damage.

1.132 (28.75)

1.032 (26.21)

0.537 (13.64)

0.527 (13.39)

Ø 0.150 (3.81)

0.140 (3.56) 0.420 (10.67)

0.410 (10.41)

0.665 (16.89)

0.645 (16.38)

0.035 (0.89)

0.025 (0.63)

3 places

0.1 (2.54) BSC

2 places

0.43 (10.92)

0.41 (10.41)

0.2 (5.08)

0.19 (4.82)

0.045 (1.14)

0.035 (0.89)

0.12 (3.05) BSC

1 2 3

2N7635-GA

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Section VII: SPICE Model Par amet ers

This is a secure document. Please copy this code from the SPICE model PDF file on our website

(http://www.genesicsemi.com/images/hit_sic/sjt/2N7635-GA_SPICE.pdf) into LTSPICE (version 4)

software for simulation of the 2N7635-GA.

* MODEL OF GeneSiC Semiconductor Inc.

* $Revision: 1.3 $

* $Date: 12-DEC-2014 $

* GeneSiC Semiconductor Inc.

* 43670 Trade Center Place Ste. 155

* Dulles, VA 20166

* These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY

* OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED

* TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A

* PARTICULAR PURPOSE."

* Models accurate up to 2 times rated drain current.

.model 2N7635 NPN

+ IS 9.8338E-48

+ ISE 1.0733E-26

+ EG 3.23

+ BF 130

+ BR 0.55

+ IKF 200

+ NF 1

+ NE 2.

+ RB 14.5

+ IRB 0.002

+ RBM 0.37

+ RE 0.231

+ RC 0.16

+ CJC 1.37E-10

+ VJC 3.150960833

+ MJC 0.43821105

+ CJE 2.97E-10

+ VJE 2.901930244

+ MJE 0.475141754

+ XTI 3

+ XTB -0.45

+ TRC1 1.50E-02

+ VCEO 600

+ ICRATING 10

+ MFG GeneSiC_Semiconductor

* End of 2N7635-GA SPICE Model

Mouser Electronics

Authorized Distributor

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