FAN3989 USB/Charger Detection Device with Load Switch Features Description The FAN3989 is a USB connection monitoring device used to determine if a standard USB device is connected or a battery-charging device is connected. Charger/USB Detection Device with Load Switch Charger/USB Device Detection Flag Over/Under-Voltage Detection Flag The FAN3989 sets the FLAG1 pin to logic HIGH or LOW as an indicator to the system controller that a standard USB device or a charger is connected to the USB port. The FAN3989 also monitors the VBUS for over- or undervoltage conditions. The FLAG2 pin is set LOW if VBUS is less than 3.3V or greater than 6.0V. The internal load switch control pin is set HIGH if VBUS is less than 3.3V or greater than 6.0V, turning off the PMOS switch. Load Switch Output, Up to 1.5A Charge Current VBUS Supply: 2.7V to 20V CON: 1.5pF Package: 8-Lead MLP Applications The FAN3989 is available in a very small 8-lead MLP package suitable for small board space applications, like mobile phones. Mobile Phones Handheld Devices Related Resources AN-5067 -- PCB Land Pattern Design and Surface Mount Guidelines for MLP Packages Ordering Information Part Number Operating Temperature Range Package Packing Method Quantity FAN3989MLP8X -40C to +85C 8-Lead Molded Leadless Package (MLP) Reel 3000 VOUT LS CTRL VBUS Comparator OVP UVP DD+ GND Std USB/ Charger Detect Figure 1. (c) 2007 Fairchild Semiconductor Corporation FAN3989 Rev. 1.0.8 Logic Logic FLAG 2 FLAG 1 Block Diagram www.fairchildsemi.com FAN3989 -- USB/Charger Detection Device with Load Switch February 2011 Figure 2. Pin Configuration (Top View) Figure 3. Pin Configuration (Bottom View) Pin Definitions Pin# Name Type Description 1 D+ Input USB Data Input 2 GND Input Device Ground 3 Flag2 Output Over-/Under-Voltage Flag Output 4 LSCTRL Output PMOS Switch Control - Pull-Up Connection to VBUS 5 VOUT Output Voltage Out - Connection also on Package DAP (see PCB Layout Guideline section) 6 VBUS Input 7 Flag1 Output 8 D- Input FAN3989 -- USB/Charger Detection Device with Load Switch Pin Configuration Power Input from Charger, USB Device, or Handheld Battery Charger / Standard USB Device Detect Flag USB Data Input Truth Table Connection State VBUS D- D+ FLAG1 FLAG2 LS CTRL STD USB Device 0V R to GND R to VDD LOW LOW HIGH Load switch open STD USB Device 5V R to GND R to VDD LOW HIGH LOW Load switch closed USB Charger 5V Short to D+ Short to D- HIGH HIGH LOW Normal state, load switch closed VBUS GT 6V GT 6V Short to D+ Short to D- HIGH LOW HIGH Load switch open VBUS LT 3.3V LT 3.3V Short to D+ Short to D- HIGH LOW HIGH Load switch open PC Charger 5V Open Open LOW HIGH LOW Load switch closed (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 Description www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VS DC Supply Voltage -0.3 20.0 V VIO Analog and Digital I/O -0.3 VCC+0.3 V Reliability Information Symbol TJ Parameter Min. Typ. Junction Temperature TSTG Storage Temperature Range -65 JA Thermal Resistance, JEDEC Standard, Multilayer Test Boards, Still Air Max. Unit +150 C +150 C 41 C/W Electrostatic Discharge Information Symbol ESD Parameter Max. Human Body Model, JESD22-A114 3 Charged Device Model, JESD22-C101 1 Unit FAN3989 -- USB/Charger Detection Device with Load Switch Absolute Maximum Ratings kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. TA Operating Temperature Range -40 VCC Supply Voltage Range 2.7 (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 Typ. 5.0 Max. Unit +85 C 20.0 V www.fairchildsemi.com 3 TA = 25C, VCC = 5.0V, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units 2.7 5.0 20.0 V 2.0 mA Supply VS Supply Voltage Range VS Range ICC Quiescent Supply Current VS = +5.0V, D+ D- Shorted 1.2 Power-Up Stabilization Time VS = +5.0V, D+ D- Shorted 10 tSUPPLY ms Input Characteristics CD+ CD- Input Capacitance Input Capacitance 1.5 2.0 1.5 2.0 pF pF Ioff D+ Off Leakage Current VBUS = 0V or 5V VIN on D+ = 5V 1 A Ioff D- Off Leakage Current VBUS = 0V or 5V VIN on D- = 5V 1 A Output Characteristics OVDETECT Over-Voltage Threshold Detect VS = +5.0V, Flag2 = LOW OVHYST Over-Voltage Hysteresis Voltage Sweep through Upper and Lower Trip Points UVDETECT Under-Voltage Threshold Detect VS = +5.0V, Flag2 = LOW UVHYST Under-Voltage Hysteresis Voltage Sweep through Upper and Lower Trip Points 5.8 6.2 6.5 100 3.0 3.3 V mV 3.6 100 V mV VOH FLAG1/ Minimum HIGH Output FLAG2 Voltage VS = +5.0V, IOH = -20A VOL FLAG1/ Maximum LOW Output FLAG2 Voltage VS = +5.0V, IOL = 20A 0.3 V Maximum LOW Output Voltage VS = +5.0V, IOL = 100A 0.3 V VBDSS Drain Source Breakdown Voltage VGS = 0V, ID = -250A RDSON Static Drain-Source On Resistance VGS = -5.0V, IP = 1A VOL LS_CTRL Ciss Input Capacitance Coss Output Capacitance td(on) PMOS Turn-On Delay Time td(off) PMOS Turn-Off Delay Time (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 VDS = -10V, VGS = 0V, f = 1.0MHz VDD = -5V, IP = -0.5A, VGS = -4.5V, RGEN = 6 2.4 V -20 FAN3989 -- USB/Charger Detection Device with Load Switch DC Electrical Characteristics V 186 m 330 pF 80 pF 5 s 14 s www.fairchildsemi.com 4 VCC = 8.0V- 21V VCC = 2.7V-7.0V 1.00 1.8 0.90 1.6 1.4 0.70 Icc mA mA 0.80 1.2 ICC 1 0.60 0.8 0.50 0.6 VCC 21 20 19 18 17 16 15 14 13 12 11 10 8 9 0.4 6.90 6.70 6.50 6.30 6.10 5.90 5.70 5.50 5.30 5.10 4.90 4.70 4.50 4.30 4.10 3.90 3.70 3.50 3.30 3.10 2.90 2.70 0.40 VCC Figure 4. ICC vs. VCC (2.7V-7.0V) No Load Figure 5. ICC vs. VCC (8.0V-21V) No Load RON vs VCC 192.0 190.0 m 188.0 RON 186.0 184.0 182.0 VCC Figure 6. RON vs. VCC (10 Load) 5.94 5.85 5.75 5.65 5.56 5.46 5.37 5.27 5.18 5.08 4.9 4.8 4.98 4.7 4.6 4.5 4.41 4.31 4.22 4.12 4 3.93 3.83 3.74 3.64 3.55 3.45 180.0 FAN3989 -- USB/Charger Detection Device with Load Switch Typical Performance Characteristics Figure 7. Turn-On Time (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 www.fairchildsemi.com 5 Figure 8. Figure 9. (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 Turn-Off Time FAN3989 -- USB/Charger Detection Device with Load Switch Typical Performance Characteristics (Continued) No Fault on Flag 1, Skew=65ns www.fairchildsemi.com 6 Figure 10. PC Data Running D+/D- (Flag 1 and Flag 2 at Correct Levels) Figure 11. (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 FAN3989 -- USB/Charger Detection Device with Load Switch Typical Performance Characteristics (Continued) Standard USB Charger Plug-In www.fairchildsemi.com 7 V DD Contro l 1.5K USB Transceive r Std 15K pull-dow n on D- input by US B device and 1.5K pull-u p on D+ by USB transceiver . Batter y R s en s e VOUT LSctrl VBUS 15 K V BUS Comparato r OVP UVP DD+ G nd USB Devic e Flag 2 Logi c U SB DD+ Std USB / Charge r Detec t Logi c Flag 1 GND Figure 12. Mobile Phone Battery Charging System with USB Interface complete. If D+ and D- are shorted when a charger is plugged into the USB port, the USB switch is on and pulled to VDD, which is about 3V, making both D+ and D- HIGH. Flag1 is also set HIGH, indicating that a charging device is connected to the port. If D+ and Dare connected to a standard USB device, the D+ is pulled to VDD and D- is set low (due to the 15K pulldown resistor on the USB device) and flag1 is LOW. If D+ and D- are open (floating), D+ is pulled to VDD and D- floats LOW, which makes flag1 LOW. The FAN3989 sets the FLAG1 pin to logic HIGH or LOW as an indicator to the system controller that a standard USB device or a charger is connected to the USB port. The FAN3989 also monitors the VBUS for over- or under-voltage conditions. If VBUS is less than 3.3V or greater than 6.0V, the FLAG2 pin is set LOW and the internal load switch control pin is set HIGH, turning off the PMOS switch. In a standard USB configuration, there is a switch in the USB transceiver that is always on in full-speed mode. It is on during the transition from full-speed to high-speed mode and turned off after enumeration is (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 FAN3989 -- USB/Charger Detection Device with Load Switch Applications Information www.fairchildsemi.com 8 Contro l Batter y R s en s e VOUT LSctrl VBUS V BUS Comparato r OV P UV P DD+ G nd Flag 2 Logi c U SB DD+ Std USB / Charge r Detec t Logi c Flag 1 GND 5M FAN3989 -- USB/Charger Detection Device with Load Switch Applications Information (Continued) 1M V DD Figure 13. Mobile Phone Battery Charging System without USB Interface the USB port (D+ and D- shorted), the voltage divider of 1M and 5M put a voltage of 2.3V on the D+Dinputs and flag1 is HIGH, indicating a charger is connected to port. The FAN3989 sets the FLAG1 pin to logic HIGH or LOW as an indicator to the system controller that a standard USB device or a charger is connected to the USB port. The FAN3989 also monitors the VBUS for over- or under-voltage conditions. If VBUS is less than 3.3V or greater than 6.0V, the FLAG2 pin is set LOW and the internal load switch control pin is set HIGH, turning off the PMOS switch. If the USB port is connected to a standard USB device, the D+ input is pulled up to VDD and is in parallel with the 1.5K on a USB transceiver with a parallel R value of 1.497K. The D- input is connected to a 15K pull-down by the USB device and in parallel with 5M with a parallel R value of 14.955K. This condition forces flag1 LOW. If D+ and D- are open (floating), D+ is pulled to VDD and Dfloats LOW, which forces flag1 LOW. Where a USB transceiver is not incorporated or there is a switch between the USB port and the FAN3989, external resistors are used to set the correct input logic states on the D+ and D- inputs. A 5M pulldown on the D- line and a 1M pull-up to VDD on the D+ line are recommended. If a charger is plugged into (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 www.fairchildsemi.com 9 should never be connected to the ground, power plane, or Pad2. Please also see Fairchild Semiconductor applications note AN-5067 -- PCB Land Pattern Design and Surface Mount Guidelines for MLP Packages Pad2 This exposed DAP is connected to an internal die substrate that is at a ground potential. The pad should be left floating or can be connected to ground plane. This pad should never be connected to Pad1 or the power plane. Pad1 This exposed DAP is connected to the internal FET drain and labeled VOUT on the device. The pad should be connected to VOUT pin of the device or left floating. It Figure 14. (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 PCD / Pad Layout FAN3989 -- USB/Charger Detection Device with Load Switch PCB Layout Guidelines www.fairchildsemi.com 10 FAN3989 -- USB/Charger Detection Device with Load Switch Physical Dimensions Figure 15. 8-Lead Molded Leadless Package (MLP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 www.fairchildsemi.com 11 FAN3989 -- USB/Charger Detection Device with Load Switch (c) 2007 Fairchild Semiconductor Corporation FAN3989 * Rev. 1.0.8 www.fairchildsemi.com 12