1PS8927C 09/26/08
Features
• Designed specifi cally to switch Dual-LVDS signals
• VDD = 3.3V +/-10%
• ESD tolerance on video I/O pins is up to 12kV HBM
• -3dB BW of 1.0GHz (typ)
• Low Xtalk, (-55dB typ)
• Low and Flat ON-STATE resistance (Ron = 3ohm, Ron(Flat)
= 0.5ohm, typ)
• Low input/output capacitance (Con = 6.2pF, typ)
• Packaging (Pb-free and Green):
– 80-pin BQSOP (BE)
Applications
• Routes physical layer signals for high bandwidth
Description
Pericom’s PI3LVD1012 is a 10-differential channel LVDS
mux/demux used to switch between multiple LVDS sources or
end points. With new notebook architecture allowing users the
ability to upgrade their graphics power, notebook designers need
an effective way to switch between the upgraded graphics path.
Pericom's LVDS switch allows users to switch between two
graphics processors in a single notebook, driving the internal
panel. PI3VLVD1012 can support 18bit or 24bit panels.
With the high bandwidth of ~1.2GHz, the signal integrity will
remain strong even through the long FR4 trace through the
notebook. In addition to high signal performance, the video signals
are also protected against high ESD with integrated diodes to VDD
and GND that will support up to 12kV of ESD HBM protection.
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Truth Table
SELx Ay
LYB1
HYB2
Note:
1. If x=1, then y=0─9; if x=2, then y=10─19
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2PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Block Diagram
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
10B1
11B 1
10B2
11B 2
12B1
13B1
12B2
13B2
14B1
15B1
14B2
15B2
16B1
16B2
17B1
17B2
18B1
19B1
18B2
19B2
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
0B1
1B1
0B2
1B2
2B1
3B1
2B2
3B2
4B1
5B1
4B2
5B2
6B1
6B2
7B1
7B2
8B1
9B1
8B2
9B2
LOGIC
CONTROL
SEL1
LOGIC
CONTROL
SEL2
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3PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Pin Description
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
GND
VDD
A0
A1
OE1
A2
A3
VDD
A4
A5
A6
A7
SEL1
A8
A9
VDD
GND
GND
VDD
A10
A11
A12
A13
VDD
A14
A15
A16
A17
SEL2
A18
A19
VDD
GND
GND
VDD
A0
A1
OE1
A2
A3
VDD
A4
A5
A6
A7
SEL1
A8
A9
VDD
GND
GND
VDD
A10
A11
OE2
A12
A13
VDD
A14
A15
A16
A17
SEL2
A18
A19
VDD
GND
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
2B1
3B1
2B2
3B2
4B1
5B1
GND
VDD
4B2
5B2
6B1
7B1
6B2
7B2
8B1
9B1
8B2
9B2
10B1
11B1
10B2
11B2
12B1
13B1
GND
VDD
12B2
13B2
14B1
15B1
14B2
15B2
16B1
17B1
16B2
17B2
GNDGND
GNDGND
1
280
79 0B2
1B2
1B1
0B1
39
40
19B2
18B2 44
43 18B1
19B1
80-Pin BQSOP
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41
42
41
4PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Note:
Stresses greater than those listed under MAX I MUM RAT INGS may cause
permanent damage to the de vice. This is a stress rating only and func-
tion al op er a tion of the device at these or any other conditions above those
indicated in the operational sections of this spec i fi ca tion is not implied.
Exposure to absolute max i mum rating con di tions for extended periods
may affect re li abil i ty.
Maximum Ratings
(Above which useful life may be impaired. For user guide lines,
not tested.)
DC Electrical Characteristics for Video Switching over Operating Range
(TA = –40°C to +85°C, VDD = 3.3V ±10%)
Paramenter Description Test Conditions(1) Min. Typ.(2) Max. Units
VIH Input HIGH Voltage Guaranteed HIGH level 2 - -
VVIL Input LOW Voltage Guaranteed LOW level –0.5 - 0.8
VIK Clamp Diode Voltage VDD = Max., ISELx = –18mA - –0.7 –1.2
IIH Input HIGH Current VDD = Max., VSELx = VDD --±5
μAIIL Input LOW Current VDD = Max., VSELx = GND - - ±5
IOFF Power Down Leakage Current VDD = 0V, VB = 0V, VA ≤ 3.6 - - ±1
RON Switch On-Resistance(3)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA -3-
Ω
RFLAT(ON) On-Resistance Flatness(4)
VDD = Min., Vinput @ 0V and 1.5V,
Iinput = –40mA - 0.1 -
∆RON
On-Resistance match from center
ports to any other port(4)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA - 0.2 -
Storage Temperature....................................–65°C to +150°C
Supply Voltage to Ground Potential...............–0.5V to +5.0V
DC Input Voltage............................................–0.5V to +5.5V
DC Output Current......................................................120mA
Power Dissipation...........................................................0.5W
Notes:
1. For max. or min. conditions, use appropriate value specifi ed under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
3. Measured by the voltage drop between input and output pins at indicated current through the switch.
4. This parameter is determined by device characterization but is not production tested.
Capacitance (TA = 25°C, f = 1MHz)
Parameters(4) Description Test Conditions(1) Typ.(2) Units
CIN Input Capacitance
VSELx = 0V
2.5
pFCOFF Switch I Capacitance, Switch OFF 2.2
CON Switch Capacitance, Switch ON 6.2
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5PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Notes:
1. For max. or min. conditions, use appropriate value specifi ed under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VDD=3.3V±10%, GND=0V)
Parameter Description Test Conditions Min. Typ.(2) Max. Units
XTALK Crosstalk f = 250MHz, See Fig. 2 - -55 - dB
OIRR OFF Isolation f = 250MHz, See Fig. 3 - -42 -
BW Bandwidth –3dB See Fig. 1 - 1 - GHz
Notes:
1. For max. or min. conditions, use appropriate value specifi ed under Electrical Characteristics for the applicable device type.
2. Guaranteed by design.
3. The switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time
constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical
driving signals, it adds very little propagational delay to the system. Propagational delay of the LVDS switch when used in a system is deter-
mined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.
Power Supply Characteristics
Parameters Description Test Conditions(1) Min. Typ.(2) Max. Units
IDD Quiescent Power Supply Current VDD = Max., VSELx = GND or VDD - 0.7 1.5 mA
Switching Characteristics
Paramenter Description Min. Typ.(2) Max. Units
tPD Propagation Delay(2,3) - 0.25
ns
tPZH, tPZL Line Enable Time - SEL to Input, Output 0.5 - 15
tPHZ, tPLZ Line Disable Time - SEL to Input, Output 0.5 - 9
tSK(p) Skew between opposite transitions of the same output
(tPHL - tPLH) (2) - 0.1 0.2
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6PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Test Circuit for Electrical Characteristics(1)
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. All input impulses are supplied by generators having the following characteristics: f = 10 MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
Test Circuit for Dynamic Electrical Characteristics
Switch Positions
Test Switch
tPLZ, tPZL 6.0V
tPHZ, tPZH GND
Prop Delay Open
Figure 1. Bandwidth -3dB Testing
RT10pF
CL
VDD
VIN VOUT
200-ohm
200-ohm
6.0V
Pulse
Generator D.U.T
PI3LVD1012
TR
S
HP11667A
50-ohm
50-ohm
50-ohm
HP4396B
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7PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Figure 2. Crosstalk Test Setup
Figure 3. Off Isolation Test Setup
PI3LVD1012
TR
S
HP11667A
50
50
50
HP4396B
100
100
PI3LVD1012
TR
S
HP11667A
50
50
50
HP4396B
100
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8PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Voltage Waveforms Propagation Delay Times
Switching Waveforms
Output Skew - tSK(o) Pulse Skew - tSK(p)
Voltage Waveforms Enable and Disable Times
Data In
Data Out
at Channel X
Data Out
at Channel Y
tPLHX tPHLX
3.5V
2.5V
2.5V
2.5V
I
tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I
tSK(o)
tPLHy tPHLy
VOH
VOL
VOL
VOH
1.5V
Input
Output
tPLH
tSK(p) = I tPHL – tPLH I
tPHL
3.5V
2.5V
2.5V
VOL
VOH
1.5V
tPLZ
1.25V 1.25V
2.5V
VOH
0V
VOL
VDD/2
VDD/2
tPHZ
tPZL
tPZH
Output
Output
VOL +0.3V
VOH –0.3V
VOL
VOH
SEL
Applications Information
Logic Inputs
The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output
enables or select pins may be driven low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power consumption.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd
08-0246
9PS8927C 09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Packaging Mechanical: 80-pin BQSOP (B)
3.80
4.00
0.254
.0197
0.50
5˚
Gauge Plane
.150
.157
X.XX
X.XX DENOTES DIMENSIONS
IN MILLIMETERS
.228
.244
5.80
6.20
.010
.063
.010
.016 0.254
0.406
0.803
0.811
20.40
20.60
.007
.010
0.17
0.27
40
80
x 45˚
41
1
.019
1.60
.002
.009
0.05
0.25
.078
2.0
5˚
.019
.029 0.50
0.75
.008 NOM
0.203
0.50
REF
BSC
Max
Nom
BSC
DESCRIPTION: 80-Pin, 150-Mil Wide BQSOP
PACKAGE CODE: B
DOCUMENT CONTROL NO.
PD - 1211
REVISION: D
DATE: 03/09 /05
Note:
1. Controlling dimensions in millimeters.
3. Package Outline Exclusive of Mold Flash and Metal Burr
3. Ref: JEDEC MO-154C/BC
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/.
Ordering Information
Ordering Code Package Code Package Description
PI3LVD1012BE BE Pb-free & Green, 80-pin BQSOP
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
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