HD74AC283T - Renesas Technology / Hitachi Semiconductor

HD74AC283/HD74ACT283

4-bit Binary Full Adder with Fast Carry

ADE-205-388 (Z)

1st. Edition

Sep. 2000

Description

The HD74AC283/HD74ACT283 high-speed 4-bit binary full adder with internal carry lookahead accepts

two 4-bit binary works (A0 – A3, B0 – B3) and a Carry input (C0). It generates the binary Sum outputs (S0 –

S3) and the Carry output (C4) from the most significant bit. The HD74AC283/HD74ACT283 will operate

with either active High or active Low operands (positive or negative logic).

Features

• Outputs Source/Sink 24 mA

• HD74ACT283 has TTL-Cmpatible Inputs

Pin Arrangement

GND

VCC

(Top view)

HD74AC283/HD74ACT283

Logic Symbol

C0C4

S0S1S2S3

A1A2A3

B1B2B3

Pin Names

A0 – A3A Operand Inputs

B0 – B3B Operand Inputs

C0Carry Input

S0 – S3Sum Outputs

C4Carry Output

Functional Description

The HD74AC283/HD74ACT283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C0).

The binary sum appears on the Sum (S0 – S3) and outgoing carry (C4) outputs. The binary weight of the

various inputs and outputs is indicated by the subscript numbers, representing powers of two.

20 (A0 + B0 + C0) + 21 (A1 + B1) + 22 (A2 + B2) + 23 (A3 + B3) = S0 + 2S1 + 4S2 + 8S3 + 16C4

Where (+) = plus

Interchanging inputs of equal weight does not affect the operation. Thus C0, A0, B0 can be arbitrarily

assigned to pins 5, 6 and 7 for DIPS. Due to the symmetry of the binary add function, the

HD74AC283/HD74ACT283 can be used either with all inputs and outputs active High (positive logic) or

with all inputs and outputs active Low (negative logic). See Figure a. Note that if C0 is not used it must be

tied Low for active High logic or tied High for active Low logic.

Due to pin limitations, the intermediate carries of the HD74AC283/HD74ACT283 are not brought out for

use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a

carry out from, an intermediate stage. Figure b shows how to make a 3-bit adder. Tying the operand inputs

of the fourth adder (A3, B3) Low makes S3 dependent only on, and equal to, the carry from the third adder.

Using somewhat the same principle Figure c shows a way of dividing the HD74AC283/HD74ACT283 into

a 2-bit and a 1-bit adder. The third stage adder (A2, B2, S 2) is used merely as a means of getting a carry

(C10) signal into the fourth stage (via A 2 and B2) and bringing out the carry from the second stage on S2.

Note that as long as A 2 and B2 are the same, whether High or Low, they do not influence S2. Similarly,

when A2 and B2 are the same the carry into the third stage does not influence the carry out of the third

HD74AC283/HD74ACT283

stage. Figure d shows a method of implementing a 5-input encoder, where the inputs are equally weighted.

The outputs S0, S1 and S2 present a binary number equal to the number of inputs I1 – I5 that are true. Figure

e shows one method of implementing a 5-input majority gate. When three or more of the inputs I1 – I5 are

true, the output M5 is true.

Fig. a Active HIGH varsus Active LOW Interpretation

C0A0A1A2A3B0B1B2B3S0S1S2S3C4

Logic levels L L H L H H L L HHHLLH

Active HIGH 00101100111001

Active LOW 11010011000110

Active HIGH: 0 + 10 + 9 = 3 + 16

Active LOW: 1 + 5 + 6 = 12 + 0

S0S1S2S3

A1A2A3

B1B2B3

Fig. b 3-bit Adder

C0C0C4C11

S0S1S2S3

S0S1C2S10

A1A2A3

B1B2

C10

A0A1A10

B1B10

Fig. c 2-bit and 1-bit adders

HD74AC283/HD74ACT283

C0C4

I1I2LI4I5

S1S2S3

A1A2A3B1B2B3B0

Fig. d 5-Input Encoder

C0C4

I1I2I4I5

S0S1S2

A1A2A3B1B2B3B0

Fig. e 5-Input Majority Gate

HD74AC283/HD74ACT283

Logic Diagram

S0S1S2S3C4

A0A1B0B1A2B2A3B3

Please note that this diagram is provided only for the understanding of logic operations and shoudl not be

used to estimate propagation delays.

DC Characteristics (unless otherwise specified)

Item Symbol Max Unit Condition

Maximum quiescent supply current ICC 80 µAV

IN = VCC or ground, VCC = 5.5 V,

Ta = Worst case

Maximum quiescent supply current ICC 8.0 µAV

IN = VCC or ground, VCC = 5.5 V,

Ta = 25°C

Maximum ICC/input (HD74ACT283) ICCT 1.5 mA VIN = VCC – 2.1 V, VCC = 5.5 V,

Ta = Worst case

HD74AC283/HD74ACT283

AC Characteristics: HD74AC283

Ta = +25°C

CL = 50 pF Ta = –40°C to +85°C

CL = 50 pF

Item Symbol VCC (V)*1Min Typ Max Min Max Unit

Propagation delay tPLH 3.3 1.0 11.5 15.0 1.0 16.5 ns

C0 to Sn5.0 1.0 9.5 11.5 1.0 12.5

Propagation delay tPHL 3.3 1.0 10.5 14.0 1.0 15.5 ns

C0 to Sn5.0 1.0 8.5 10.5 1.0 11.5

Propagation delay tPLH 3.3 1.0 14.0 17.0 1.0 18.5 ns

An or Bn to Sn5.0 1.0 11.5 13.5 1.0 14.5

Propagation delay tPHL 3.3 1.0 13.5 16.5 1.0 18.0 ns

An or Bn to Sn5.0 1.0 11.0 13.0 1.0 14.0

Propagation delay tPLH 3.3 1.0 9.5 12.5 1.0 15.5 ns

C0 to C45.0 1.0 7.5 9.5 1.0 10.5

Propagation delay tPHL 3.3 1.0 10.0 13.0 1.0 14.0 ns

C0 to C45.0 1.0 8.0 10.0 1.0 11.0

Propagation delay tPLH 3.3 1.0 11.5 14.5 1.0 16.0 ns

An or Bn to C45.0 1.0 9.5 11.5 1.0 12.5

Propagation delay tPHL 3.3 1.0 12.0 15.0 1.0 16.5 ns

An or Bn to C45.0 1.0 10.0 12.0 1.0 13.0

Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V

Voltage Range 5.0 is 5.0 V ± 0.5 V

HD74AC283/HD74ACT283

AC Characteristics: HD74ACT283

Ta = +25°C

CL = 50 pF Ta = –40°C to +85°C

CL = 50 pF

Item Symbol VCC (V)*1Min Typ Max Min Max Unit

Propagation delay

C0 to Sn

tPLH 5.0 1.0 11.5 13.5 1.0 14.5 ns

Propagation delay

C0 to Sn

tPHL 5.0 1.0 10.0 12.0 1.0 13.0 ns

Propagation delay

An or Bn to Sn

tPLH 5.0 1.0 13.0 15.0 1.0 16.5 ns

Propagation delay

An or Bn to Sn

tPHL 5.0 1.0 12.0 14.0 1.0 15.5 ns

Propagation delay

C0 to C4

tPLH 5.0 1.0 9.0 11.0 1.0 12.0 ns

Propagation delay

C0 to C4

tPHL 5.0 1.0 10.0 12.0 1.0 13.0 ns

Propagation delay

An or Bn to C4

tPLH 5.0 1.0 11.0 13.0 1.0 14.0 ns

Propagation delay

An or Bn to C4

tPHL 5.0 1.0 11.5 13.5 1.0 14.5 ns

Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V

Capacitance

Item Symbol Typ Unit Condition

Input capacitance CIN 4.5 pF VCC = 5.5 V

Power dissipation capacitance CPD 60.0 pF VCC = 5.0 V

HD74AC283/HD74ACT283

Package Dimensions

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

DP-16

Conforms

1.07 g

Unit: mm

6.30

19.20

16 9

81 1.3

20.00 Max

7.40 Max

7.62

0.25

+ 0.13

– 0.05

2.54 ± 0.25 0.48 ± 0.10

0.51 Min

2.54 Min 5.06 Max

0° – 15°

1.11 Max

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

FP-16DA

—

Conforms

0.24 g

Unit: mm

*Dimension including the plating thickness

Base material dimension

*0.22 ± 0.05

*0.42 ± 0.08

0.12

0.15

2.20 Max 5.5

10.06

0.80 Max

16 9

10.5 Max

+ 0.20

– 0.30

7.80

0.70 ± 0.20

0° – 8°

0.10 ± 0.10

1.15

1.27

0.40 ± 0.06

0.20 ± 0.04

HD74AC283/HD74ACT283

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

FP-16DN

Conforms

0.15 g

Unit: mm

*Dimension including the plating thickness

Base material dimension

1.27

16 9

0.15

0.25

1.75 Max 3.95

*0.22 ± 0.03

9.9

0° – 8°

10.3 Max

+ 0.10

– 0.30

6.10

+ 0.67

– 0.20

0.60

+ 0.11

– 0.04

0.14

*0.42 ± 0.08

0.635 Max

0.40 ± 0.06

0.20 ± 0.03

1.08

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

TTP-16DA

—

0.05 g

Unit: mm

*Dimension including the plating thickness

Base material dimension

0.50 ± 0.10

0° – 8°

*0.17 ± 0.05

6.40 ± 0.20

0.10

1.10 Max

0.13 M

0.65

16 9

4.40

5.00

5.30 Max

0.07

+0.03

–0.04

0.65 Max

1.0

0.20 ± 0.06

+ 0.08

– 0.07

*0.22

0.15 ± 0.04

HD74AC283/HD74ACT283

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,

Hitachi bears no responsibility for problems that may arise with third party’s rights, including

intellectual property rights, in connection with use of the information contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you have

received the latest product standards or specifications before final design, purchase or use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,

contact Hitachi’s sales office before using the product in an application that demands especially high

quality and reliability or where its failure or malfunction may directly threaten human life or cause risk

of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,

traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly

for maximum rating, operating supply voltage range, heat radiation characteristics, installation

conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used

beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other

consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without

written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor

products.

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