LT3030 Dual 750mA/250mA Low Dropout, Low Noise, Micropower Linear Regulator Description Features n n n n n n n n n n n n n n Output Current: 750mA/250mA Low Dropout Voltage: 300mV Low Noise: 20VRMS (10Hz to 100kHz) Low Quiescent Current: 120A/75A Wide Input Voltage Range: 1.7V to 20V Adjustable Output: 1.220V Reference Voltage Shutdown Quiescent Current: <1A Stable with 10F/3.3F Minimum Output Capacitor Stable with Ceramic, Tantalum or Aluminum Electrolytic Capacitors Precision Threshold for Shutdown Logic or UVLO Function PWRGD Flag for each Output Reverse Battery and Reverse Output-to-Input Protection Current Limit with Foldback and Thermal Shutdown Thermally Enhanced 20-Lead TSSOP and 28-Lead (4mm x 5mm) QFN Packages The LT(R)3030 is a dual, micropower, low noise, low dropout linear regulator. The device operates with either common or independent input supplies for each channel, over a 1.7V to 20V input voltage range. Output 1/Output 2 supply 750mA/250mA respectively with a typical dropout voltage of 300mV. With an external 10nF bypass capacitor, output noise is only 20VRMS over a 10Hz to 100kHz bandwidth. Designed for use in battery-powered systems, the low 120A/75A quiescent current makes it an ideal choice. In shutdown, quiescent current drops to less than 1A. Shutdown control is independent for each channel and its precision logic threshold allows for voltage lockout functionality. The LT3030 includes a PWRGD flag for each channel to indicate output regulation. The LT3030 optimizes stability and transient response with low ESR ceramic output capacitors, requiring a minimum of only 10F/3.3F. Applications n n n n n Internal circuitry provides reverse-battery protection, reverse-current protection, current limiting with foldback and thermal shutdown with hysteresis. The adjustable output voltage device has a 1.220V reference voltage. The LT3030 is offered in the thermally enhanced 20-lead TSSOP and 28-lead, low profile (4mm x 5mm x 0.75mm) QFN packages. General Purpose Linear Regulator Battery-Powered Systems Microprocessor Core/Logic Supplies Post Regulator for Switching Supplies Tracking/Sequencing Power Supplies L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 2.5VIN to 1.8V/1.5V Application IN1 3.3F IN2 1M OUT1 10nF LT3030 SHDN1 BYP1 SHDN2 ADJ1 10F 113k 1% VOUT1 1.8V 750mA 237k 1% 1M PWRGD1 PWRGD2 OUT2 10nF BYP2 GND ADJ2 3030 TA01a 3.3F 54.9k 1% VOUT2 1.5V 250mA 400 350 300 OUT2 250 200 OUT1 150 100 50 0 237k 1% TJ = 25C 450 DROPOUT VOLTAGE (mV) VIN 2.5V Dropout Voltage vs Load Current 500 0 75 150 225 300 375 450 525 600 675 750 OUTPUT CURRENT (mA) 3030 TA01b 3030fa For more information www.linear.com/LT3030 1 LT3030 Absolute Maximum Ratings (Note 1) IN1, IN2 Pin Voltage.................................................22V OUT1, OUT2 Pin Voltage..........................................22V Input-to-Output Differential Voltage.........................22V ADJ1, ADJ2 Pin Voltage.............................................9V BYP1, BYP2 Pin Voltage.........................................0.6V SHDN1, SHDN2 Pin Voltage.....................................22V PWRGD1, PWRGD2 Pin Voltage.....................22V, -0.3V Output Short-Circuit Duration........................... Indefinite Operating Junction Temperature (Notes 2, 12) E-/I-Grade........................................... -40C to 125C H-Grade.............................................. -40C to 150C MP-Grade........................................... -55C to 150C Storage Temperature Range QFN/TSSOP Package.............................. -65C to 150C Lead Temperature (Soldering, 10 sec) (TSSOP Only)......................................................... 300C Pin Configuration SHDN1 GND GND GND ADJ1 BYP1 TOP VIEW TOP VIEW 28 27 26 25 24 23 ADJ1 1 20 SHDN1 BYP1 2 19 PWRGD1 OUT1 3 18 IN1 17 IN1 OUT1 1 22 PWRGD1 OUT1 2 21 IN1 GND 3 20 IN1 OUT1 4 GND 4 19 GND GND 5 18 GND GND 6 17 IN2 OUT2 7 14 IN2 OUT2 7 16 IN2 OUT2 8 13 IN2 OUT2 8 15 PWRGD2 BYP2 9 12 PWRGD2 29 GND GND 5 GND 6 ADJ2 10 SHDN2 GND GND GND ADJ2 BYP2 9 10 11 12 13 14 21 GND 16 GND 15 GND 11 SHDN2 FE PACKAGE 20-LEAD PLASTIC TSSOP UFD PACKAGE 28-LEAD (4mm x 5mm) PLASTIC QFN TJMAX = 125C, JA = 33C/W, , JC = 3.4C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB TJMAX = 150C, JA = 28C/W, , JC = 10C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3030EUFD#PBF LT3030EUFD#TRPBF 3030 28-Lead (4mm x 5mm) Plastic QFN -40C to 125C LT3030IUFD#PBF LT3030IUFD#TRPBF 3030 28-Lead (4mm x 5mm) Plastic QFN -40C to 125C LT3030HUFD#PBF LT3030HUFD#TRPBF 3030 28-Lead (4mm x 5mm) Plastic QFN -40C to 150C LT3030EFE#PBF LT3030EFE#TRPBF LT3030FE 20-Lead Plastic TSSOP -40C to 125C LT3030IFE#PBF LT3030IFE#TRPBF LT3030FE 20-Lead Plastic TSSOP -40C to 125C LT3030HFE#PBF LT3030HFE#TRPBF LT3030FE 20-Lead Plastic TSSOP -40C to 150C LT3030MPFE#PBF LT3030MPFE#TRPBF LT3030FE 20-Lead Plastic TSSOP -55C to 150C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3030fa 2 For more information www.linear.com/LT3030 LT3030 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 2). PARAMETER CONDITIONS Minimum Input Voltage (Notes 3, 11) Output 1, ILOAD = 750mA Output 2, ILOAD = 250mA l l ADJ1, ADJ2 Pin Voltage (Notes 3, 4) VIN = 2V, ILOAD = 1mA Output 1, 2.2V < VIN1 < 20V, 1mA < ILOAD < 750mA Output 2, 2.2V < VIN2 < 20V, 1mA < ILOAD < 250mA l l Line Regulation (Note 3) VIN = 2V to 20V, ILOAD = 1mA l Load Regulation (Note 3) Output 1, VIN1 = 2.2V, ILOAD = 1mA to 750mA VIN1 = 2.2V, ILOAD = 1mA to 750mA l Output 2, VIN2 = 2.2V, ILOAD = 1mA to 250mA VIN2 = 2.2V, ILOAD = 1mA to 250mA l ILOAD = 10mA ILOAD = 10mA l ILOAD = 100mA ILOAD = 100mA l ILOAD = 500mA ILOAD = 500mA l ILOAD = 750mA ILOAD = 750mA l ILOAD = 10mA ILOAD = 10mA l ILOAD = 50mA ILOAD = 50mA l ILOAD = 100mA ILOAD = 100mA l ILOAD = 250mA ILOAD = 250mA l GND Pin Current (Output 1) VIN1 = VOUT1(NOMINAL) (Notes 5, 7) ILOAD = 0mA ILOAD = 10mA ILOAD = 100mA ILOAD = 500mA ILOAD = 750mA GND Pin Current (Output 2) VIN2 = VOUT2(NOMINAL) (Notes 5, 7) ILOAD = 0mA ILOAD = 10mA ILOAD = 50mA ILOAD = 100mA ILOAD = 250mA Output Voltage Noise COUT = 10F, CBYP = 10nF, ILOAD = Full Current (Note 13) BW = 10Hz to 100kHz Dropout Voltage (Output 1) VIN1 = VOUT1(NOMINAL) (Notes 5, 6, 11) Dropout Voltage (Output 2) VIN2 = VOUT2(NOMINAL) (Notes 5, 6, 11) MIN TYP MAX 1.7 1.7 2.2 2.2 V V 1.220 1.220 1.220 1.232 1.244 1.244 V V V 0.5 5 mV 2 6 10 mV mV 2 6 10 mV mV 0.13 0.20 0.28 V V 0.17 0.23 0.33 V V 0.27 0.32 0.43 V V 0.3 0.36 0.48 V V 0.14 0.20 0.28 V V 0.18 0.24 0.32 V V 0.22 0.28 0.38 V V 0.3 0.36 0.48 V V l l l l l 120 420 2 9 15 300 800 3.8 17 27 A A mA mA mA l l l l l 75 330 1 1.8 5 200 600 1.8 3.4 9 A A mA mA mA 1.208 1.196 1.196 20 ADJ1/ADJ2 Pin Bias Current (Notes 3, 8) Shutdown Threshold VOUT = Off to On VOUT = On to Off Hysteresis (Note 2) l l SHDN1/SHDN2 Pin Current (Note 10) VSHDN1, VSHDN2 = 0V VSHDN1, VSHDN2 = 20V l l 1.09 0.5 Quiescent Current in Shutdown (per Channel) VIN = 20V, VSHDN1 = 0V, VSHDN2 = 0V PWRGD Trip Point % of Nominal Output Voltage, Output Rising l PWRGD Trip Point Hysteresis (Note 2) % of Nominal Output Voltage, Output Falling PWRGD Output Low Voltage IPWRGD = 100A l PWRGD Leakage Current VSHDN = 0V, VPWRGD = 20V l 86 UNITS VRMS 30 100 nA 1.21 0.83 0.38 1.33 V V V 0 0.85 0.5 3 A A 0.3 2 A 90 94 % 150 mV 1 A 1.6 15 % 3030fa For more information www.linear.com/LT3030 3 LT3030 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 2). PARAMETER CONDITIONS Ripple Rejection VIN = 2.72V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = Full Current (Note 13) MIN TYP 50 60 dB 50 dB VIN = VOUT(NOMINAL) + 1V, VRIPPLE = 50mVRMS fRIPPLE = 1MHz, ILOAD = Full Current (Note 13) MAX UNITS Output 1, VIN1 = 6V, VOUT1 = 0V VIN1 = 2.2V, VOUT1 = -0.1V l l 1.1 800 1.4 1.7 A mA Output 2, VIN2 = 6V, VOUT2 = 0V VIN2 = 2.2V, VOUT2 = -0.1V l l 350 270 420 490 mA mA Input Reverse Leakage Current VIN = -20V, VOUT = 0V l 1 mA Reverse Output Current VOUT = 1.220V, VIN = 0V 0.5 10 A Current Limit (Note 9) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3030 is tested and specified under pulse load conditions such that TJ TA. The LT3030E is 100% tested at TA = 25C and performance is guaranteed from 0C to 125C. Performance of the LT3030E over the full -40C to 125C operating junction temperature range is assured by design, characterization and correlation with statistical process controls. The LT3030I is guaranteed over the full -40C to 125C operating junction temperature range. The LT3030MP is 100% tested and guaranteed over the -55C to 150C operating junction temperature range. The LT3030H is tested at 150C operating junction temperature. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C. Note 3: The LT3030 is tested and specified for these conditions with the ADJ1/ADJ2 pin connected to the corresponding OUT1/OUT2 pin. Note 4: Maximum junction temperature limits operating conditions. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, limit the output current range. When operating at maximum output current, limit the input voltage range. Note 5: To satisfy minimum input voltage requirements, the LT3030 is tested and specified for these conditions with an external resistor divider (two 243k resistors) for an output voltage of 2.447V. The external resistor divider adds 5A of DC load on the output. Note 6: Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage equals: VIN - VDROPOUT. Note 7: GND pin current is tested with VIN = 2.447V and a current source load. This means the device is tested while operating in its dropout region or at the minimum input voltage specification. This is the worst-case GND pin current. The GND pin current decreases slightly at higher input voltages. Total GND pin current equals the sum of output 1 and output 2 GND pin currents. Note 8: ADJ1/ADJ2 pin bias current flows into the pin. Note 9: The LT3030 contains current limit foldback circuitry. See the Typical Performance Characteristics section for current limit as a function of the VIN - VOUT differential voltage. Note 10: SHDN1 and SHDN2 pin current flows into the pin. Note 11: The LT3030 minimum input voltage specification limits dropout voltage under some output voltage/load conditions. See the curve of Minimum Input Voltage in the Typical Performance Characteristics section. Note 12: The LT3030 includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature exceeds the maximum operating junction temperature when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 13: The Full Current for ILOAD is 750mA and 250mA for Output 1 and Output 2 respectively. 3030fa 4 For more information www.linear.com/LT3030 LT3030 Typical Performance Characteristics 450 TJ = 150C TJ = 25C 250 200 TJ = -55C 150 100 50 0 0 TJ = 25C 300 250 200 150 100 50 0 75 150 225 300 375 450 525 600 675 750 OUTPUT CURRENT (mA) TJ = 150C 350 0 3030 G01 450 450 TJ = 150C TJ = 125C TJ = 25C 250 200 TJ = -55C 150 100 50 0 0 GUARANTEED DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 500 300 25 50 75 100 125 150 175 200 225 250 OUTPUT CURRENT (mA) = TEST POINTS 150 100 500 250 200 150 100 50 400 350 300 250 200 150 100 50 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 25 50 75 100 125 150 175 200 225 250 OUTPUT CURRENT (mA) 3030 G05 3030 G06 ADJ1/ADJ2 Pin Voltage VIN1 = VIN2 = 6V RL1 = RL2 = 243k; IL1 = IL2 = 5A 1.238 OUTPUT 1 VSHDN1 = VIN1 OUTPUT 2 VSHDN2 = VIN2 Quiescent Current 300 IL1 = IL2 = 1mA 1.226 1.220 3030 G07 TJ = 25C RL1 = RL2 = 243k; IL1 = IL2 = 5A VOUT1 = VOUT2 = 1.220V 250 1.232 ADJ2 ADJ1 1.214 1.208 200 150 OUTPUT 1, VSHDN1 = VIN1 100 OUTPUT 2, VSHDN2 = VIN2 50 1.202 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) IL = 250mA IL = 175mA IL = 100mA IL = 50mA IL = 10mA IL = 1mA 450 300 1.244 100 50 150 3030 G03 TJ = 150C TJ = 25C 350 0 ADJ PIN VOLTAGE (V) QUIESCENT CURRENT (A) 200 200 OUT2 Dropout Voltage vs Temperature 400 Quiescent Current 250 250 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 75 150 225 300 375 450 525 600 675 750 OUTPUT CURRENT (mA) 3030 G04 300 300 OUT2 Guaranteed Dropout Voltage 500 350 350 3030 G02 OUT2 Typical Dropout Voltage 400 400 50 DROPOUT VOLTAGE (mV) 300 400 IL = 750mA IL = 500mA IL = 300mA IL = 100mA IL = 10mA IL = 1mA 450 QUIESCENT CURRENT (A) 350 500 = TEST POINTS DROPOUT VOLTAGE (mV) 500 450 GUARANTEED DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 500 TJ = 125C OUT1 Dropout Voltage vs Temperature OUT1 Guaranteed Dropout Voltage OUT1 Typical Dropout Voltage 400 TJ = 25C, unless otherwise noted. 1.196 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G08 0 OUTPUT 1; VSHDN1 = 0V OUTPUT 2; VSHDN2 = 0V 0 2 4 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) 3030 G09 3030fa For more information www.linear.com/LT3030 5 LT3030 Typical Performance Characteristics Quiescent Current in Shutdown (per Output) 0.7 0.6 0.5 0.4 0.3 0.2 IL1 = 100mA 1.5 0 2 4 1.2 0.9 0.6 0 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) IL1 = 10mA 0 1 2 IL1 = 1mA 3 4 5 6 INPUT VOLTAGE (V) 7 GND PIN CURRENT (mA) GND PIN CURRENT (mA) 15 12 9 6 3 IL2 = 25mA 0.4 IL2 = 10mA IL2 = 1mA SHDN PIN THRESHOLD (V) GND PIN CURRENT (mA) 1.2 3 2 0 1 2 6 3 4 5 INPUT VOLTAGE (V) 7 8 0 25 50 75 100 125 150 175 200 225 250 OUTPUT CURRENT (mA) 3030 G16 3 4 5 6 INPUT VOLTAGE (V) 7 1.0 8 9 TJ = 25C FOR VOUT2 = 1.220V 7 6 5 IL2 = 250mA 4 3 2 0 9 IL2 = 100mA IL2 = 50mA 0 1 2 3 4 5 6 INPUT VOLTAGE (V) 7 TJ = 25C 1.8 0.8 0.6 0.4 VIN = 2.2V 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G17 9 SHDN1 or SHDN2 Pin Input Current 2.0 ON TO OFF 8 3030 G15 OFF TO ON 0.2 1 2 1 1.4 TJ = 25C VIN2 = VOUT2(NOMINAL) + 1V 4 1 3030 G12 SHDN1 or SHDN2 Pin Threshold 5 0 3030 G14 OUT2 GND Pin Current 6 IL1 = 250mA OUT2 GND Pin Current 0.6 0 75 150 225 300 375 450 525 600 675 750 OUTPUT CURRENT (mA) 7 IL1 = 500mA 6 8 3030 G13 0 9 9 0.8 0.2 8 IL1 = 750mA 12 0 9 TJ = 25C FOR VOUT2 = 1.220V 1.0 18 9 8 GND PIN CURRENT (mA) TJ = 25C VIN1 = VOUT1(NOMINAL) + 1V 0 15 OUT2 GND Pin Current 1.2 21 0 18 3030 G11 OUT1 GND Pin Current 24 21 3 3030 G10 27 TJ = 25C FOR VOUT1 = 1.220V 24 1.8 0.3 0.1 0 TJ = 25C FOR VOUT1 = 1.220V 2.1 GND PIN CURRENT (mA) QUIESCENT CURRENT (A) 0.8 OUT1 GND Pin Current 27 GND PIN CURRENT (mA) TJ = 25C RL1 = RL2 = 243k; IL1 = IL2 = 5A VOUT1 = VOUT2 = 1.220V VSHDN1 = VSHDN2 = 0V 0.9 OUT1 GND Pin Current 2.4 SHDN PIN INPUT CURRENT (A) 1.0 TJ = 25C, unless otherwise noted. 1.6 1.4 1.2 1.0 VIN = 2.2V 0.8 VIN = 20V 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 SHDN PIN VOLTAGE (V) 3030 G18 3030fa 6 For more information www.linear.com/LT3030 LT3030 Typical Performance Characteristics 150 1.8 135 1.6 120 1.4 1.2 VIN = 2.2V, VSHDN = 20V 1.0 0.8 0.6 0.4 VIN = 20V VSHDN = 2.2V 0.2 105 90 75 60 45 30 15 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G19 60 45 30 1.25 TJ = -55C 1.00 TJ = 25C 0.75 TJ = 125C 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) TJ = 150C 0.48 0.48 0.42 0.42 TJ = 125C 0.18 0.12 TJ = 150C 0 2 4 2 4 1.0 0.8 0.6 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) 3030 G25 VIN = 18V 3030 G24 Reverse Current 5.0 VOUT = 0V VIN = 6V 0.36 0.30 0.24 0.18 TJ = 25C VIN1 = VIN2 = 0V VADJ1 = VOUT1 VADJ2 = VOUT2 4.5 VIN = 18V 4.0 3.5 3.0 2.5 IADJ1 OR IADJ2 2.0 1.5 1.0 0.5 0.06 0 1.2 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) 0.12 0.06 0 CURRENT LIMIT (A) CURRENT LIMIT (A) 0.54 TJ = 25C VIN = 6V 0.2 REVERSE CURRENT (mA) VOUT = 0V TJ = -55C VOUT = 0V 1.4 OUT2 Current Limit 0.60 0.24 86 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G23 OUT2 Current Limit 0.30 87 0.4 3030 G22 0.36 OUTPUT FALLING 88 1.6 0.25 15 0.54 89 1.8 0.50 0.60 OUTPUT RISING 90 OUT1 Current Limit CURRENT LIMIT (A) 75 91 2.0 1.50 CURRENT LIMIT (A) PWRGD OUTPUT LOW VOLTAGE (mV) 120 90 92 3030 G21 VOUT = 0V 1.75 105 93 OUT1 Current Limit 2.00 IPWRGD = 100A 135 94 3030 G20 PWRGD1 or PWRGD2 Output Low Voltage 150 PWRGD1 or PWRGD2 Trip Point PWRGD TRIP POINT (% OF OUTPUT VOLTAGE) ADJ1 or ADJ2 Pin Bias Current 2.0 ADJ PIN BIAS CURRENT (nA) SHDN PIN INPUT CURRENT (A) SHDN1 or SHDN2 Pin Input Current TJ = 25C, unless otherwise noted. 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 0 IOUT1 OR IOUT2 0 1 2 5 3 4 6 7 OUTPUT VOLTAGE (V) 8 9 3030 G27 3030 G26 IADJ = FLOWS INTO ADJ PIN TO GND PIN IOUT = FLOWS INTO OUT PIN TO IN PIN 3030fa For more information www.linear.com/LT3030 7 LT3030 Typical Performance Characteristics Reverse Current REVERSE CURRENT (A) 400 VIN1 = VIN2 = 0V VADJ1 = VOUT1 = 1.220V VADJ2 = VOUT2 = 1.220V 350 300 250 200 IADJ1 OR IADJ2 IOUT1 150 100 IOUT2 50 0 -75 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) OUT1 Input Ripple Rejection 100 100 90 90 80 80 70 RIPPLE REJECTION (dB) 450 OUT1 Input Ripple Rejection RIPPLE REJECTION (dB) 500 TJ = 25C, unless otherwise noted. COUT1 = 47F 60 COUT1 = 22F 50 40 COUT1 = 10F 30 T = 25C 20 I J = 750mA, C L1 BYP1 = 0 10 VIN1 = VOUT1(NOMINAL) + 1V + 50mVRMS RIPPLE 0 100 10 1k 10k 100k FREQUENCY (Hz) CBYP1 = 1000pF 60 50 CBYP1 = 100pF 40 30 20 10 1M CBYP1 = 10nF 70 0 10M TJ = 25C IL1 = 750mA, COUT1 = 22F VIN1 = VOUT1(NOMINAL) + 1V + 50mVRMS RIPPLE 10 100 1k 10k 100k FREQUENCY (Hz) 1M 3030 G29 3030 G28 10M 3030 G30 IADJ = FLOWS INTO ADJ PIN TO GND PIN IOUT = FLOWS INTO OUT PIN TO IN PIN OUT1 Input Ripple Rejection OUT2 Input Ripple Rejection OUT2 Input Ripple Rejection 100 90 90 90 80 80 70 60 50 40 30 20 10 VIN1 = VOUT1(NOMINAL) + 1.5V + 500mVP-P RIPPLE f = 120Hz IL1 = 750mA COUT2 = 22F 60 50 40 30 20 10 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 80 COUT2 = 10F 70 0 COUT2 = 3.3F TJ = 25C IL2 = 250mA, CBYP2 = 0 VIN2 = VOUT2(NOMINAL) + 1V + 50mVRMS RIPPLE 10 100 1k 10k 100k FREQUENCY (Hz) OUT2 Input Ripple Rejection 30 10M 0 TJ = 25C IL2 = 250mA, COUT2 = 10F VIN2 = VOUT2(NOMINAL) + 1V + 50mVRMS RIPPLE 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 3030 G33 Channel-to-Channel Isolation CHANNEL-TO-CHANNEL ISOLATION (dB) 80 RIPPLE REJECTION (dB) CBYP2 = 100pF 40 Channel-to-Channel Isolation 100 90 70 60 50 40 10 50 3030 G32 100 20 CBYP2 = 10nF 60 10 1M CBYP2 = 1000pF 70 20 3030 G31 30 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) 100 RIPPLE REJECTION (dB) 100 VIN2 = VOUT2(NOMINAL) + 1.5V + 500mVP-P RIPPLE f = 120Hz IL2 = 250mA 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G34 90 80 70 60 CHANNEL 1 VOUT1 100mV/DIV CHANNEL 2 50 VOUT2 100mV/DIV 40 30 GIVEN CHANNEL IS TESTED WITH 50mVRMS SIGNAL ON OPPOSING 20 CHANNEL, BOTH CHANNELS 10 DELIVERING FULL CURRENT TJ = 25C 0 100 1M 10 1k 10k 100k FREQUENCY (Hz) 3030 G36 10M 50s/DIV IL1 = 50mA TO 750mA COUT1 = 10F COUT2 = 3.3F IL2 = 50mA TO 250mA CBYP1 = CBYP2 = 0.01F VIN = 6V, VOUT1 = VOUT2 = 5V 3030 G35 3030fa 8 For more information www.linear.com/LT3030 LT3030 Typical Performance Characteristics IL = 1mA TO FULL LOAD 4 6 4 2 0 -2 -4 VIN = 2V TO 20V 2 1 0 -1 -2 -6 -3 -8 -4 -10 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) -5 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3030 G37 VOUT = 5V CBYP = 100pF VOUT = VADJ 0.1 CBYP = 0.01F 0.1 140 1 10 FREQUENCY (Hz) 120 OUTPUT2 OUTPUT1 100 80 60 VOUT = 1.220V 40 OUTPUT1 100 0 10 0.1 1 10 FREQUENCY (kHz) 100 100 3030 G39 160 140 TJ = 25C COUT = 10F 120 VOUT1 = 5V CBYP1 = 0 100 80 VOUT1 = VADJ1 CBYP1 = 0 60 40 VOUT1 = VADJ1 1000 10000 VOUT1 = 5V 0 0.01 0.1 CBYP1 = 10nF 1 10 100 OUTPUT CURRENT (mA) 1000 3030 G42 3030 G41 Start-Up Time from Shutdown CBYP = 0pF OUT2 RMS Output Noise vs Output Current (10Hz to 100kHz) OUTPUT NOISE (VRMS) 0.01 0.01 20 OUTPUT2 CBYP (pF) 3030 G40 140 0.1 OUT1 RMS Output Noise vs Output Current (10Hz to 100kHz) TJ = 25C COUT = 10F IL = FULL LOAD fBW = 10Hz TO 100kHz VOUT = 5V 20 CBYP = 1000pF 0.01 0.01 VOUT = 5V VOUT = VADJ OUTPUT NOISE (VRMS) 160 TJ = 25C COUT = 10F IL = FULL LOAD 1 TJ = 25C COUT = 10F CBYP = 0 IL = FULL LOAD 1 RMS Output Noise vs Bypass Capacitor OUTPUT NOISE (VRMS) OUTPUT NOISE SPECTRAL DENSITY (V/Hz) 10 10 3030 G38 Output Noise Spectral Density 160 Output Noise Spectral Density 3 LINE REGULATION (mV) LOAD REGULATION (mV) 8 OUT1 or OUT2 Line Regulation 5 OUTPUT NOISE SPECTRAL DENSITY (V/Hz) OUT1 or OUT2 Load Regulation 10 TJ = 25C, unless otherwise noted. Start-Up Time from Shutdown CBYP = 0.01F TJ = 25C COUT = 10F 120 100 VOUT 1V/DIV VOUT2 = 5V CBYP2 = 0 80 VOUT2 = VADJ2 CBYP2 = 0 60 40 20 0 0.01 VOUT2 = 5V SHDN VOLTAGE 2V/DIV SHDN VOLTAGE 2V/DIV CBYP2 = 10nF VOUT2 = VADJ2 0.1 VOUT 1V/DIV 1 10 100 OUTPUT CURRENT (mA) 1000 3030 G45 3030 G44 VIN = 2.5V CIN = 10F COUT = 10F 1ms/DIV IL = FULL LOAD TJ = 25C VOUT = 1.5V VIN = 2.5V CIN = 10F COUT = 10F 1ms/DIV IL = FULL LOAD TJ = 25C VOUT = 1.5V 3030 G43 3030fa For more information www.linear.com/LT3030 9 LT3030 Typical Performance Characteristics 10Hz to 100kHz Output Noise, CBYP = 0pF OUT1 or OUT2 Minimum Input Voltage 2.50 MINIMUM INPUT VOLTAGE (V) 2.25 10Hz to 100kHz Output Noise, CBYP = 100pF VOUT1 = VOUT2 = 1.220V 2.00 IL = FULL LOAD 1.75 1.50 TJ = 25C, unless otherwise noted. VOUT 100V/DIV IL = 1mA 1.25 VOUT 100V/DIV 1.00 0.75 0.50 COUT = 10F IL = FULL LOAD VOUT = 5V 0.25 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 1ms/DIV 3030 G47 COUT = 10F IL = FULL LOAD VOUT = 5V 1ms/DIV 3030 G48 3030 G46 10Hz to 100kHz Output Noise, CBYP = 1000pF 10Hz to 100kHz Output Noise, CBYP = 0.01F OUT1 Transient Response CBYP = 0pF VOUT DEVIATION 200mV/DIV VOUT 100V/DIV VOUT 100V/DIV LOAD CURRENT DEVIATION 500mA/DIV COUT = 10F IL = FULL LOAD VOUT = 5V 1ms/DIV 3030 G49 COUT = 10F IL = FULL LOAD VOUT = 5V OUT1 Transient Response CBYP = 0.01F 1ms/DIV 3030 G50 OUT2 Transient Response CBYP = 0pF 200mV/DIV 50mV/DIV 100mA/DIV 500mA/DIV LOAD CURRENT DEVIATION 100mA/DIV 3030 G53 3030 G52 20s/DIV IL = 100mA TO 750mA TJ = 25C VOUT = 5V VOUT DEVIATION LOAD CURRENT DEVIATION LOAD CURRENT DEVIATION 200s/DIV IL = 100mA TO 750mA TJ = 25C VOUT = 5V OUT2 Transient Response CBYP = 0.01F VOUT DEVIATION VOUT DEVIATION 50mV/DIV VIN = 6V CIN = 22F COUT = 22F 3030 G51 VIN = 6V CIN = 22F COUT = 22F VIN = 6V CIN = 10F COUT = 10F 200s/DIV IL = 100mA TO 250mA TJ = 25C VOUT = 5V 3030 G54 VIN = 6V CIN = 10F COUT = 10F 20s/DIV IL = 100mA TO 250mA TJ = 25C VOUT = 5V 3030fa 10 For more information www.linear.com/LT3030 LT3030 Pin Functions (QFN/TSSOP) OUT1, OUT2 (Pins 1, 2, 7, 8/Pins 3, 4, 7, 8): Output. The OUT1/OUT2 pins supply power to the loads. A minimum 10F/3.3F output capacitor prevents oscillations on OUT1/OUT2. Applications with large output load transients require larger values of output capacitance to limit peak voltage transients. See the Applications Information section for more on output capacitance and on reverse output characteristics. GND (Pins 3, 4, 5, 6, 11, 12, 13, 18, 19, 24, 25, 26, Exposed Pad Pin 29/Pins 5, 6, 15, 16, Exposed Pad Pin 21): Ground. The exposed pad (backside) of the QFN and TSSOP packages is an electrical connection to GND. To ensure proper electrical and thermal performance, solder the exposed pad to the PCB ground and tie directly to GND pins. Connect the bottom of the output voltage setting resistor divider directly to GND for optimum load regulation performance. IN1, IN2 (Pins 20, 21, 16, 17/Pins 17, 18, 13, 14): Input. The IN1/IN2 pins supply power to each channel. The LT3030 requires a bypass capacitor at the IN1/IN2 pins if located more than six inches away from the main input filter capacitor. Include a bypass capacitor in batterypowered circuits, as a battery's output impedance rises with frequency. A bypass capacitor in the range of 1F to 10F suffices. The LT3030's design withstands reverse voltages on the IN pins with respect to ground and the OUT pins. In the case of a reversed input, which occurs if a battery is plugged in backwards, the LT3030 acts as if a diode is in series with its input. No reverse current flows into the LT3030 and no reverse voltage appears at the load. The device protects itself and the load. PWRGD1, PWRGD2 (Pins 22, 15/Pins 19, 12): Power Good. The PWRGD flag is an open-collector flag to indicate that the output voltage has increased above 90% of the nominal output voltage. There is no internal pull-up on this pin; a pull-up resistor must be used. The PWRGD pin changes state from an open-collector pull-down to high impedance after the output increases above 90% of the nominal voltage. The maximum pull-down current of the PWRGD pin in the low state is 100A. SHDN1, SHDN2 (Pins 23, 14/Pins 20, 11): Shutdown. Pulling the SHDN1 or SHDN2 pin low puts its corresponding LT3030 channel into a low power state and turns its output off. The SHDN1 and SHDN2 pins are completely independent of each other, and each SHDN pin only affects operation on its corresponding channel. Drive the SHDN1 and SHDN2 pins with either logic or an open collector/drain with pull-up resistors. The resistors supply the pull-up current to the open collectors/drains and the SHDN1 or SHDN2 current, typically less than 1A. If unused, connect SHDN1 and SHDN2 to their corresponding IN pins. Each channel will be in its low power shutdown state if its corresponding SHDN pin is not connected. ADJ1, ADJ2 (Pins 27, 10/Pins 1, 10): Adjust Pin. These are the error amplifier inputs. These pins are internally clamped to 9V. A typical input bias current of 30nA flows into the pins (see curve of ADJ1/ADJ2 Pin Bias Current vs Temperature in the Typical Performance Characteristics section). The ADJ1 and ADJ2 pin voltages are 1.220V referenced to ground and the output voltage range is 1.220V to 19.5V. BYP1, BYP2 (Pins 28, 9/Pins 2, 9): Bypass. Connecting a capacitor between OUT and BYP of a respective channel bypasses the LT3030 reference to achieve low noise performance, improve transient response and soft-start the output. Internal circuitry clamps the BYP1/BYP2 pins to 0.6V (one VBE) from ground. A small capacitor from the corresponding output to this pin bypasses the reference to lower the output voltage noise. Using a maximum value of 10nF reduces the output voltage noise to a typical 20VRMS over a 10Hz to 100kHz bandwidth. If not used, this pin must be left unconnected. 3030fa For more information www.linear.com/LT3030 11 LT3030 Applications Information The LT3030 is a dual 750mA/250mA low dropout regulator with independent inputs, micropower quiescent current and shutdown. The device supplies up to 750mA/250mA from the outputs of channel 1/channel 2 at a typical dropout voltage of 300mV. The two regulators share common GND pins and are thermally coupled. However, the two inputs and outputs of the LT3030 operate independently. Each channel can be shut down independently, but a thermal shutdown fault on either channel shuts off the output on both channels. The addition of a 10nF reference bypass capacitor lowers output voltage noise to 20VRMS over a 10Hz to 100kHz bandwidth. Additionally, the reference bypass capacitor improves transient response of the regulator, lowering the settling time for transient load conditions. The low operating quiescent current (120A/75A for channel 1/2) drops to typically less than 1A in shutdown. In addition to the low quiescent current, the LT3030 regulator incorporates several protection features that make it ideal for use in battery powered systems. Most importantly, the device protects itself against reverse input voltages. Adjustable Operation Each of the LT3030's channels has an output voltage range of 1.220V to 19.5V. Figure 1 illustrates that the output voltage is set by the ratio of two external resistors. The device regulates the output to maintain the corresponding ADJ pin voltage at 1.220V referenced to ground. R1's current equals 1.220V/R1. R2's current equals R1's current plus the ADJ pin bias current. The ADJ pin bias current, 30nA at 25C, flows through R2 into the ADJ pin. Use the formula in Figure 1 to calculate output voltage. Linear Technology recommends that the value of R1 be less than 243k to minimize errors in the output voltage due to the ADJ pin bias current. In shutdown, the output turns off and the divider current is zero. Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias Current vs Temperature appear in the Typical Performance Characteristics section. Linear Technology tests and specifies each LT3030 channel with its ADJ pin tied to the corresponding OUT pin for a 1.220V output voltage. Specifications for output voltages greater than 1.220V are proportional to the ratio of desired output voltage to 1.220V: VOUT /1.220V LT3030 OUT1/OUT2 VIN IN1/IN2 VOUT R2 COUT ADJ1/ADJ2 GND 3030 F01 R2 VOUT = 1.220V 1+ + (I ADJ) (R2) R1 VADJ = 1.220V IADJ = 30nA AT 25C R1 OUTPUT RANGE = 1.220V TO 19.5V Figure 1. Adjustable Operation For example, load regulation on OUT2 for an output current change of 1mA to full load current is typically -2mV at VOUT2 = 1.220V. At VOUT2 = 2.5V, load regulation is: (2.5V/1.220V) * (-2mV) = -4.1mV Table 1 shows 1% resistor divider values for some common output voltages with a resistor divider current of approximately 5A. Table 1. Output Voltage Resistor Divider Values VOUT (V) 1.5 1.8 2.5 3 3.3 5 R1 (k) 237 237 243 232 210 200 R2 (k) 54.9 113 255 340 357 619 Bypass Capacitance and Low Noise Performance Using a bypass capacitor connected between a channel's BYP pin and its corresponding OUT pin significantly lowers LT3030 output voltage noise, but is not required in all applications. Linear Technology recommends a good quality low leakage capacitor. This capacitor bypasses the regulator's reference, providing a low frequency noise pole. A 10nF bypass capacitor introduces a noise pole that decreases output voltage noise to as low as 20VRMS. Using a bypass capacitor provides the added benefit of improving transient response. With no bypass capacitor and a 10F output capacitor, a 100mA to full load step settles to within 1% of its final value in approximately 400s. With the addition of a 10nF bypass capacitor and evaluating the same load step, output voltage excursion stays within 2% (see Transient Response in the Typical Performance Characteristics section). Using a bypass capacitor makes regulator start-up time proportional to the value of the bypass capacitor. For example, a 10nF bypass capacitor and 10F output capacitor slow start-up time to 15ms. 3030fa 12 For more information www.linear.com/LT3030 LT3030 Applications Information Input Capacitance and Stability Each LT3030 channel is stable with an input capacitor typically between 1F and 10F. Applications operating with smaller VIN to VOUT differential voltages and that experience large load transients may require a higher input capacitor value to prevent input voltage droop and letting the regulator enter dropout. Very low ESR ceramic capacitors may be used. However, in cases where long wires connect the power supply to the LT3030's input and ground, use of low value input capacitors combined with an output load current of greater than 20mA may result in instability. The resonant LC tank circuit formed by the wire inductance and the input capacitor is the cause and not a result of LT3030 instability. The self-inductance, or isolated inductance, of a wire is directly proportional to its length. However, the wire diameter has less influence on its self inductance. For example, the self-inductance of a 2-AWG isolated wire with a diameter of 0.26" is about half the inductance of a 30-AWG wire with a diameter of 0.01". One foot of 30-AWG wire has 465nH of self-inductance. Several methods exist to reduce a wire's self-inductance. One method divides the current flowing towards the LT3030 between two parallel conductors. In this case, placing the wires further apart reduces the inductance; up to a 50% reduction when placed only a few inches apart. Splitting the wires connects two equal inductors in parallel. However, when placed in close proximity to each other, mutual inductance adds to the overall self inductance of the wires. The most effective technique to reducing overall inductance is to place the forward and return current conductors (the input wire and the ground wire) in close proximity. Two 30-AWG wires separated by 0.02" reduce the overall self inductance to about one-fifth of a single wire. If a battery, mounted in close proximity, powers the LT3030, a 1F input capacitor suffices for stability. However, if a distantly located supply powers the LT3030, use a larger value input capacitor. Use a rough guideline of 1F (in addition to the 1F minimum) per 8 inches of wire length. The minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. Placing additional capacitance on the LT3030's output also helps. However, this requires an order of magnitude more capacitance in comparison with additional LT3030 input bypassing. Series resistance between the supply and the LT3030 input also helps stabilize the application; as little as 0.1 to 0.5 suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A better alternative is to use higher ESR tantalum or electrolytic capacitors at the LT3030 input in place of ceramic capacitors. Output Capacitance and Transient Response The LT3030 is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Linear Technology recommends a minimum output capacitor of 10F/3.3F (channel 1 /channel 2) with an ESR of 3, or less, to prevent oscillations. The LT3030 is a micropower device, and output transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Ceramic capacitors require extra consideration. Manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics specify the EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. Z5U and Y5V dielectrics provide high C-V products in a small package at low cost, but exhibit strong voltage and temperature coefficients, as shown in Figure 2 and Figure 3. When used with a 5V regulator, a 16V 10F Y5V capacitor can exhibit an effective value as low as 1F to 2F for the applied DC bias voltage and over the operating temperature range. X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Exercise care even when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias (voltage coefficient) with X5R and X7R capacitors is better than with Y5V and Z5U capacitors, but can still be significant enough to drop 3030fa For more information www.linear.com/LT3030 13 LT3030 Applications Information capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as case size increases. Linear Technology recommends verifying expected versus actual capacitance values at operating voltage in situ for an application. 20 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F CHANGE IN VALUE (%) 0 X5R -20 -40 -60 Y5V Shutdown/UVLO -80 -100 0 2 4 14 8 6 10 12 DC BIAS VOLTAGE (V) 16 3030 F02 Figure 2. Ceramic Capacitor DC Bias Characteristics 40 20 CHANGE IN VALUE (%) Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. The resulting voltages produced can cause appreciable amounts of noise, especially when a ceramic capacitor is used for noise bypassing. A ceramic capacitor produced the trace's response to light tapping from a pencil, as shown in Figure 4. Similar vibration induced behavior can masquerade as increased output voltage noise. X5R 0 The SHDN pin is used to put the LT3030 into a micropower shutdown state. The LT3030 has an accurate 1.21V threshold (during turn-on) on the SHDN pin. This threshold can be used in conjunction with a resistor divider from the system input supply to define an accurate undervoltage lockout (UVLO) threshold for the regulator. The SHDN pin current (at the threshold) needs to be considered when determining the resistor divider network. PWRGD Flag -20 -40 Y5V -60 -80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F -100 50 25 75 -50 -25 0 TEMPERATURE (C) 100 125 3030 F03 Figure 3. Ceramic Capacitor Temperature Characteristics COUT = 10F CBYP = 0.01F ILOAD = 750mA VOUT 500V/DIV The PWRGD flag indicates that the ADJ pin voltage is within 10% of the regulated voltage. The PWRGD pin is an open-collector output, capable of sinking 100A of current when the ADJ pin voltage is below 90% of the regulated voltage. There is no internal pull-up on the PWRGD pin; an external pull-up resistor must be used. As the ADJ pin voltage rises above 90% of its regulated voltage, the PWRGD pin switches to a high impedance state and the external pull-up resistor pulls the PWRGD pin voltage up. During normal operation, an internal glitch filter prevents the PWRGD pin from switching to a low voltage state if the ADJ pin voltage falls below the regulated voltage by more than 10% in a short transient (<40s typical) event. Thermal Considerations 100ms/DIV 3030 F04 Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor The LT3030's power handling capability limits the maximum rated junction temperature (125C, LT3030E/LT3030I or 150C, LT3030H/LT3030MP). Two components comprise the power dissipated by each channel: 3030fa 14 For more information www.linear.com/LT3030 LT3030 Applications Information 1. Output current multiplied by the input/output voltage differential: (IOUT)(VIN - VOUT), and 2.GND pin current multiplied by the input voltage: (IGND)(VIN). Table 3. FE Package, 20-Lead TSSOP COPPER AREA TOPSIDE* BACKSIDE 2500mm2 2500mm2 2500mm2 1000mm2 2 2500mm2 225mm 2 2500mm2 100mm THERMAL RESISTANCE BOARD AREA (JUNCTION-TO-AMBIENT) 2500mm2 25C/W 2500mm2 27C/W 2 2500mm 28C/W 2500mm2 32C/W Ground pin current is found by examining the GND Pin Current curves in the Typical Performance Characteristics section. *Device is mounted on topside. Power dissipation for each channel equals the sum of the two components listed above. Total power dissipation for the LT3030 equals the sum of the power dissipated by each channel. The junction-to-case thermal resistance (JC), measured at the exposed pad on the back of the die, is 3.4C/W for the QFN package, and 10C/W for the TSSOP package. The LT3030's internal thermal shutdown circuitry protects both channels of the device if either channel experiences an overload or fault condition. Activation of the thermal shutdown circuitry turns both channels off. If the overload or fault condition is removed, both outputs are allowed to turn back on. For continuous normal conditions, do not exceed the maximum junction temperature rating of 125C (LT3030E/LT3030I) or 150C (LT3030H/LT3030MP). Carefully consider all sources of thermal resistance from junction-to-ambient, including additional heat sources mounted in proximity to the LT3030. For surface mount devices, use the heat spreading capabilities of the PC board and its copper traces to accomplish heat sinking. Copper board stiffeners and plated through-holes can also spread the heat generated by power devices. Calculating Junction Temperature Example: Channel 1's output voltage is set to 1.8V. Channel 2's output voltage is set to 1.5V. Each channel's input voltage is 2.5V. Channel 1's output current range is 0mA to 750mA. Channel 2's output current range is 0mA to 250mA. The application has a maximum ambient temperature of 50C. What is the LT3030's maximum junction temperature? The power dissipated by each channel equals: IOUT(MAX)(VIN - VOUT) + IGND (VIN) where for output 1: IOUT(MAX) = 750mA VIN = 2.5V IGND at (IOUT = 750mA, VIN = 2.5V) = 13mA The following tables list thermal resistance as a function of copper area in a fixed board size. All measurements were taken in still air on a four-layer FR-4 board with 1oz solid internal planes, and 2oz external trace planes with a total board thickness of 1.6mm. For further information on thermal resistance and using thermal information, refer to JEDEC standard JESD51, notably JESD 51-7 and JESD 51-12. For output 2: Table 2. UFD Package, 28-Lead QFN For output 2: COPPER AREA TOPSIDE* 2500mm2 1000mm2 225mm2 100mm2 BACKSIDE 2500mm2 2500mm2 2500mm2 2500mm2 BOARD AREA 2500mm2 2500mm2 2500mm2 2500mm2 *Device is mounted on topside. THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 30C/W 32C/W 33C/W 35C/W IOUT(MAX) = 250mA VIN = 2.5V IGND at (IOUT = 250mA, VIN = 2.5V) = 4.5mA So, for output 1: P = 750mA (2.5V - 1.8V) + 13mA (2.5V) = 0.56W P = 250mA (2.5V - 1.5V) + 4.5mA (2.5V) = 0.26W The thermal resistance is in the range of 25C/W to 35C/W, depending on the copper area. So, the junction temperature rise above ambient temperature approximately equals: (0.56W + 0.26W) 30C/W = 24.6C 3030fa For more information www.linear.com/LT3030 15 LT3030 Applications Information TJMAX = 50C + 24.6C = 74.6C Protection Features The LT3030 regulator incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device protects itself against reverse input voltages and reverse voltages from output to input. The two regulators have independent inputs, a common GND pin and are thermally coupled. However, the two channels of the LT3030 operate independently. Each channel's output can be shut down independently, and a fault condition on one output does not affect the other output electrically, unless the thermal shutdown circuitry is activated. Current limit protection and thermal overload protection protect the device against current overload conditions at each output of the LT3030. For normal operation, do not allow the junction temperature to exceed 125C (LT3030E/ LT3030I) or 150C (LT3030H/LT3030MP). The typical thermal shutdown temperature threshold is 165C and the circuitry incorporates approximately 5C of hysteresis. Each channel's input withstands reverse voltages of 22V. Current flow into the device is limited to less than 1mA (typically less than 100A) and no negative voltage appears at the respective channel's output. The device protects both itself and the load against batteries that are plugged in backwards. The LT3030 incurs no damage if either channel's output is pulled below ground. If the input is left open-circuit, or grounded, the output can be pulled below ground by 22V. The output acts like an open circuit, and no current flows from the output. However, current flows in (but is limited by) the external resistor divider that sets the output voltage. If the input is powered by a voltage source, the output sources current equal to its current limit capability and the LT3030 protects itself by its thermal limiting circuitry. In this case, grounding the relevant SHDN1 or SHDN2 pin turns off its channel's output and stops that output from sourcing current. 16 The LT3030 incurs no damage if either ADJ pin is pulled above or below ground by 9V. If the input is left open circuit or grounded, the ADJ pins perform like an open circuit down to -1.5V, and then like a 1.2k resistor down to -9V when pulled below ground. When pulled above ground, the ADJ pins perform like an open circuit up to 0.5V, then like a 5.7k resistor up to 3V, then like a 1.8k resistor up to 9V. In situations where an ADJ pin connects to a resistor divider that would pull the pin above its 9V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, assume a resistor divider sets the regulated output voltage to 1.5V, and the output is forced to 20V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 9V. The 11V difference between the OUT and ADJ pins divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 2.2k. In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open-circuit. Current flow back into the output follows the curve shown in Figure 5. If either of the LT3030's IN pins is forced below its corresponding OUT pin, or the OUT pin is pulled above its corresponding IN pin, input current for that channel typically 5.0 TJ = 25C VIN1 = VIN2 = 0V VADJ1 = VOUT1 VADJ2 = VOUT2 4.5 REVERSE CURRENT (mA) The maximum junction temperature then equals the maximum ambient temperature plus the maximum junction temperature rise above ambient temperature, or: 4.0 3.5 3.0 2.5 IADJ1 OR IADJ2 2.0 1.5 1.0 0.5 0 IOUT1 OR IOUT2 0 1 2 5 3 4 6 7 OUTPUT VOLTAGE (V) 8 9 3030 F05 IADJ = FLOWS INTO ADJ PIN TO GND PIN IOUT = FLOWS INTO OUT PIN TO IN PIN For more information www.linear.com/LT3030 Figure 5. Reverse Output Current 3030fa LT3030 Applications Information drops to less than 2A. This occurs if the IN pin is connected to a discharged (low voltage) battery, and either a backup battery or a second regulator circuit holds up the output. The state of that channel's SHDN pin has no effect on the reverse output current if the output is pulled above the input. Overload Recovery Like many IC power regulators, the LT3030 has safe operating area (SOA) protection. The safe area protection decreases current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The protective design provides some output current at all values of input-to-output voltage up to the specified maximum operational input voltage of 20V. When power is first applied, as input voltage rises, the output follows the input, allowing the regulator to start-up into heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, an event can occur wherein removal of an output short will not allow the output to recover. The event occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations occur immediately after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage has already been turned on. The load line intersects the output current curve at two points creating two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. 3030fa For more information www.linear.com/LT3030 17 LT3030 Typical Applications Coincident Tracking Supply Application 3.3V 0.1F OFF ON ON GATE LTC2923 RAMP RAMPBUF 113k 1% 90.9k 1% VCC TRACK1 IN1 1M 3.3F LT3030 10nF PWRGD1 BYP1 SHDN1 ADJ1 FB2 3.3F IN2 OUT2 10nF 1M PWRGD2 GND BYP2 SHDN2 113k 1% 10F VOUT1 1.8V 750mA 237k 1% SDO 2.5V TRACK2 OUT1 1M FB1 54.9k 1% 63.4k 1% CGATE 0.1F ADJ2 54.9k 1% VOUT2 1.5V 3.3F 250mA 237k 1% GND 3030 TA02a VOUT1 VOUT2 500mV/DIV 20ms/DIV 3030 TA02b 3030fa 18 For more information www.linear.com/LT3030 LT3030 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFD Package 28-Lead (4mm x 5mm) Plastic QFN (Reference LTC DWG # 05-08-1712 Rev B) 0.70 0.05 4.50 0.05 3.10 0.05 2.50 REF 2.65 0.05 3.65 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 3.50 REF 4.10 0.05 5.50 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 0.10 (2 SIDES) 0.75 0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 x 45 CHAMFER 2.50 REF R = 0.115 TYP 27 28 0.40 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 0.10 (2 SIDES) 3.50 REF 3.65 0.10 2.65 0.10 (UFD28) QFN 0506 REV B 0.200 REF 0.00 - 0.05 0.25 0.05 0.50 BSC BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3030fa For more information www.linear.com/LT3030 19 LT3030 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev J) FE Package 20-Lead Plastic TSSOP (4.4mm) Exposed Pad Variation CB (Reference LTC DWG # 05-08-1663 Rev J) Exposed Pad Variation CB 6.40 - 6.60* (.252 - .260) 3.86 (.152) 3.86 (.152) 20 1918 17 16 15 14 13 12 11 6.60 0.10 2.74 (.108) 4.50 0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 0.05 1.05 0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.25 REF 0 - 8 0.65 (.0256) BSC 0.50 - 0.75 (.020 - .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 1.20 (.047) MAX 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE20 (CB) TSSOP REV J 1012 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3030fa 20 For more information www.linear.com/LT3030 LT3030 Revision History REV DATE DESCRIPTION A 6/13 Lowered VIN minimum to 1.7V PAGE NUMBER 1 Added H-grade in QFN package 2 Modified OUT2 GND curve pin current graph labels 6 3030fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3030 21 LT3030 Typical Application Sequencing Supply Application VIN1 3.3V LT3030 1F 1M OUT1 IN1 VIN2 2.5V 1F 10nF SHDN1 BYP1 PWRGD1 ADJ1 IN2 OUT2 10nF BYP2 SHDN2 22F VOUT2 1V/DIV 237k 1% 1M PWRGD2 113k 1% VOUT1 1.8V 750mA 54.9k 1% 10F VOUT2 1.5V 250mA ADJ2 VOUT1 1V/DIV VSHDN1 5V/DIV 10ms/DIV 3030 TA03b 237k 1% GND 3030 TA03a Related Parts PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise Micropower LDO VIN: 1.8V to 20V, VOUT = 1.22V, VDO = 0.3V, IQ = 20A, ISD <1A, Low Noise < 20VRMS, Stable with 1F Ceramic Capacitors, ThinSOTTM Package LT1763 500mA, Low Noise Micropower LDO VIN: 1.8V to 20V, VOUT = 1.22V, VDO = 0.3V, IQ = 30A, ISD <1A, Low Noise < 20VRMS, S8 Package LT1963/ LT1963A 1.5A, Low Noise, Fast Transient Response VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD < 1A, Low Noise: < 40VRMS, "A" Version Stable with Ceramic Capacitors, DD, TO220-5, SOT223, LDOs S8 Packages LT1964 200mA, Low Noise Micropower, Negative VIN: -2.2V to -20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 30A, ISD = 3A, Low Noise: <30VRMS, Stable with Ceramic Capacitors, ThinSOT Package LDO LT1965 1.1A, Low Noise, Fast Transient Response VIN: 1.8V to 20V, VOUT(MIN) = 1.20V, VDO = 0.3V, IQ = 0.5mA, ISD < 1A, Low Noise: < 40VRMS, Stable with Ceramic Capacitors, 3mm x 3mm DFN, LDO MS8E, DD-Pak, TO-220 Packages LT3023 Dual 100mA, Low Noise, Micropower LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40A, ISD <1A, DFN, MS10 Packages LT3024 Dual 100mA/500mA, Low Noise, Micropower LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60A, ISD <1A, DFN, TSSOP-16E Packages LT3027 Dual 100mA, Low Noise, Micropower LDO with Independent Inputs VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40A, ISD <1A, DFN, MS10E Packages LT3028 Dual 100mA/500mA, Low Noise, VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60A, ISD <1A, DFN, Micropower LDO with Independent Inputs TSSOP-16E Packages LT3029 Dual 500mA/500mA, Low Noise, VIN: 1.8V to 20V, VOUT(MIN) = 1.215V, VDO = 0.30V, IQ = 55A, ISD <1A, DFN, Micropower LDO with Independent Inputs MSOP-16E Packages LT3032 Dual 150mA Positive/Negative Low Noise, Low Dropout Linear Regulator VIN: 2.3V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30A, ISD <1A, 14-Lead DFN Package LT3080/ LT3080-1 1.1A, Parallelable, Low Noise LDO 300mV Dropout Voltage (2-Supply Operation), Low Noise 40VRMS, VIN = 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors, TO-220, SOT-223, MSOP and 3mm x 3mm DFN 3030fa 22 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3030 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT3030 LT 0613 REV A * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2013