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Low-Noise, Differential
Audio Preamplifier IC
1580
FEATURES
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APPLICATIONS
• J
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Figure 1. THAT1580 Block Diagram
Pin Name
QFN Pin
N/C* 1
OUT2
2
OUT1
3
N/C* 4
N/C*
5
Rg1 6
IN1
7
N/C*
8
N/C*
9
IN2
10
N/C* 11
V-
12
V+
13
N/C*
14
Rg2
15
N/C* 16
V-
Thermal Pad
Table 1. Pin Assignments
Description
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* N/C pins should be left open and not connected to
other traces on the PCB
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S P E C I F I C A T I O N S
1 , 2
Absolute Maximum Ratings
3
Supply Voltage (V+) - (V-) 40 V Operating Temperature Range (T
OP
) -40 to +85 ºC
Maximum Input Voltage (V
IMax
) V+ to V- Output Short-Circuit Duration (t
SH
) Continuous
Storage Temperature Range (T
STG
) -40 to +125 ºC Junction Temperature (T
JMAX
) +125 ºC
Electrical Characteristics
4,5
Parameter Symbol Conditions Min Typ Max Units
Power Supply
Supply Voltage V+; - V- Referenced to GND 5 — 18 V
Supply Current I+; -(I-) No Signal — 7.9 10 mA
Input Characteristics
Input Bias Current I
B
No signal; either input connected to GND — 6.8 11 µA
Input Offset Current I
B-OFF
No signal -1.1 — +1.1 µA
R
G
Input Bias Current I
BRG
No signal -20 +1.5 +20 µA
R
G
Input Offset Current I
BRG-OFF
No signal -3.5 — +3.5 µA
Differential Input Offset Voltage V
OS
No signal, Includes I
BRG-OFF
* R
F
0 dB gain -10 — +10 mV
+60 dB gain -250 — +250 µV
Input Common Mode Voltage Range V
IN_CM
Common Mode (V-) + 3.7 — (V+) - 3.2 V
Maximum Differential Input Level V
IN-BAL
R
G
= ∞ — 26 — dBu
Output Characteristics
Total Differential Output Offset G = gain -(10 + 0.25*G) — (10 + 0.25*G) mV
Common Mode Output Voltage V
OSCM
No signal; IN1, IN2 connected to GND — -640 — mV
Maximum Single Output Voltage V
OUT-SINGLE
R
L
= 2 kΩ — (V+) -1, (V-)+1 — V
Differential Short Circuit Current I
SC
Cold Start; R
L
= 0 Ω — ± 62 — mA
Maximum Capacitive Load C
L MAX
Over entire temperature range — — 100 pF
Maximum Differential Output Level V
OUT
R
L
= 2 kΩ 28 — — dBu
AC Characteristics
Gain Equation G
DIFF
Differential in to differential out 1 + [(R
A
+ R
B
)/R
G
]
See Figure 16. (R
G
= R
GV
+ R
GF
)
Feedback Impedance R
A
, R
B
2 — — kΩ
Differential Gain G
DIFF
Programmed by R
A
, R
B
, R
G
0 — 70 dB
Power Supply Rejection Ratio PSRR V+ = -(V-); ±5V to ±18V
0 dB gain — 111 — dB
20 dB gain — 122 — dB
40 dB gain — 147 — dB
60 dB gain — 147 — dB
Bandwidth -3dB f
-3dB
Small signal
0 dB gain — 7.3 — MHz
20 dB gain — 6.1 — MHz
40 dB gain — 2.7 — MHz
60 dB gain — 356 — kHz
Small signal; R
G
=∞
R
A
= R
B
= 2 kΩ — 8 — MHz
R
A
= R
B
= 5 kΩ — 3 — MHz
R
A
= R
B
= 10 kΩ — 1.3 — MHz
1. All specifications are subject to change without notice.
2. Unless otherwise noted, T
A
=25ºC, V+ = +15V, V- = -15V.
3. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; the functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
4. 0 dBu = 0.775 Vrms
5. Unless otherwise noted, R
A
= R
B
= 2.21 kΩ; C
L
= 10 pF
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Figure 3. Equivalent Input Noise vs Gain and Bandwidth;
Source Impedance 150Ω
Figure 2. Equivalent Input Noise vs Gain and
Source Impedance; BW: 22Hz to 22kHz
Electrical Characteristics (con’t)
1,3,4,5
Parameter Symbol Conditions Min. Typ. Max Units
AC Characteristics (continued)
Slew Rate SR V
OUT
= 50.3V
P-P
; R
L
=2kΩ ; C
L
=100pF
All gains 31 53 — V/µs
Total Harmonic Distortion THD + N V
OUT
= 5V
RMS
; f=1kHz; BW=22kHz
0 dB gain — 0.0004 — %
6 dB gain — 0.0003 — %
20 dB gain — 0.0003 — %
40 dB gain — 0.0005 — %
60 dB gain — 0.005 — %
Equivalent Input Noise Voltage e
N
Inputs connected to GND; f=1kHz
0 dB gain — 18.3 — nV/√Hz
6 dB gain — 10.1 — nV/√Hz
20 dB gain — 3.3 — nV/√Hz
40 dB gain — 1.4 — nV/√Hz
60 dB gain — 1 — nV/√Hz
e
N
Inputs connected to GND; BW=22kHz; 60 dB gain
— -134.4 — dBu
A-weighted — -136.6 — dBu
Rs = 150Ω; BW=22kHz; 60 dB gain
— -129 — dBu
A-weighted — -131.2 — dBu
Equivalent Input Noise Current i
N
f=1kHz; 60 dB gain — 1.5 — pA/√Hz
Noise Figure NF 60 dB gain; R
S
= 150 Ω — 1.5 — dB
-135
-130
-125
-120
-115
-110
-105
-100
0 10 20 30 40 50 60
[dB
]
[
d
B
u]
BW: 22Hz - 22kHz
BW: A-weighted
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Figure 7. THD + Noise vs Frequency; Vout = +27dBu,
R
L
= 10kΩ, BW: 22 Hz to 22 kHz
Figure 6. THD + Noise vs Level
f = 1 kHz, BW: 22 Hz to 22 kHz
Figure 4. Equivalent Input Noise vs Gain and
Feedback Impedance; BW: 22Hz to 22kHz
Figure 5. Bandwidth vs Gain and Feedback Impedance
Figure 8. Power Supply Rejection Ratio vs Frequency;
Gain = 0dB, 40 dB
Figure 9. Max Output Voltage vs Output Current
-140
-135
-130
-125
-120
-115
-110
-105
-100
0 10 20 30 40 50 60
[dB]
[dBu]
0.1
1
10
0 10 20 30 40 50 60
[dB]
[MHz]
RA = RB = 2k21
RA = RB = 5k
RA = RB = 10k
-15
-10
-5
0
5
10
15
[V]
[mA]
0 10 20 30 40 50 60
V
OUT
P
V
OUT
N
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Figure 13. Representative R
G
Input Bias
Current Distribution
Figure 11. Representative Input Offset Voltage
Distribution, Gain = 0 dB
Figure 10. Maximum Output Level vs Supply Voltage
Figure 14. Representative R
G
Input Offset
Current Distribution
Figure 12. Representative Input Offset Voltage
Distribution, Gain = 60 dB
-30 -10-25 -20 -15 -5 0 5 10 15 20 25 30
[uA]
-20 -10-15 -5 0 5 10 15 20
[mV]
-5 -1-4 -3 -2 012345
[uA]
-800 -400-600 -250 0 250 400 600 800
[uV]
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Applications
Figure 15. Simple THAT1580 Amplifier Circuit
Figure 16. 1580 Typical Application Circuit Using Single-Gang Pot for Gain Control.
THAT
1580
R
A
R
B
R
GF
R
GV
R2
1k0
IN1
IN+
IN-
OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
R1
1k0
C1
22p C11
100n
C2
22p
C3
220p
+15V
C9
100n
C10
100n
5k
5k
10
10k
V+
V-
-15V
RFI
PROTECTION
R
A
R
B
R
G
R
M
R
1
R
2
IN1 OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
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Figure 17. 1580 Typical Application Circuit Using Dual-Gang Pot for Gain Control
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1580
R
A
10k
R3
R
B
R
GF
8.66
R
GV1
R
GV2
R2
1k0
IN1
IN+
IN-
OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
R1
1k0
R4
10k
+15V
2k5
2k5
5k
5k V+
V-
-15V
CW
CW
RFI
PROTECTION
C1
22p
C2
22p
C3
220p
C11
100n
C9
100n
C10
100n
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V+
V-
IN2
RG2
RG1
IN1
OUT1 3
2
13
7
10
6
15
12
OUT2
-A
V
-A
V
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Figure 18. 1580 Equivalent Circuit with
Internal Protection Diodes.
Figure 19. 1580 Typical Application Circuit With Single-Gang Pot for Gain Control, AC-Coupled R
G
.
THAT
1580
R
A
R
B
R
GF
C
G
R
GV
R2
1k0
IN1
IN+
IN-
OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
R1
1k0
C1
22p
C2
22p
C3
220p
+15V
5k
5k
10 3300u
10k
V+
V-
-15V
RFI
PROTECTION
C11
100n
C9
100n
C10
100n
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Figure 20. 1580 Typical Application Circuit With Dual-Gang Pot for Gain Control, AC-Coupled R
G
.
THAT
1580
R
A
10k
R3
R
B
R
GF
8.66
C
G
R
GV1
R
GV2
R2
1k0
IN1
IN+
IN-
OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
R1
1k0
R4
10k
+15V
2k5
2k5
5k
3300u
5k V+
V-
-15V
CW
CW
RFI
PROTECTION
C1
22p
C2
22p
C3
220p
C11
100n
C9
100n
C10
100n
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=..-,
Figure 22. 1580 Typical Phantom Power Application Circuit With Dual-Gang Pot for Gain Control, AC-Coupled R
G
.
Figure 21. 1580 Typical Phantom Power Application Circuit With Single-Gang Pot for Gain Control, AC-Coupled R
G
.
THAT
1580
R
A
R
B
R
GF
C
G
R
GV
IN1 OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
+48V
RFI
PROTECTION PHANTOM POWER
FAULT
PROTECTION
PHANTOM POWER
R3
10
C4
47u
+
R4
10
C1
22p
C2
22p
+15V
-15V
D1
S1DB
D4
S1DB
D3
S1DB
D2
S1DB
+15V
-15V
R1
1k2
R6
6k81
R5
6k81
R2
1k2
C5
47u
+
IN+
IN- C3
220p
RFI
PROTECTION
C6
100p
5%
C7
100p
5%
C8
220p
+15V
D5
1N4148
D6
1N4148
V+
V-
-15V
5k
5k
10 3300u
10k
C11
100n
C9
100n
C10
100n
+48V
RFI
PROTECTION PHANTOM POWER
FAULT
PROTECTION
PHANTOM POWER
R3
10
C4
47u
+
R4
10
C1
22p
C2
22p
+15V
-15V
D1
S1DB
D4
S1DB
D3
S1DB
D2
S1DB
+15V
-15V
R1
1k2
R6
6k81
R5
6k81
R2
1k2
C5
47u
+
IN+
IN-
C3
220p
RFI
PROTECTION
C6
100p
5%
C7
100p
5%
C8
220p
+15V
2k5
2k5
5k
8.66
3300u
5k V+
V-
-15V
THAT
1580
R
A
10k
R10
R
B
R
GF
C
G
R
GV1
R
GV2
IN1 OUT+
OUT-
OUT1
OUT2
R
G
1
R
G
2
IN2
R11
10k
D5
1N4148
D6
1N4148
CW
CW
C11
100n
C9
100n
C10
100n
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Outputs
= + $
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> .
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Figure 23. Basic Application Circuit With THAT 5171/5173 Digital Controller.
RFI
PROTECTION
C6
100p
C7
100p
C8
220p
SYSTEM
RESET
+3.3V
+15V
+15V
22u NP
22u NP
C13
C12
-15V
IN1 V+
OUT1
OUT2
V-
RG2
RG1
IN2
C9
100n
C15
100n
CT
RT
C14
100n
C16
100n
C11
100n
C10
100n
R18
47k
R1
1k2
R2
1k2
R8
1M2
R7
1M2
IN+
IN-
Servo
Resistor
Network
with FET
Switches
Control
Logic
SPI
Interface
-15V
+3.3V
THAT
5171/5173
To: Host
MCU
-
-
+
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OUT+
OUT-
RG1
RG2
AGnd
IN2
IN1
SCAP2
SCAP1
SOUT1
SOUT2
SCLK
DIN
DOUT
CS
GPO1
GPO2
GPO3
GPO0
TRC
V-
Vdd
Vdd
DGnd
DGnd
BSY
RST
RB
20k
20k
RA
RG
V+
V-
V+
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PCB Layout Information
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Package and Soldering Information
Package Characteristics
Parameter Symbol Conditions Typ Units
Package Style See Fig. 24 for dimensions 16 Pin QFN
Thermal Resistance θ
JA
QFN package soldered to board
8
130 ºC/W
Environmental Regulation Compliance Complies with July 21, 2011 RoHS 2 requirements
Soldering Reflow Profile JEDEC JESD22-A113-D (250 ºC)
Moisture Sensitivity Level MSL Above-referenced JEDEC soldering profile 3
Figure 24. QFN-16 Surface Mount Package
Package Order Number
16 pin QFN 1580N16-U
Table 2. Ordering Information
Figure 25. QFN-16 Thermal Solder Pad
A
B
C
D
F
H
I
JK
Exposed
Thermal Pad
EG
0°
ITEM MILLIMETERS INCHES
A 4.00 ± 0.10 0.157 ± 0.004
B4.00 ± 0.10 0.157 ± 0.004
C 0.90 ± 0.05 0.035 ± 0.002
D0.30 ± 0.05 0.012 ± 0.002
E0.65 ± 0.05 0.026 ± 0.002
F0.40 ± 0.05 0.016 ± 0.002
G0.00 ~ 0.05 0.000 ~ 0.020
H0.20 ± 0.05 0.008 ± 0.002
I2.60 ± 0.05 0.102 ± 0.002
J 2.60 ± 0.05 0.102 ± 0.002
KC' 0.3 x 45° C‘ 0.012 x 45°
1
4
5
8
9 12
13
16
BOTTOM VIEW
0
0.45 mm
(0.018”)
1.05 mm
(0.041”)
1.65 mm
(0.065”)
2.10 mm
(0.083”)
0
0.45 mm
(0.018”)
1.05 mm
(0.041”)
1.65 mm
(0.065”)
2.10 mm
(0.083”)
Hole: 0.254 mm (0.010”)
Pad: 0.30 mm (0.012”)
8
PCB used for thermal characterization was two-layer board, 2” x 2”, with thermal pad on top and bottom as
shown in Figure 23.
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Revision History
Revision ECO Date Changes Page
U 9$9 >1 U
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.1
D
>
.0>B8.=>48.
1+
U
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Notes
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Notes
