3PEAK TP07 Precision RRO Operational Amplifier Features Description Low Offset Voltage: 150V Maximum The TP07 has very low input offset voltage (150V Low Drift: 0.9V/C maximum) that is obtained by trimming at the wafer High EMIRR: 84dB at 900MHz stage. These low offset voltages generally eliminate Low Noise: 19 nV/Hz(f= 1kHz) any need for external nulling. The TP07 also features Wide Input Voltage Range: 0 to 14V low input bias current (40 pA) and high open-loop Wide Supply Range: 1.35V to 18V gain (118 dB). The low offset and high open-loop gain Low Input Bias Current: 40pA Typical make the TP07 particularly useful for high gain Below-Ground (V-) Input Capability to -0.3V instrumentation applications. Rail-to-Rail Output Voltage Range Unit Gain Stable -40C to 125C Operation Range Robust 3kV - HBM and 2kV - CDM ESD Rating Direct or Update Replacement For OP07C,OP07D and OP37 The wide input voltage range combined with a high CMRR of 126 dB and high input impedance provide high accuracy in the noninverting circuit configuration. Excellent linearity and gain accuracy can be maintained even at high closed-loop gains. Stability of offsets and gain with time or variations in temperature is excellent. The accuracy and stability of the TP07, Applications even at high gain, made the TP07 an industry standard Wireless Base Station Control Circuits The TP07 is single channel version available in 8-pin Optical network Control Circuits SOIC package. I/V Converter Temperature Measurements Strain Gage Amplifier Medical Instrumentation for instrumentation applications. 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the property of their respective owners. Pin Configuration (Top View) TP07 8-Pin SOIC (-S Suffixes) NC 1 8 NC In 2 7 Vs In 3 6 Out Vs 4 5 NC TP07 Order Information Model Name TP07 Order Number TP07-SR www.3peakic.com.cn Package 8-Pin SOIC Transport Media, Quantity Marking Information Tape and Reel, 4,000 TP07 REV0.2 1 TP07 Precision RRO Operational Amplifier Absolute Maximum Ratings Note 1 Supply Voltage: V+ - V- Note 2..................................40.0V Input Voltage............................. Input Current: +IN, -IN V- - 0.3 to V+ + Note 3.......................... 0.3 Current at Supply Pins.............................. 60mA Operating Temperature Range...... ....-40C to 125C 20mA Maximum Junction Temperature................... 150C Output Current: OUT.................................... 35mA Storage Temperature Range.......... -65C to 150C Output Short-Circuit Duration Note 4............ Indefinite Lead Temperature (Soldering, 10 sec) ......... 260C Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The op amp supplies must be established simultaneously, with, or before, the application of any input signals. Note 3: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power supply, the input current should be limited to less than 10mA. Note 4: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. ESD, Electrostatic Discharge Protection Symbol Parameter Condition Minimum Level Unit HBM Human Body Model ESD MIL-STD-883H Method 3015.8 3 kV CDM Charged Device Model ESD JEDEC-EIA/JESD22-C101E 2 kV Thermal Resistance 2 Package Type JA JC Unit 8-Pin SOIC 158 43 /W REV0.2 www.3peakic.com.cn TP07 Precision RRO Operational Amplifier Electrical Characteristics The specifications are at TA = 27 C. VSUPPLY = 15V, VCM = VOUT =0V, RL = 2k, CL =100pF.Unless otherwise noted. SYMBOL VOS VOS TC IB PARAMETER UNITS -150 +150 V Input Offset Voltage Drift -40 C to 125 C TA = 27 C 40 pA TA = 85 C 550 pA TA = 125 C 7.7 nA 0.001 pA f = 0.1Hz to 10Hz 2.35 VRMS f = 1kHz Differential Common Mode VCM = -5.6V to 4V 19 nV/Hz Input Bias Current Input Voltage Noise Input Voltage Noise Density Input Capacitance PSRR Common Mode Rejection Ratio Common-mode Input Voltage Range Power Supply Rejection Ratio AVOL Open-Loop Large Signal Gain RLOAD = 2k VOL, VOH Output Swing from Supply Rail RLOAD = 100k ROUT Closed-Loop Output Impedance RO VCM MAX 50 0.9 Vn CMRR TYP VCM = VDD/2 Input Offset Current CIN MIN Input Offset Voltage IOS en CONDITIONS V/ C 4 2.5 120 V- -0.3 pF dB V+-2.0 V 130 dB 118 dB 50 mV G = 1, f =1kHz, IOUT = 0 0.01 Open-Loop Output Impedance f = 1kHz, IOUT = 0 125 ISC Output Short-Circuit Current Sink or source current 35 mA VDD Supply Voltage IQ 100 2.7 Quiescent Current per Amplifier 36 V 2.2 mA PM Phase Margin RLOAD = 2k, CLOAD = 100pF 55 GM Gain Margin RLOAD = 2k, CLOAD = 100pF 8 dB Gain-Bandwidth Product f = 1kHz AV = 1, VOUT = 0V to 10V, CLOAD = 100pF, RLOAD = 2k 1 MHz 6 V/s 210 1 1 110 kHz GBWP SR FPBW tS Xtalk Slew Rate Full Power Bandwidth Note 1 Settling Time, 0.1% Settling Time, 0.01% Channel Separation AV = -1, 10V Step f = 1kHz, RL = 2k s dB Note 1: Full power bandwidth is calculated from the slew rate FPBW = SR/ * VP-P www.3peakic.com.cn REV0.2 3 TP07 Precision RRO Operational Amplifier Typical Performance Characteristics VS = 15V, VCM = 0V, RL = Open, unless otherwise specified. Offset Voltage Production Distribution Offset Voltage vs. Temperature 18 120 16 100 Offset Voltage (V) 14 Population 12 10 8 6 80 60 40 20 4 0 2 -20 0 -40 -60 -40 -20 0 20 Offset Voltage(V) Input Voltage Noise Spectral Density 80 100 120 140 1E-08 Input Bias Current (A) VDD= 3 0 V RL= 1 k n Vz/ ) N o i s e (H 60 Input Bias Current vs. Temperature 1k 100 10 1 0.1 1 10 100 1k 10k 100k 1M 1E-10 1E-12 1E-14 1E-16 1E-18 -50 0 Frequency (Hz) Common Mode Rejection Ratio 50 Temperature (C) 100 Quiescent Current vs. Temperature 1.4 Supply Current (mA) 150 CMRR(dB) 40 Temperature ( 100 1.2 1 0.8 0.6 0.4 0.2 50 0 -15 -12 4 -9 -6 -3 0 3 6 9 12 15 Common Mode Voltage (V) REV0.2 -50 0 50 100 150 Temperature () www.3peakic.com.cn TP07 Typical Performance Characteristics Precision RRO Operational Amplifier VS = 15V, VCM = 0V, RL = Open, unless otherwise specified.(Continue) Power-Supply Rejection Ratio vs. Temperature CMRR vs. Temperature CM RR(dB) PSRR (dB) 124 122 120 118 116 -50 0 50 Temperature (C) 132 130 128 126 124 122 120 118 116 114 112 110 -50 100 50 100 T em p er atu r e (C) CMRR vs. Frequency 3 140 2.5 120 CMRR(dB) noise(uV/Hz) Voltage Noise Spectral Density vs. Frequency 0 100 2 1.5 80 60 1 40 0.5 20 0 0.1 10 1k 100k Frequency(Hz) www.3peakic.com.cn 10M 0 0.1 10 1k 100k 10M Frequency (Hz) REV0.2 5 TP07 Precision RRO Operational Amplifier Pin Functions with a capacitor of 0.1F as close to the part as possible. -IN: Inverting Input of the Amplifier. Voltage range of this pin can go from V- to (V+ - 2.0V). OUT: Amplifier Output. The voltage range extends to within milli-volts of each supply rail. +IN: Non-Inverting Input of Amplifier. This pin has the same voltage range as -IN. Operation V+ or +VS: Positive Power Supply. Typically the voltage is from 2.7V to 36V. Split supplies are possible as long as the voltage between V+ and V- is between 2.7V and 36V. A bypass capacitor of 0.1F as close to the part as possible should be used between power supply pins or between supply pins and ground. The TP07 have input signal range from V- to (V+ - 2.0V). The output can extend all the way to the supply rails. The input stage is comprised of a PMOS differential amplifier. The Class-AB control buffer and output bias stage uses a proprietary compensation technique to take full advantage of the process technology to drive very high capacitive loads. This is evident from the transient over shoot measurement plots in the Typical Performance Characteristics. V- or -VS: Negative Power Supply. It is normally tied to ground. It can also be tied to a voltage other than ground as long as the voltage between V+ and V- is from 2.7V to 36V. If it is not connected to ground, bypass it Applications Information Driving Large Capacitive Load The TP07 provides stable operation with load capacitance of up to 100 pF and 10 V swings; larger capacitances should be decoupled with a 50 decoupling resistor. Stray thermoelectric voltages generated by dissimilar metals at the contacts to the input terminals can degrade drift performance. Therefore, best operation is obtained when both input contacts are maintained at the same temperature, preferably close to the package temperature. Cc TP07 ei 820pF Rc 750 eo TP07 eo CL 5000pF Cc 0.47F ei R2 Rc 2 k 10 CL 5000pF Driving Large Capacitive Loads PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5pA of current to flow, 6 REV0.2 www.3peakic.com.cn TP07 Precision RRO Operational Amplifier which is greater than the TP07 OPA's input bias current at +27C (40pA, typical). It is recommended to use multi-layer PCB layout and route the OPA's -IN and +IN signal under the PCB surface. The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 2 for Inverting Gain application. 1. For Non-Inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common Mode input voltage. 2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op-amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. Guard Ring VIN+ VIN- +VS Figure 2 The Layout of Guard Ring Ground Sensing and Rail to Rail Output The TP07 family has excellent output drive capability. It drives 2k load directly with good THD performance. The output stage is a rail-to-rail topology that is capable of swinging to within 50mV of either rail. The maximum output current is a function of total supply voltage. As the supply voltage to the amplifier increases, the output current capability also increases. Attention must be paid to keep the junction temperature of the IC below 150C when the output is in continuous short-circuit. The output of the amplifier has reverse-biased ESD diodes connected to each supply. The output should not be forced more than 0.3V beyond either supply, otherwise current will flow through these diodes. Power Supply Layout and Bypass The TP07 OPA's power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01F to 0.1F) within 2mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1F or larger) within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. Ground layout improves performance by decreasing the amount of stray capacitance and noise at the OPA's inputs and outputs. To decrease stray capacitance, minimize PC board lengths and resistor leads, and place external components as close to the op amps' pins as possible. Proper Board Layout To ensure optimum performance at the PCB level, care must be taken in the design of the board layout. To avoid leakage currents, the surface of the board should be kept clean and free of moisture. Coating the surface creates a barrier to moisture accumulation and helps reduce parasitic resistance on the board. Keeping supply traces short and properly bypassing the power supplies minimizes power supply disturbances due to output current variation, such as when driving an ac signal into a heavy load. Bypass capacitors should be connected as closely as possible to the device supply pins. Stray capacitances are a concern at the outputs and the inputs of the amplifier. It is recommended that signal traces be kept at least 5mm from supply lines to minimize coupling. A variation in temperature across the PCB can cause a mismatch in the Seebeck voltages at solder joints and other points where dissimilar metals are in contact, resulting in thermal voltage errors. To minimize these thermocouple effects, orient resistors so heat sources warm both ends equally. Input signal paths should contain matching numbers and types of components, where possible to match the number and type of thermocouple junctions. For example, dummy components such as zero value resistors can be used to match real resistors in the opposite input path. www.3peakic.com.cn REV0.2 7 TP07 Precision RRO Operational Amplifier Matching components should be located in close proximity and should be oriented in the same manner. Ensure leads are of equal length so that thermal conduction is in equilibrium. Keep heat sources on the PCB as far away from amplifier input circuitry as is practical. The use of a ground plane is highly recommended. A ground plane reduces EMI noise and also helps to maintain a constant temperature across the circuit board. R4 22k R1 R2 R3 2.7k 22k 10k VIN C1 3000pF C3 100pF TP07 VO C2 2000pF fp 20kHz Three-Pole Low-Pass Filter 8 REV0.2 www.3peakic.com.cn TP07 Precision RRO Operational Amplifier Package Outline Dimensions SO-8 (SOIC-8) A2 C L1 A1 e E D Symbol E1 b www.3peakic.com.cn Dimensions Dimensions In In Millimeters Inches Min Max Min Max A1 0.100 0.250 0.004 0.010 A2 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 C 0.190 0.250 0.007 0.010 D 4.780 5.000 0.188 0.197 E 3.800 4.000 0.150 0.157 E1 5.800 6.300 0.228 0.248 e 1.270 TYP 0.050 TYP L1 0.400 1.270 0.016 0.050 0 8 0 8 REV0.2 9