INTEGRATED CIRCUITS DIVISION
DS-CPC5001-R02 www.ixysic.com 1
Features
Isolates One Signal in Each Direction
Operates From 2.7V to 5.5V
Buffered Inputs - No External LED Drive Required
Voltage Level Translation
Hysteresis at Inputs for Noise Rejection
Slew-Limited Drivers Reduce EMI
Power-Down to Hi-Z Does Not Load Outputs
5Mbaud Data Rate
8-Pin DIP or Surface Mount Packages
Applications
Isolated Signal Monitoring and Control
Power-Over-Ethernet
Power Supply High-Side Interface
Logic-Level Translation
Microprocessor System Interface
Inter-Integrated Circuit (I2C) Interface
Serial Peripheral Interface (SPI)
Full Duplex Communication
Isolated Line Receiver
Isolated Data Acquisition Systems
Approvals
UL Recognized Component: File E76270
EN/IEC 60950: Certificate B 12 11 82667 001
Description
The CPC5001 is a dual, non-inverting digital optical
isolator with buffered-logic inputs and open-drain
outputs. Channel 1 propagates a signal from Side A to
Side B, while Channel 2 sends a signal from Side B to
Side A. It provides galvanic isolation up to 3750Vrms.
When the two sides are powered by supplies with
different voltages, it also functions as a logic level
translator for supply voltages as low as 2.7V or as high
as 5.5V. Available in 8-pin DIP and surface mount
packages, it functionally replaces two logic buffers and
two single-channel optoisolators. Internal bandgap
references regulate the LED drive currents to 3mA to
reduce peak power requirements.
Unlike transformer or capacitive isolators, optical
isolation passes DC signals, and does not need to be
clocked periodically to refresh state. Buffered signals
will always return to their proper value after a transient
interruption at either side.
Ordering Information
Figure 1. CPC5001 Functional Block Diagram
Part Description
CPC5001G 8-Pin DIP in Tubes (50 / Tube)
CPC5001GS 8-Pin Surface Mount (50 / Tube)
CPC5001GSTR 8-Pin Surface Mount (1000 / Reel)
A
GNDA
B
GNDB
V
DDA
GNDA
V
DDA
CHANNEL 2
V
DDB
LED
IN2
V
DDA
OUT2
A
V
DDA
LED
IN1
V
DDB
OUT1
B
GNDB
V
DDB
V
DDB
CHANNEL 1
1
2
3
4
8
7
6
5
CPC5001
Dual, One Channel Each Direction
Digital Optical Isolator
INTEGRATED CIRCUITS DIVISION
CPC5001
2www.ixysic.com R02
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.6 General Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.7 Electrical Parametric Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.8 Timing Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.9 Common Mode Rejection Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.3 Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
INTEGRATED CIRCUITS DIVISION
CPC5001
R02 www.ixysic.com 3
1 Specifications
1.1 Package Pinout
1.2 Pin Description
1.3 Absolute Maximum Ratings
Electrical Absolute Maximum Ratings are at 25°C. Voltages with respect to local ground: GNDA or GNDB.
1 Derate total power by 7.5mW/°C above 25°C.
Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device.
Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not
implied.
1.4 ESD Rating
1.5 Thermal Characteristics
1
2
3
4
8
7
6
5
Pin# Name Description
1IN1
Input, Channel 1
2GNDA
Supply Return - Side A
3OUT2
Output, Channel 2
4VDDA Supply Voltage - Side A
5IN2
Input, Channel 2
6 GNDB Supply Return - Side B
7OUT1
Output, Channel 1
8VDDB Supply Voltage - Side B
Parameter Symbol Min Max Units
Supply Voltage, Side A VDDA -0.5 +6.5 V
Supply Voltage, Side B VDDB -0.5 +6.5 V
Input Voltage VIOx -0.3 VDDx + 0.3 V
Total Package Power Dissipation 1PTOT -800mW
Isolation Voltage, Input to Output
-60 Seconds 3750 - Vrms
2 Seconds 4500 -
Operating Temperature T
A-40 +85 °C
Operating Relative Humidity
(Non-condensing) RH 585%
Storage Temperature TSTG -50 +125 °C
ESD Rating (Human Body Model)
4000V
Parameter Conditions Symbol Min Typ Max Units
Thermal Resistance, Junction to Ambient Free Air RJA -114 - °C/W
INTEGRATED CIRCUITS DIVISION
CPC5001
4www.ixysic.com R02
1.6 General Conditions
Unless otherwise specified, minimum and maximum values are guaranteed by production testing requirements.
Typical values are characteristic of the device at 25°C, and are the result of engineering evaluations. They are
provided for information purposes only, and are not part of the manufacturing testing requirements. Specifications
cover the operating temperature range TA = -40°C to +85°C, unless otherwise specified.
Side A is the same as Side B, and Channel 1 is the same as Channel 2; therefore, the electrical and timing
specifications apply to both Sides/Channels.
1.7 Electrical Parametric Specifications
1.8 Timing Specifications
Note 1: See “Switching Waveforms” on page 5.
1.9 Common Mode Rejection Specifications
Parameter Conditions Symbol Min Typ Max Units
Electrical
Supply Voltage ISINK=6mA VDD 2.7 - 5.5 V
Supply Current VDD=3.3V, ISINK=0mA
IDD
-4.3-
mA
ISINK=6mA -4.4-
VDD=5.5V, ISINK=0mA, T
A=25°C -57.5
Leakage Current IN1=OUT2=VDDA, IN2=OUT1=VDDB ILEAK -0.0110
A
Falling Input Low Threshold 2.7V < VDD < 5.5V VIL 0.3VDD 0.42VDD -V
Rising Input High Threshold 2.7V < VDD < 5.5V VIH -0.57VDD 0.7VDD
Hysteresis 2.7V < VDD < 5.5V VHYST -0.15VDD -V
Output Drive VDD=2.7V, ISINK=3mA
VOL
- 0.21 0.35
V
VDD=2.7V, ISINK=6mA -0.420.7
VDD=3.3V, ISINK=6mA -0.38-
Output Temperature Coefficient 2.7V < VDD < 5.5V, ISINK=6mA TC -+1.2-mV/°C
Parameter Conditions Symbol Min Typ Max Units
Timing
Clock Frequency ISINK=6mA, CLOAD=20pF fMAX -5-MHz
Propagation Delay (see Note 1) VDDA=VDDB=3.3V,
RPUA=475, RPUB=475
CIN_A=CIN_B=20pF
VIN=0.5VDD_IN to VOUT=0.5VDD_OUT
ns
High to Low tPHL 40 60 100
Low to High tPLH 40 135 250
Pulse Width Distortion tPLH - tPHL PWD -25 75 170 ns
Parameter Conditions Symbol Min Typ Max Units
Common Mode Rejection
Common Mode Transient Immunity VCM=20VP-P , VDD=3.3V, T
A=25°C
VOUT = High VOUT>2V CMH5--
kV/s
VOUT = Low VOUT<0.8V CML7--
INTEGRATED CIRCUITS DIVISION
CPC5001
R02 www.ixysic.com 5
2 Switching Waveforms
0.5 • V
DD
= 1.65V
0.5 • V
DD
= 1.65V
t
PLH
0
1.0
2.0
3.0
4.0
0
1.0
2.0
3.0
4.0
0 0.275 0.55 0.825 1.1
VOLTSVOLTS
TIME (μs)
TIME (μs)V
IN
V
OUT
t
PHL
0 0.275 0.55 0.825 1.1
INTEGRATED CIRCUITS DIVISION
CPC5001
6www.ixysic.com R02
3 Performance Characteristics
4 Functional Description
4.1 Introduction
The CPC5001 combines the functions of two input
buffer/LED driver gates and two unidirectional logic
optoisolators in a single 8-pin package. The isolators
are arranged for one input and one output at each side
of the isolation barrier, which enables Channel 1 to
send signals from side A to Side B, and Channel 2 to
send signals from the Side B to the Side A. If different
supply voltage levels are used at each side, then the
part, in conjunction with its external pullup resistors,
will perform logic level translation for VDD between
2.7V and 5.5V at either side.
The part provides galvanic isolation for voltages up to
3750Vrms. Its CMOS circuitry includes a bandgap
reference to ensure that the LEDs receive consistent
drive current levels over the allowed range of VDD
voltages. The supply currents at IDDA and IDDB are
much smaller than those required by bipolar solutions,
and are stable over temperature. The circuits also
ensure that the IDD current into each VDD package pin
remains constant for both high and low input signals.
This can greatly reduce the size of external decoupling
capacitors when compared with optoisolators
fabricated in a bipolar process wherein the supply
current can double when the LED is on.
The rotationally symmetric pinout ensures that the
part operates normally even if installed with 180°
rotation.
Temperature (ºC)
-40 -20 0 20 40 60 80100
Output Voltage (V)
0.25
0.30
0.35
0.40
0.45
0.50
0.55
Typical Output Voltage, VOLA , VOLB
vs. Temperature
(ISINKA=6mA)
VDD=2.7V
VDD=3.3V
VDD=5.5V
Supply Voltage (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Supply Current (mA)
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Supply Current IDDA, IDDB
vs. Supply Voltage
Supply Voltage (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Voltage Out (V)
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
Logic-Low Output Level VOL
vs. Supply Voltage
(ISINK=6mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
Propagation Delay (ns)
40
60
80
100
120
140
160
Propagation Delay A to B and B to A
(V
DD
=3.3V, C
L
=20pF, R
PU
=475Ω)
t
PHL
t
PLH
Temperature (ºC)
-40 -20 0 20 40 60 80 100
Supply Current (mA)
4.5
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
5.5
Supply Current IDDA, IDDB
vs. Temperature
(VDD=5.5V, RPU=820Ω)
Supply Voltage (V)
V
X
/ V
DD
0.30
0.35
0.40
0.45
0.50
0.55
0.60
0.65
0.70
VIL Falling, VIH Rising
vs. Supply Voltage
VIH
VIL
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
INTEGRATED CIRCUITS DIVISION
CPC5001
R02 www.ixysic.com 7
5 Manufacturing Information
5.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and information in that standard as well as
to any limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
5.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
5.3 Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of
J-STD-020 must be observed.
5.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable. Since IXYS Integrated Circuits Division employs the use of silicone coating as an
optical waveguide in many of its optically isolated products, the use of a short drying bake may be necessary if a wash
is used after solder reflow processes. Chlorine-based or Fluorine-based solvents or fluxes should not be used.
Cleaning methods that employ ultrasonic energy should not be used.
Device Moisture Sensitivity Level (MSL) Rating
CPC5001G / CPC5001GS MSL 1
Device Maximum Temperature x Time
CPC5001G / CPC5001GS 250°C for 30 seconds
INTEGRATED CIRCUITS DIVISION
CPC5001
8www.ixysic.com R02
5.5 Mechanical Dimensions
5.5.1 CPC5001G Package
5.5.2 CPC5001GS Package
Dimensions
mm
(inches)
PCB Land Pattern
2.540 ± 0.127
(0.100 ± 0.005)
9.652 ± 0.381
(0.380 ± 0.015)
6.350 ± 0.127
(0.250 ± 0.005)
9.525 ± 0.254
(0.375 ± 0.010)
0.457 ± 0.076
(0.018 ± 0.003)
0.813 ± 0.102
(0.032 ± 0.004)
4.445 ± 0.127
(0.175 ± 0.005)
7.620 ± 0.254
(0.300 ± 0.010)
0.635 ± 0.127
(0.025 ± 0.005)
0.254 ± 0.0127
(0.010 ± 0.0005)
2.54
(0.10)
8.90
(0.3503)
1.65
(0.0649)
0.65
(0.0255)
3.302 ± 0.051
(0.130 ± 0.002)
Pin 1
INTEGRATED CIRCUITS DIVISION
CPC5001
R02 www.ixysic.com 9
5.5.3 CPC5001GS Tape & Reel Information
Dimensions
mm
(inches)
User Direction of Feed
NOTES:
1. Dimensions carry tolerances of EIA Standard 481-2
2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
Embossment
Embossed Carrier
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
K1
=4.20
(0.165)
0
K =4.90
(0.193)
P=12.00
(0.472)
W=16.00
(0.63)
Bo=10.30
(0.406)
Ao=10.30
(0.406)
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-CPC5001-R02
©Copyright 2013, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
12/9/2013