SCA61T Series
Murata Electronics Oy Subject to changes 1/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
Sensing
element
SPI interface
Self test 1
Signal conditioning
and filtering
A/D conversion
EEPROM
calibration
memory
6 ST
8 VDD
4 GND
7 OUT
1 SCK
2 MISO
3 MOSI
5 CSB
Temperature
Sensor
THE SCA61T INCLINOMETER SERIES
The SCA61T Series is a 3D-MEMS-based single axis inclinometer family that provides instrumentation grade
performance for leveling applications. Low temperature dependency, high resolution and low noise together with
robust sensing element design make the SCA61T ideal choice for leveling instruments. The Murata inclinometers
are insensitive to vibration, due to their over damped sensing elements and can withstand mechanical shocks of
20000 g.
Features
Measuring ranges ±30° SCA61T-FAHH1G
and ± 90° SCA61T-FA1H1G
0.0025° resolution (10 Hz BW, analog output)
Sensing element controlled over damped
frequency response (-3dB 18Hz)
Robust design, high shock durability (20000g)
Excellent stability over temperature and time
Single +5 V supply
Ratiometric analog voltage outputs
Digital SPI inclination and temperature output
Comprehensive failure detection features
o True self test by deflecting the sensing
elements’ proof mass by electrostatic force.
o Continuous sensing element interconnection
failure check.
o Continuous memory parity check.
RoHS compliant
Compatible with Pb-free reflow solder process
Applications
Platform leveling and stabilization
Leveling instruments
Acceleration and motion measurement
Figure 1. Functional block diagram
Product Family Specification
Data Sheet
SCA61T Series
Murata Electronics Oy Subject to changes 2/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
TABLE OF CONTENTS
The SCA61T Inclinometer Series ............................................................................................. 1
Features............................................................................................................................................. 1
Applications ...................................................................................................................................... 1
Table of Contents...................................................................................................................... 2
1 Electrical Specifications ..................................................................................................... 3
1.1 Absolute Maximum Ratings ................................................................................................... 3
1.2 Performance Characteristics .................................................................................................. 3
1.3 Electrical Characteristics ....................................................................................................... 4
1.4 SPI Interface DC Characteristics ............................................................................................ 4
1.5 SPI Interface AC Characteristics ............................................................................................ 4
1.6 SPI Interface Timing Specifications ....................................................................................... 5
1.7 Electrical Connection.............................................................................................................. 6
1.8 Typical Performance Characteristics .................................................................................... 6
1.9 Additional External Compensation ........................................................................................ 7
2 Functional Description ....................................................................................................... 9
2.1 Measuring Directions .............................................................................................................. 9
2.2 Voltage to Angle Conversion ................................................................................................. 9
2.3 Ratiometric Output ................................................................................................................ 10
2.4 SPI Serial Interface ................................................................................................................ 10
2.5 Digital Output to Angle Conversion ..................................................................................... 12
2.6 Self Test and Failure Detection Modes ................................................................................ 13
2.7 Temperature Measurement .................................................................................................. 14
3 Application Information .................................................................................................... 15
3.1 Recommended Circuit Diagrams and Printed Circuit Board Layouts ............................... 15
3.2 Recommended Printed Circuit Board Footprint ................................................................. 16
4 Mechanical Specifications and Reflow Soldering .......................................................... 16
4.1 Mechanical Specifications (Reference only) ....................................................................... 16
4.2 Reflow Soldering ................................................................................................................... 17
SCA61T Series
Murata Electronics Oy Subject to changes 3/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
1 Electrical Specifications
The SCA61T product family comprises two versions, the SCA61T-FAHH1G and the SCA61T-
FA1H1G, that differ in measurement range. The product version specific performance
specifications are listed in the following table below. All other specifications are common to both
versions. Vdd=5.00V and ambient temperature unless otherwise specified.
1.1 Absolute Maximum Ratings
Supply voltage (VDD)
Voltage at input / output pins
Storage temperature
Operating temperature
Mechanical shock
-0.3 V to +5.5V
-0.3V to (VDD + 0.3V)
-55°C to +125°C
-40°C to +125°C
Drop from 1 meter on a concrete surface
(20000g). Powered or non-powered
1.2 Performance Characteristics
Parameter
Condition
SCA61T-
FAHH1G
SCA61T-
FA1H1G
Units
Measuring range
Nominal
±30
±0.5
±90
±1.0
°
g
Frequency response
–3dB LP (1
8-28
8-28
Hz
Offset (Output at 0g)
Ratiometric output
Vdd/2
Vdd/2
V
Offset calibration error
±0.11
±0.23
°
Offset Digital Output
1024
1024
LSB
Sensitivity
between 0…1° (2
4
70
2
35
V/g
mV/°
Sensitivity calibration
error
±0.5
±0.5
%
Sensitivity Digital Output
1638
819
LSB / g
Offset temperature
dependency
-25…85°C (typical)
±0.008
±0.008
°/°C
-40…125°C (max)
±0.86
±0.86
°
Sensitivity temperature
dependency
-25...85°C (typical)
±0.014
±0.014
%/°C
-40…125°C (max)
-2.5...+1
-2.5...+1
%
Typical non-linearity
Measuring range
±0.11
±0.57
°
Digital output resolution
between 0…1° (2
11
0.035
11
0.07
Bits
° / LSB
Output noise density
From DC...100Hz
0.0008
0.0008
Hz/
Analog output resolution
Bandwidth 10 Hz (3
0.0025
0.0025
°
Ratiometric error
Vdd = 4.75...5.25V
±1
±1
%
Cross-axis sensitivity
Max.
4
4
%
Note 1. The frequency response is determined by the sensing element’s internal gas damping.
Note 2. The angle output has SIN curve relationship to voltage output refer to paragraph 2.2
Note 3. Resolution = Noise density * √(bandwidth)
SCA61T Series
Murata Electronics Oy Subject to changes 4/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
1.3 Electrical Characteristics
Parameter
Condition
Min.
Typ
Max.
Units
Supply voltage Vdd
4.75
5.0
5.25
V
Current
consumption
Vdd = 5 V; No load
2.5
4
mA
Operating
temperature
-40
+125
°C
Analog resistive
output load
Vout to Vdd or GND
10
kOhm
Analog capacitive
output load
Vout to Vdd or GND
20
nF
Start-up delay
Reset and parity check
10
ms
1.4 SPI Interface DC Characteristics
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
1.4.1.1.1 Input terminal CSB
Pull up current
VIN = 0 V
IPU
13
22
35
A
Input high voltage
VIH
4
Vdd+0.3
V
Input low voltage
VIL
-0.3
1
V
Hysteresis
VHYST
0.23*Vdd
V
Input capacitance
CIN
2
pF
1.4.1.1.2 Input terminal MOSI, SCK
Pull down current
VIN = 5 V
IPD
9
17
29
A
Input high voltage
VIH
4
Vdd+0.3
V
Input low voltage
VIL
-0.3
1
V
Hysteresis
VHYST
0.23*Vdd
V
Input capacitance
CIN
2
pF
1.4.1.1.3 Output terminal MISO
Output high voltage
I > -1mA
VOH
Vdd-
0.5
V
Output low voltage
I < 1 mA
VOL
0.5
V
Tristate leakage
0 < VMISO <
Vdd
ILEAK
5
100
pA
1.5 SPI Interface AC Characteristics
Parameter
Condition
Min.
Typ.
Max.
Units
Output load
@500kHz
1
nF
SPI clock frequency
500
kHz
Internal A/D conversion time
150
s
Data transfer time
@500kHz
38
s
SCA61T Series
Murata Electronics Oy Subject to changes 5/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
CSB
SCK
MOSI
MISO
TLS1
TCH
THOL
TSET
TVAL1
TVAL2
TLZ
TLS2
TLH
MSB in
MSB out
LSB in
LSB out
DATA out
DATA in
TCL
1.6 SPI Interface Timing Specifications
Parameter
Conditions
Symbol
Min.
Typ.
Max.
Unit
Terminal CSB, SCK
Time from CSB (10%)
to SCK (90%)
TLS1
120
ns
Time from SCK (10%)
to CSB (90%)
TLS2
120
ns
Terminal SCK
SCK low time
Load
capacitance at
MISO < 2 nF
TCL
1
s
SCK high time
Load
capacitance at
MISO < 2 nF
TCH
1
s
Terminal MOSI, SCK
Time from changing MOSI
(10%, 90%) to SCK (90%).
Data setup time
TSET
30
ns
Time from SCK (90%) to
changing MOSI (10%,90%).
Data hold time
THOL
30
ns
Terminal MISO, CSB
Time from CSB (10%) to stable
MISO (10%, 90%).
Load
capacitance at
MISO < 15 pF
TVAL1
10
100
ns
Time from CSB (90%) to high
impedance state of
MISO.
Load
capacitance at
MISO < 15 pF
TLZ
10
100
ns
Terminal MISO, SCK
Time from SCK (10%) to stable
MISO (10%, 90%).
Load
capacitance at
MISO < 15 pF
TVAL2
100
ns
Terminal CSB
Time between SPI cycles, CSB at high
level (90%)
TLH
15
s
When using SPI commands RDAX, RDAY,
RWTR: Time between SPI cycles, CSB at
high level (90%)
TLH
150
s
Figure 2. Timing diagram for SPI communication
SCA61T Series
Murata Electronics Oy Subject to changes 6/17
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Temperature dependency of SCA61T offset
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
-40 -20 0 20 40 60 80 100 120
Temp [°C]
Offset error [degrees]
average
+3 sigma
-3 sigma
specification
limit
specification
limit
1.7 Electrical Connection
If the SPI interface is not used SCK (pin1), MISO (pin3), MOSI (pin4) and CSB (pin7) must be left
floating. Self-test can be activated applying logic “1” (positive supply voltage level) to ST pin (pin 6).
If ST feature is not used pin 6 must be left floating or connected to GND. Inclination signal is
provided from pin OUT.
Figure 3. SCA61T electrical connection
No.
Node
I/O
Description
1
SCK
Input
Serial clock
2
MISO
Output
Master in slave out; data output
3
MOSI
Input
Master out slave in; data input
4
GND
Supply
Ground
5
CSB
Input
Chip select (active low)
6
ST
Input
Self test input
7
Out
Output
Output
8
VDD
Supply
Positive supply voltage (+5V DC)
1.8 Typical Performance Characteristics
Typical offset and sensitivity temperature dependencies of SCA61T are presented in following
diagrams. These results represent the typical performance of SCA61T components. The mean
value and 3 sigma limits (mean ± 3 standard deviation) and specification limits are presented in
following diagrams. The 3 sigma limits represents 99.73% of the SCA61T population.
Figure 4. Typical temperature dependency of the SCA61T offset
1 SCK
2 MISO
3 MOSI
4 GND
8 VDD
7 OUT
6 ST
5 CSB
SCA61T Series
Murata Electronics Oy Subject to changes 7/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
)100/1(* ScorrSENSSENScomp
0362.0*0019.0*00011.0 2 TTScorr
OffcorrOffsetOFFSETcomp
0514.0*0032.0*0000857.0*0000005.0 23 TTTOffcorr
Temperature dependency of SCA61T sensitivity
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
-40 -20 0 20 40 60 80 100 120
Temp [°C]
sensitivity error [%]
average
+3 sigma
-3 sigma
specification
limit
specification
limit
Figure 5. Typical temperature dependency of SCA61T sensitivity
1.9 Additional External Compensation
To achieve the best possible accuracy, the temperature measurement information and typical
temperature dependency curves can be used for SCA61T offset and sensitivity temperature
dependency compensation. The equation for the fitted 3rd order polynome curve for offset
compensation is:
Where:
Offcorr: 3rd order polynome fitted to average offset temperature dependency curve
T temperature in °C (Refer to paragraph 2.7 Temperature Measurement)
The calculated compensation curve can be used to compensate for the temperature dependency of
the SCA61T offset by using the following equation:
Where:
OFFSETcomp temperature compensated offset in degrees
Offset Nominal offset in degrees
The equation for the fitted 2nd order polynome curve for sensitivity compensation is:
Where:
Scorr: 2nd order polynome fitted to average sensitivity temperature dependency curve
T temperature in °C
The calculated compensation curve can be used to compensate the temperature dependency of
the SCA61T sensitivity by using the following equation:
Where:
SENScomp temperature compensated sensitivity
SCA61T Series
Murata Electronics Oy Subject to changes 8/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
Temperature dependency of externally compensated SCA61T offset
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
-40 -20 0 20 40 60 80 100 120
Temp [°C]
Offset error [degrees]
average
+3 sigma
-3 sigma
Temperature dependency of externally compensated SCA61T sensitivity
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
-40 -20 0 20 40 60 80 100 120
Temp [°C]
sensitivity error [%]
average
+3 sigma
-3 sigma
SENS Nominal sensitivity (4V/g SCA61T-FAHH1G, 2V/g SCA61T-FA1H1G)
The typical offset and sensitivity temperature dependency after external compensation is shown in
the following diagrams.
Figure 6. The temperature dependency of externally compensated SCA61T offset
Figure 7. The temperature dependency of externally compensated SCA61T sensitivity
SCA61T Series
Murata Electronics Oy Subject to changes 9/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
ySensitivit
OffsetVout
2 Functional Description
2.1 Measuring Directions
X-axis
Figure 8. The measuring direction of the SCA61T
2.2 Voltage to Angle Conversion
Analog output can be transferred to angle using the following equation for conversion:
ySensitivit
OffsetVout
arcsin
where: Offset = output of the device at 0° inclination position, Sensitivity is the sensitivity of the
device and VDout is the output of SCA61T. The nominal offset is 2.5 V and the sensitivity is 4 V/g
with SCA61T-FAHH1G and 2 V/g with SCA61T-FA1H1G.
Angles close to 0° inclination can be estimated quite accurately with straight line conversion but for
best possible accuracy arcsine conversion is recommended to be used. The following table shows
the angle measurement error if straight line conversion is used.
Straight line conversion equation:
Where: Sensitivity = 70mV/° with SCA61T-FAHH1G or Sensitivity= 35mV/° with SCA61T-FA1H1G
Tilt angle [°]
Straight line conversion error [°]
0
0
1
0.0027
2
0.0058
3
0.0094
4
0.0140
5
0.0198
10
0.0787
15
0.2185
30
1.668
VOUT > VOUT =2.5V > VOUT
SCA61T Series
Murata Electronics Oy Subject to changes 10/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
2.3 Ratiometric Output
Ratiometric output means that zero offset point and sensitivity of the sensor are proportional to the
supply voltage. If the SCA61T supply voltage is fluctuating, the SCA61T output will also vary. When
the same reference voltage for both the SCA61T sensor and the measuring part (A/D-converter) is
used, the error caused by reference voltage variation is automatically compensated for.
2.4 SPI Serial Interface
A Serial Peripheral Interface (SPI) system consists of one master device and one or more slave
devices. The master is defined as a micro controller providing the SPI clock and the slave as any
integrated circuit receiving the SPI clock from the master. The ASIC in Murata Technologies’
products always operates as a slave device in master-slave operation mode.
The SPI has a 4-wire synchronous serial interface. Data communication is enabled with a low
active Slave Select or Chip Select wire (CSB). Data is transmitted with a 3-wire interface consisting
of wires for serial data input (MOSI), serial data output (MISO) and serial clock (SCK).
DATA OUT (MOSI)
DATA IN (MISO)
SERIAL CLOCK (SCK)
SS0
SS1
SS2
SS3
MASTER
MICROCONTROLLER
SI
SO
SCK
CS
SLAVE
SI
SO
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
Figure 9. Typical SPI connection
The SPI interface in Murata products is designed to support any micro controller that uses an SPI
bus. Communication can be carried out by a software or hardware based SPI. Please note that in
the case of a hardware based SPI, the received acceleration data is 11 bits. The data transfer
uses the following 4-wire interface:
MOSI master out slave in µP → SCA61T
SCA61T Series
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MISO master in slave out SCA61T → µP
SCK serial clock µP → SCA61T
CSB chip select (low active) µP → SCA61T
Each transmission starts with a falling edge of CSB and ends with the rising edge. During
transmission, commands and data are controlled by SCK and CSB according to the following rules:
commands and data are shifted; MSB first, LSB last
each output data/status bits are shifted out on the falling edge of SCK (MISO line)
each bit is sampled on the rising edge of SCK (MOSI line)
after the device is selected with the falling edge of CSB, an 8-bit command is received. The
command defines the operations to be performed
the rising edge of CSB ends all data transfer and resets internal counter and command register
if an invalid command is received, no data is shifted into the chip and the MISO remains in high
impedance state until the falling edge of CSB. This reinitializes the serial communication.
data transfer to MOSI continues immediately after receiving the command in all cases where
data is to be written to SCA61T’s internal registers
data transfer out from MISO starts with the falling edge of SCK immediately after the last bit of
the SPI command is sampled in on the rising edge of SCK
maximum SPI clock frequency is 500kHz
maximum data transfer speed for RDAX is 5300 samples per sec / channel
The SPI command can be either an individual command or a combination of command and data. In
the case of combined command and data, the input data follows uninterruptedly the SPI command
and the output data is shifted out parallel with the input data.
The SPI interface uses an 8-bit instruction (or command) register. The list of commands is given in
Table below.
Command
name
Command
format
Description:
MEAS
00000000
Measure mode (normal operation mode after power on)
RWTR
00001000
Read temperature data register
STX
00001110
Activate Self test for X-channel
STY
00001111
Activate Self test for Y-channel
RDAX
00010000
Read X-channel acceleration
RDAY
00010001
Read Y-channel acceleration
Measure mode (MEAS) is standard operation mode after power-up. During normal operation, the
MEAS command is the exit command from Self test.
Read temperature data register (RWTR) reads temperature data register during normal operation
without effecting the operation. Temperature data register is updated every 150 µs. The load
operation is disabled whenever the CSB signal is low, hence CSB must stay high at least 150 µs
prior the RWTR command in order to guarantee correct data. The data transfer is presented in
Figure below. The data is transferred MSB first. In normal operation, it does not matter what data is
written into temperature data register during the RWTR command and hence writing all zeros is
recommended.
SCA61T Series
Murata Electronics Oy Subject to changes 12/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
Figure 10. Command and 8 bit temperature data transmission over the SPI
Self test for X-channel (STX) activates the self test function for the X-channel (Channel 1). The
Internal charge pump is activated and a high voltage is applied to the X-channel acceleration
sensor element electrode. This causes the electrostatic force that deflects the beam of the sensing
element and simulates the acceleration to the positive direction. The self-test is de-activated by
giving the MEAS command.
Read X-channel acceleration (RDAX) accesses the AD converted X-channel acceleration signal
stored in acceleration data register X.
During normal operation, acceleration data registers are reloaded every 150 µs. The load operation
is disabled whenever the CSB signal is low, hence CSB must stay high at least 150 µs prior the
RDAX command in order to guarantee correct data. Data output is an 11-bit digital word that is fed
out MSB first and LSB last.
Figure 11. Command and 11 bit acceleration data transmission over the SPI
2.5 Digital Output to Angle Conversion
The acceleration measurement results in RDAX data register are in 11 bit digital word format. The
data range is from 0 to 2048. The nominal content of RDAX data register in zero angle position is:
Binary: 100 0000 0000
Decimal: 1024
The transfer function from differential digital output to angle can be presented as
SCA61T Series
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LSB/g
LSBLSB
arcsin 0@
Sens
DD outout
where;
Dout digital output (RDAX)
Dout@0° digital offset value, nominal value = 1024
angle
Sens sensitivity of the device. (SCA61T-FAHH1G: 1638, SCA61T-FA1H1G: 819)
As an example following table contains data register values and calculated differential digital output
values with -5, -1 0, 1 and 5 degree tilt angles.
Angle
[°]
Acceleration
[mg]
RDAX (SCA61T-
FAHH1G)
RDAX (SCA61T-
FA1H1G)
-5
-87.16
dec: 881
bin: 011 0111 0001
dec: 953
bin: 011 1011 1001
-1
-17.45
dec: 995
bin: 011 1110 0011
dec: 1010
bin: 011 1111 0010
0
0
dec: 1024
bin: 100 0000 0000
dec: 1024
bin: 100 0000 0000
1
17.45
dec: 1053
bin: 100 0001 1101
dec: 1038
bin: 100 0000 1110
5
87.16
dec: 1167
bin: 100 1000 1111
dec: 1095
bin: 100 0100 0111
2.6 Self Test and Failure Detection Modes
To ensure reliable measurement results the SCA61T has continuous interconnection failure and
calibration memory validity detection. A detected failure forces the output signal close to power
supply ground or VDD level, outside the normal output range. The normal output ranges are:
analog 0.25-4.75 V (@Vdd=5V) and SPI 102...1945 counts.
The calibration memory validity is verified by continuously running parity check for the control
register memory content. In the case where a parity error is detected the control register is
automatically re-loaded from the EEPROM. If a new parity error is detected after re-loading data
both analog output voltage is forced to go close to ground level (<0.25 V) and SPI outputs goes
below 102 counts.
The SCA61T also includes a separate self test mode. The true self test simulates acceleration, or
deceleration, using an electrostatic force. The electrostatic force simulates acceleration that is high
enough to deflect the proof mass to the extreme positive position, and this causes the output signal
to go to the maximum value. The self test function is activated either by a separate on-off
command on the self test input, or through the SPI.
The self-test generates an electrostatic force, deflecting the sensing element’s proof mass, thus
checking the complete signal path. The true self test performs following checks:
Sensing element movement check
ASIC signal path check
PCB signal path check
Micro controller A/D and signal path check
The created deflection can be seen in both the SPI and analogue output. The self test function is
activated digitally by a STX command, and de-activated by a MEAS command. Self test can be
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083.1 197
Counts
T
also activated applying logic”1” (positive supply voltage level) to ST pin (pins 6) of SCA61T. The
self test Input high voltage level is 4 – Vdd+0.3 V and input low voltage level is 0.3 – 1 V.
Figure 12. Self test wave forms
V1 = initial output voltage before the self test function is activated.
V2 = output voltage during the self test function.
V3 = output voltage after the self test function has been de-activated and after stabilization time
Please note that the error band specified for V3 is to guarantee that the output is within 5% of the
initial value after the specified stabilization time. After a longer time (max. 1 second) V1=V3.
T1 = Pulse length for Self test activation
T2 = Saturation delay
T3 = Recovery time
T4 = Stabilization time =T2+T3
T5 = Rise time during self test.
Self test characteristics:
T1 [ms]
T2 [ms]
T3 [ms]
T4 [ms]
T5 [ms]
V2:
V3:
20-100
Typ. 25
Typ. 30
Typ. 55
Typ. 15
Min 0.95*VDD
(4.75V @Vdd=5V)
0.95*V1-1.05*V1
2.7 Temperature Measurement
The SCA61T has an internal temperature sensor, which is used for internal offset compensation.
The temperature information is also available for additional external compensation. The
temperature sensor can be accessed via the SPI interface and the temperature reading is an 8-bit
word (0…255). The transfer function is expressed with the following formula:
Where:
Counts Temperature reading
T Temperature in °C
The temperature measurement output is not calibrated. The internal temperature compensation
routine uses relative results where absolute accuracy is not needed. If the temperature
measurement results are used for additional external compensation then one point calibration in
the system level is needed to remove the offset. With external one point calibration the accuracy of
the temperature measurement is about ±1 °C.
Vout
5V
0 V
T5
T1
T2
T3
T4
V1
V2
V3
ST pin
voltage
0 V
5 V
SCA61T Series
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3 Application Information
3.1 Recommended Circuit Diagrams and Printed Circuit Board Layouts
The SCA61T should be powered from well regulated 5 V DC power supply. Coupling of digital
noise to power supply line should be minimized. 100nF filtering capacitor between VDD pin 8 and
GND plane must be used.
The SCA61T has ratiometric output. To get best performance use the same reference voltage for
both the SCA61T and Analog/Digital converter.
Use low pass RC filter with 5.11 kΩ and 10nF on the SCA61T output to minimize clock noise.
Locate the 100nF power supply filtering capacitor close to VDD pin 8. Use as short trace length as
possible. Connect the other end of capacitor directly to ground plane. Connect the GND pin 6 to
underlying ground plane. Use as wide ground and power supply planes as possible. Avoid narrow
power supply or GND connection strips on PCB.
Figure 13. Analog connection and layout example
Figure 14. SPI connection example
SCA61T Series
Murata Electronics Oy Subject to changes 16/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
3.2 Recommended Printed Circuit Board Footprint
Figure 15. Recommended PCB footprint
4 Mechanical Specifications and Reflow Soldering
4.1 Mechanical Specifications (Reference only)
Lead frame material: Copper
Plating: Nickel followed by Gold
Solderability: JEDEC standard: JESD22-B102-C
RoHS compliance: RoHS compliant lead free component.
Co-planarity error 0.1mm max.
The part weights <1 g
Figure 16. Mechanical dimensions of the SCA61T. (Dimensions in mm)
SCA61T Series
Murata Electronics Oy Subject to changes 17/17
www.muratamems.fi Doc. nr. 8261900 Rev.A2
4.2 Reflow Soldering
The SCA61T is suitable for Sn-Pb eutectic and Pb- free soldering process and mounting with
normal SMD pick-and-place equipment.
Figure 17. Recommended SCA61T body temperature profile during reflow soldering. Ref.
IPC/JEDEC J-STD-020B.
Profile feature
Sn-Pb Eutectic
Assembly
Pb-free Assembly
Average ramp-up rate (TL to TP)
3°C/second max.
3°C/second max.
Preheat
- Temperature min (Tsmin)
- Temperature max (Tsmax)
- Time (min to max) (ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Tsmax to T, Ramp up rate
3°C/second max
Time maintained above:
- Temperature (TL)
- Time (tL)
183°C
60-150 seconds
217°C
60-150 seconds
Peak temperature (TP)
240 +0/-5°C
250 +0/-5°C
Time within 5°C of actual Peak Temperature (TP)
10-30 seconds
20-40 seconds
Ramp-down rate
6°C/second max
6°C/second max
Time 25° to Peak temperature
6 minutes max
8 minutes max
The Moisture Sensitivity Level of the part is 3 according to the IPC/JEDEC J-STD-020B. The part
should be delivered in a dry pack. The manufacturing floor time (out of bag) in the customer’s end
is 168 hours.
Notes:
Preheating time and temperatures according to solder paste manufacturer.
It is important that the part is parallel to the PCB plane and that there is no angular alignment
error from intended measuring direction during assembly process.
Wave soldering is not recommended.
Ultrasonic cleaning is not allowed. The sensing element may be damaged by ultrasonic
cleaning process.
