FN3138 Rev 17.00 Page 1 of 22
August 6, 2015
FN3138
Rev 17.00
August 6, 2015
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
+5V Powered RS-232 Transmitters/Receivers
DATASHEET
The HIN232-HIN241 family of RS-232 transmitters/receivers
interface circuits meet all ElA RS-232E and V.28 specifications,
and are particularly suited for those applications where ±12V is
not available. They require a single +5V power supply (except
HIN239) and feature onboard charge pump voltage converters
which generate +10V and -10V supplies from the 5V supply.
The family of devices offer a wide variety of RS-232
transmitter/receiver combinations to accommodate various
applications (see “Selection Table” on page 1).
The drivers feature true TTL/CMOS input compatibility,
slew-rate-limited output, and 300 power-off source
impedance. The receivers can handle up to ±30V, and have
a 3k to 7k input impedance. The receivers also feature
hysteresis to greatly improve noise rejection.
Features
Meets All RS-232E and V.28 Specifications
Requires Only Single +5V Power Supply
- (+5V and +12V - HIN239)
High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120kbps
Onboard Voltage Doubler/Inverter
Low Power Consumption
Low Power Shutdown Function
Three-State TTL/CMOS Receiver Outputs
Multiple Drivers
- ±10V Output Swing for 5V lnput
-300 Power-Off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
- 30V/µs Maximum Slew Rate
Multiple Receivers
- ±30V Input Voltage Range
-3k to 7k Input Impedance
- 0.5V Hysteresis to Improve Noise Rejection
Pb-free Available (RoHS compliant)
Applications
Any System Requiring RS-232 Communication Ports
- Computer - Portable, Mainframe, Laptop
- Peripheral - Printers and Terminals
- Instrumentation
- Modems
Selection Table
PART
NUMBER
POWER SUPPLY
VOLTAGE
NUMBER OF
RS-232
DRIVERS
NUMBER OF
RS-232
RECEIVERS
EXTERNAL
COMPONENTS
LOW POWER
SHUTDOWN/TTL
THREE-STATE
NUMBER OF
LEADS
HIN232 +5V 2 2 4 Capacitors No/No 16
HIN236 +5V 4 3 4 Capacitors Yes/Yes 24
HIN237 +5V 5 3 4 Capacitors No/No 24
HIN238 +5V 4 4 4 Capacitors No/No 24
HIN239 +5V and +7.5V to 13.2V 3 5 2 Capacitors No/Yes 24
HIN240 +5V 5 5 4 Capacitors Yes/Yes 44
HIN241 +5V 4 5 4 Capacitors Yes/Yes 28
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 2 of 22
August 6, 2015
Pin Descriptions
PIN FUNCTION
VCC Power Supply Input 5V ±10%.
V+ Internally generated positive supply (+10V nominal), HIN239 requires +7.5V to +13.2V.
V- Internally generated negative supply (-10V nominal).
GND Ground lead. Connect to 0V.
C1+ External capacitor (+ terminal) is connected to this lead.
C1- External capacitor (- terminal) is connected to this lead.
C2+ External capacitor (+ terminal) is connected to this lead.
C2- External capacitor (- terminal) is connected to this lead.
TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kpull-up resistor to VCC is connected to each lead.
TOUT Transmitter Outputs. These are RS-232 levels (nominally ±10V).
RIN Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kpull-down resistor to GND is connected to each input.
ROUT Receiver Outputs. These are TTL/CMOS levels.
EN Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the receiver outputs are placed
in a high impedance state.
SD Shutdown Input. With SD = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the
transmitters are shut off.
NC No Connect. No connections are made to these leads.
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 3 of 22
August 6, 2015
Ordering Information
PART
NUMBER
PART
MARKING
TEMP. RANGE
(°C) PACKAGE
PKG.
DWG. #
HIN232CBZ*
(Note)
HIN232CBZ 0 to +70 16 Ld SOIC
(Pb-free)
M16.3
HIN232CPZ
(Note)
HIN232CPZ 0 to +70 16 Ld PDIP**
(Pb-free)
E16.3
HIN232IBZ*
(Note)
HIN232IBZ -40 to +85 16 Ld SOIC
(Pb-free)
M16.3
HIN232IPZ
(Note)
HIN232IPZ -40 to +85 16 Ld PDIP**
(Pb-free)
E16.3
HIN236CBZ (No longer
available or supported
recommended replacement
part ICL3243E) (Note)
HIN236CBZ 0 to +70 24 Ld SOIC
(Pb-free)
M24.3
HIN237CBZ* (No longer
available or supported
recommended replacement
part ICL3243E) (Note)
HIN237CBZ 0 to +70 24 Ld SOIC
(Pb-free)
M24.3
HIN238CBZ*(Note) HIN238CBZ 0 to +70 24 Ld SOIC
(Pb-free)
M24.3
HIN238IBZ*
(Note)
HIN238IBZ -40 to +85 24 Ld SOIC
(Pb-free)
M24.3
HIN239CBZ*
(Note)
HIN239CBZ 0 to +70 24 Ld SOIC
(Pb-free)
M24.3
HIN239CPZ
(Note)
HIN239CPZ 0 to +70 24 Ld PDIP**
(Pb-free)
E24.3
HIN240CNZ* (No longer
available or supported) (Note)
HIN240CNZ 0 to +70 44 Ld MQFP
(Pb-free)
Q44.10X10
HIN241CAZ (No longer
available or supported) (Note)
HIN241CAZ 0 to +70 28 Ld SSOP
(Pb-free)
M28.209
HIN241CBZ* (No longer
available or supported) (Note)
HIN241CBZ 0 to +70 28 Ld SOIC
(Pb-free)
M28.3
HIN241IBZ (No longer
Available or supported) (Note)
HIN241IBZ -40 to +85 28 Ld SOIC
(Pb-free)
M28.3
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 4 of 22
August 6, 2015
Pinouts
HIN232
(16 LD PDIP, SOIC)
TOP VIEW
HIN236
(24 LD SOIC)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
V-
T3OUT
T1OUT
T2OUT
R1IN
R1OUT
T2IN
T1IN
GND
VCC
C1+
V+
C1-
T4OUT
R2OUT
SD
EN
T4IN
R3OUT
V-
C2-
C2+
R2IN
T3IN
R3IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
VCC
+5V
2
V+
16
T1OUT
T2OUT
T1IN
T2IN
T1
T2
11
10
14
7
+5V
400k
+5V
400k
R1OUT R1IN
R1
1312
5k
R2OUT R2IN
R2
89
5k
+10V TO -10V
VOLTAGE INVERTER NOTE 1
6
V-
C2+
C2-
+
NOTE 1
4
5
+5V TO 10V
VOLTAGE DOUBLER
C1+
C1-
+
NOTE 1
1
3
+NOTE 1
+
+
1µF
15
NOTE:
1. Either 0.1µF or 1µF capacitors may be used.
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+1µF
+1µF
+
1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1-
C2+
C2-
+5V
400k
+5V
400k
+5V
400k
+5V
400k
+
1µF
13
14
R1OUT R1IN
R1
45
5k
R2OUT R2IN
R2
2322
5k
R3OUT R3IN
R3
1617
5k
EN
20 21
SD
8
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 5 of 22
August 6, 2015
HIN237
(24 LD SOIC)
TOP VIEW
HIN238
(24 LD PDIP, SOIC)
TOP VIEW
Pinouts (Continued)
T3OUT
T1OUT
T2OUT
R1IN
R1OUT
T2IN
T1IN
GND
VCC
C1+
V+
C1-
T4OUT
R2OUT
T5IN
T5OUT
T4IN
R3OUT
V-
C2-
C2+
R2IN
T3IN
R3IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
T2OUT
T1OUT
R2IN
R2OUT
T1IN
R1OUT
R1IN
GND
VCC
C1+
V+
C1-
T3OUT
R3OUT
T4IN
T4OUT
T3IN
R4OUT
V-
C2-
C2+
R3IN
T2IN
R4IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+1µF
+1µF
+
1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1-
C2+
C2-
+5V
400k
+5V
400k
+5V
400k
+5V
400k
+
1µF
13
14
R1OUT R1IN
R1
45
5k
R2OUT R2IN
R2
2322
5k
R3OUT R3IN
R3
1617
5k
T5OUT
T5IN
T5
21 20
+5V
400k
8
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+1µF
+1µF
+
1µF
5
18
2
1
19 24
21 20
10
12
11
15
V+
V-
C1+
C1-
C2+
C2-
+5V
400k
+5V
400k
+5V
400k
+5V
400k
+
1µF
13
14
R1OUT R1IN
R1
76
5k
R2OUT R2IN
R2
34
5k
R3OUT R3IN
R3
2322
5k
R4OUT R4IN
R4
1617
5k
8
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 6 of 22
August 6, 2015
HIN239
(24 LD PDIP, SOIC)
TOP VIEW
HIN240
(44 LD MQFP)
TOP VIEW
Pinouts (Continued)
R1OUT
R1IN
GND
VCC
V+
C1+
C1-
V-
R5IN
R5OUT
R4OUT
R4IN
T1IN
R2OUT
R2IN
T2OUT
T1OUT
R3OUT
NC
EN
T3OUT
T2IN
R3IN
T3IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
NC
GND
NC
R2IN
NC
T2OUT
T1OUT
T3OUT
T4OUT
R3IN
R3OUT
T5IN
NC 1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17
28
27
26
25
24
23
2221201918
39 38 37 36 35 34
33
32
31
30
29
44 43 42 41 40
R4OUT
T4IN
T3IN
R5OUT
R5IN
NC
NC
SD
EN
T5OUT
R4IN
R2OUT
T2IN
T1IN
R1OUT
R1IN
VCC
NC
NC
NC
NC
NC
C1+
V+
C1-
C2+
C2-
V-
NC
NC
NC
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 7 of 22
August 6, 2015
HIN241
(28 SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
4
VCC
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
+5V
+1µF
+
1µF
24
23
19
20
16 13
6
7
5
8
V+
C1+
C1-
+5V
400k
+5V
400k
+5V
400k
R1OUT R1IN
R1
2
5k
R2OUT R2IN
R2
2122
5k
R3OUT R3IN
R3
1817
5k
R4OUT R4IN
R4
1211
5k
R5OUT R5IN
R5
910
5k
EN
14
1
+7.5V TO +13.2V (NOTE)
V-
3
(NOTE)
NOTE: For V+ > 11V, use C1 0.1µF.
19
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
+5V
+1µF
1µF
+
1µF
15
14
7
8
37 6
25
27
26
30
V+
V-
C1+
C1-
C2+
C2-
+5V
400k
+5V
400k
+5V
400k
+
1µF
28
29
R1OUT R1IN
R1
17
5k
R2OUT R2IN
R2
1013
5k
R3OUT R3IN
R3
43
5k
R4OUT R4IN
R4
4039
5k
R5OUT R5IN
R5
3536
5k
EN
42
16
T4OUT
T4IN
T4
38 5
+5V
400k
T5OUT
T5IN
T5
241
+5V
400k
SD
43
18
T3OUT
T1OUT
T2OUT
R2IN
R2OUT
T2IN
T1IN
R1OUT
R1IN
GND
VCC
C1+
V+
C1-
T4OUT
R3OUT
SD
EN
R4IN
T4IN
R5OUT
R5IN
V-
C2-
C2+
R3IN
R4OUT
T3IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 8 of 22
August 6, 2015
Pinouts (Continued)
11
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
+5V
+1µF
+1µF
+
1µF
7
6
2
3
20 1
12
14
13
17
V+
V-
C1+
C1-
C2+
C2-
+5V
400k
+5V
400k
+5V
400k
+
1µF
15
16
R1OUT R1IN
R1
9
5k
R2OUT R2IN
R2
45
5k
R3OUT R3IN
R3
2726
5k
R4OUT R4IN
R4
2322
5k
R5OUT R5IN
R5
1819
5k
EN
24
8
T4OUT
T4IN
T4
21 28
+5V
400k
SD
25
10
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 9 of 22
August 6, 2015
Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V
V+ to Ground (Note 2. . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 13.2V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V)
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V)
ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
Operating Conditions
Temperature Range
HIN2xxcx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
HIN2xxIx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Resistance (Typical, Note 3) JC (°C/W)
16 Ld PDIP Package* 90
24 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 70
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 100
24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 95
44 Ld MQFP Package . . . . . . . . . . . . . . . . . . . . . . . 80
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
2. Only HIN239. For V+ > 11V, C1 must be 0.1µF.
3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range
PARAMETER TEST CONDITIONS
MIN
(Note 5) TYP
MAX
(Note 5) UNITS
SUPPLY CURRENTS
Power Supply Current, ICC No Load,
TA = +25°C
HIN232 - 5 10 mA
HIN236-HIN238, HIN240-HIN241 - 7 15 mA
HIN239 - 0.4 1 mA
V+ Power Supply Current, ICC
No Load, TA = +25°C
No Load,
TA = +25°C
HIN239 - 5.0 15 mA
Shutdown Supply Current, ICC(SD) TA = +25°C - 1 10 µA
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, VlL TIN, EN, Shutdown - - 0.8 V
Input Logic High, VlH TIN 2.0 - - V
EN, Shutdown 2.4 - - V
Transmitter Input Pull-up Current, IPTIN = 0V - 15 200 µA
TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA - 0.1 0.4 V
TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1.0mA 3.5 4.6 - V
RECEIVER INPUTS
RS-232 Input Voltage Range VIN -30 - +30 V
Receiver Input Impedance RIN VIN = ±3V 3.0 5.0 7.0 k
Receiver Input Low Threshold, VlN (H-L) VCC = 5V, TA = +25°C 0.8 1.2 - V
Receiver Input High Threshold, VIN (L-H) VCC = 5V, TA = +25°C - 1.7 2.4 V
Receiver Input Hysteresis VHYST 0.2 0.5 1.0 V
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 10 of 22
August 6, 2015
Detailed Description
The HIN232 thru HIN241 family of RS-232
transmitters/receivers are powered by a single +5V power
supply (except HIN239), feature low power consumption, and
meet all ElA RS-232C and V.28 specifications. The circuit is
divided into three sections: The charge pump, transmitter, and
receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 1. The charge pump contains two sections: the voltage
doubler and the voltage inverter. Each section is driven by a
two-phase, internally generated clock to generate +10V and
-10V. The nominal clock frequency is 16kHz. During phase
one of the clock, capacitor C1 is charged to VCC. During
phase two, the voltage on C1 is added to VCC, producing a
signal across C3 equal to twice VCC. During phase one, C2 is
also charged to 2VCC, and then during phase two, it is
inverted with respect to ground to produce a signal across C4
equal to -2VCC. The charge pump accepts input voltages up
to 5.5V. The output impedance of the voltage doubler section
(V+) is approximately 200, and the output impedance of the
voltage inverter section (V-) is approximately 450. A typical
application uses 1µF capacitors for C1-C4, however, the value
is not critical. Increasing the values of C1 and C2 will lower the
output impedance of the voltage doubler and inverter,
increasing the values of the reservoir capacitors, C3 and C4,
lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN236, HIN240 and HIN241),
SHUTDOWN control line set to logic “1”, the charge pump is
turned off, V+ is pulled down to VCC, V- is pulled up to GND,
and the supply current is reduced to less than 10µA. The
transmitter outputs are disabled and the receiver outputs are
placed in the high impedance state.
TIMING CHARACTERISTICS
Baud Rate (1 Transmitter Switching) RL = 3k120 - - kbps
Output Enable Time, tEN HIN236, HIN239, HIN240, HIN241 - 400 - ns
Output Disable Time, tDIS HIN236, HIN239, HIN240, HIN241 - 250 - ns
Propagation Delay, tPD RS-232 to TTL - 0.5 - µs
Instantaneous Slew Rate SR CL = 10pF, RL = 3k, TA = +25°C (Note 4) - - 30 V/µs
Transition Region Slew Rate, SRTRL = 3k, CL = 2500pF Measured from +3V to -3V
or -3V to +3V, 1 Transmitter Switching
-3-V/µs
TRANSMITTER OUTPUTS
Output Voltage Swing, TOUT Transmitter Outputs, 3k to Ground ±5 ±9 ±10 V
Output Resistance, TOUT VCC = V+ = V- = 0V, VOUT = 2V 300 - -
RS-232 Output Short Circuit Current, ISC TOUT shorted to GND - ±10 - mA
NOTE:
4. Limits established by characterization and are not production tested.
5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range (Continued)
PARAMETER TEST CONDITIONS
MIN
(Note 5) TYP
MAX
(Note 5) UNITS
+
-C1
+
-C3 +
-C2 +
-C4
S1 S2 S5 S6
S3 S4 S7 S8
VCC GND
RC
OSCILLATOR
VCC
GND
V+ = 2VCC
GND
V- = -(V+)
C1+
C1- C2-
C2+
VOLTAGE INVERTER
VOLTAGE DOUBLER
FIGURE 1. CHARGE PUMP
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 11 of 22
August 6, 2015
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic threshold
is about 26% of VCC, or 1.3V for VCC = 5V. A logic 1 at the
input results in a voltage of between -5V and V- at the output,
and a logic 0 results in a voltage between +5V and (V+ -0.6V).
Each transmitter input has an internal 400k pullup resistor so
any unused input can be left unconnected and its output
remains in its low state. The output voltage swing meets the
RS-232C specifications of ±5V minimum with the worst case
conditions of: all transmitters driving 3k minimum load
impedance, VCC = 4.5V, and maximum allowable operating
temperature. The transmitters have an internally limited output
slew rate which is less than 30V/µs. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300 with
±2V applied to the outputs and VCC = 0V.
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3k to 7k input impedance even if the power is off
(VCC = 0V). The receivers have a typical input threshold of
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
0V to VCC. The output will be low whenever the input is
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection. The receiver Enable
line EN, when set to logic “1”, (HIN236, HIN239, HIN240,
and HIN241) disables the receiver outputs, placing them in
the high impedance mode. The receiver outputs are also
placed in the high impedance state when in shutdown mode.
TOUT
V- < VTOUT < V+
300
400k
TXIN
GND < TXIN < VCC
V-
V+
VCC
FIGURE 2. TRANSMITTER
ROUT
GND < VROUT < VCC
5k
RXIN
-30V < RXIN < +30V
GND
VCC
FIGURE 3. RECEIVER
TIN
VOL
VOL
tPLH
tPHL
AVERAGE PROPAGATION DELAY = tPHL + tPLH
2
OR
RIN
TOUT
OR
ROUT
FIGURE 4. PROPAGATION DELAY DEFINITION
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 12 of 22
August 6, 2015
Typical Performance Curves
FIGURE 5. V- SUPPLY VOLTAGE vs VCC , VARYING
CAPACITORS
FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232)
12
10
8
6
4
2
0
3.5 4.0 4.5 6.0
VCC
V- SUPPLY VOLTAGE
5.0 5.5
3.0
0.10µF
0.47µF
1µF
35
|ILOAD| (mA)
V+ (VCC = 4.5V)
V- (VCC = 4.5V)
TA = +25°C
TRANSMITTER OUTPUTS
OPEN CIRCUIT
30252015105
0
SUPPLY VOLTAGE (|V|)
0
12
10
8
6
4
2
V+ (VCC = 5V)
V- (VCC = 5V)
Test Circuits (HIN232)
FIGURE 7. GENERAL TEST CIRCUIT FIGURE 8. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
V-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
+4.5V TO
+5.5V INPUT
3k
T1 OUTPUT
RS-232 30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
TTL/CMOS INPUT
TTL/CMOS OUTPUT
+
-
1µF
C3
+
-
1µF
C1
+
-
1µF
C2
+
-
1µF C4
3k
OUTPUT
RS-232
30V INPUT
T2
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
V-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
T2OUT
T1OUT
VIN = 2V A
ROUT = VIN/1
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 13 of 22
August 6, 2015
Applications
The HIN2xx may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where 12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 9. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5k resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 10), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
-
+
-
+
-
+
DTR (20) DATA
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
RS-232
INPUTS AND OUTPUTS
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
8
13
7
14
16
-
+
6
R2 R1
T2
T1
9
12
10
11
4
5
3
1
HIN232
C1
1µF
C2
1µF
TD
RTS
RD
CTS
SELECT
+5V
INPUTS AND
OUTPUTS
TTL/CMOS
FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
2
FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
-
+
RS-232
INPUTS AND OUTPUTS
DTR (20) DATA TERMINAL READY
DSRS (24) DATA SIGNALING RATE SELECT
DCD (8) DATA CARRIER DETECT
R1 (22) RING INDICATOR
SIGNAL GROUND (7)15
8
13
7
14
2
-
+
4
R2 R1
T2
T1
9
12
10
11
3
1
HIN232
C1
1µF
DTR
DSRS
DCD
R1
+5V
INPUTS AND
OUTPUTS
TTL/CMOS
-
+
-
+
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
8
13
7
14
15
R2 R1
T2
T1
9
12
10
11
4
5
3
1
HIN232
C1
1µF
C2
1µF
TD
RTS
RD
CTS
INPUTS AND
OUTPUTS
TTL/CMOS
-
+
5
C2
1µF
16
C3
2µF
6
26
V- V+
-
+
C4
2µF
16
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 14 of 22
August 6, 2015
Die Characteristics
SUBSTRATE POTENTIAL
V+
TRANSISTOR COUNT
238
Metallization Mask Layout
HIN240
T3OUT
T1OUT
T2OUT
R2IN
R2OUT
T2IN
T1IN
R1OUT
R1IN
GND
VCC
C1+ V+ C1-
T4OUT R3OUT
EN
R4IN
T4IN
R5OUT
V-C2-C2+
R3IN
R4OUT
T3IN
R5IN
SHUTDOWN
T5OUT
T5IN
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 15 of 22
August 6, 2015
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE REVISION CHANGE
August 6, 2015 FN3138.17 Added Rev History beginning with Rev 17.
Added About Intersil Verbiage
Updated Ordering Information Table on page 3.
Updated POD M24.3 to most current version change is as follows:
Updated to new POD standard by removing table listing dimensions and putting
dimensions on drawing. Added Land Pattern.
Updated POD M28.3 to most current version change is as follows:
Added land pattern
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 16 of 22
August 6, 2015
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JE-
DEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and are measured with the leads constrained to be perpendic-
ular to datum .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
eA
-C-
C
L
E
eA
C
eB
eC
-B-
E1
INDEX 12 3 N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25) C AMBS
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A-0.210 -5.33 4
A1 0.015 -0.39 -4
A2 0.115 0.195 2.93 4.95 -
B0.014 0.022 0.356 0.558 -
B1 0.045 0.070 1.15 1.77 8, 10
C0.008 0.014 0.204 0.355 -
D0.735 0.775 18.66 19.68 5
D1 0.005 -0.13 -5
E0.300 0.325 7.62 8.25 6
E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
eA0.300 BSC 7.62 BSC 6
eB-0.430 -10.92 7
L0.115 0.150 2.93 3.81 4
N16 169
Rev. 0 12/93
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 17 of 22
August 6, 2015
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and are measured with the leads constrained to be perpendic-
ular to datum .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
eA
-C-
C
L
E
eA
C
eB
eC
-B-
E1
INDEX 12 3 N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25) C AMBS
E24.3 (JEDEC MS-001-AF ISSUE D)
24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC
PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A-0.210 -5.33 4
A1 0.015 -0.39 -4
A2 0.115 0.195 2.93 4.95 -
B0.014 0.022 0.356 0.558 -
B1 0.045 0.070 1.15 1.77 8
C0.008 0.014 0.204 0.355 -
D1.230 1.280 31.24 32.51 5
D1 0.005 -0.13 -5
E0.300 0.325 7.62 8.25 6
E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
eA0.300 BSC 7.62 BSC 6
eB-0.430 -10.92 7
L0.115 0.150 2.93 3.81 4
N24 249
Rev. 0 12/93
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 18 of 22
August 6, 2015
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H0.25(0.010) BM M
M16.3 (JEDEC MS-013-AA ISSUE C)
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.3977 0.4133 10.10 10.50 3
E 0.2914 0.2992 7.40 7.60 4
e 0.050 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N16 167
-
Rev. 1 6/05
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 19 of 22
August 6, 2015
Package Outline Drawing
M24.3
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC)
Rev 2, 3/11
TOP VIEW
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
3. Package width does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm
(0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions in
( ) are not necessarily exact.
8. This outline conforms to JEDEC publication MS-013-AD ISSUE C.
SIDE VIEW “A” SIDE VIEW “B”
TYPICAL RECOMMENDED LAND PATTERN
INDEX
AREA
24
123
SEATING PLANE
DETAIL "A"
x 45°
7.60 (0.299)
7.40 (0.291)
0.75 (0.029)
0.25 (0.010)
10.65 (0.419)
10.00 (0.394)
1.27 (0.050)
0.40 (0.016)
15.60 (0.614)
15.20 (0.598)
2.65 (0.104)
2.35 (0.093)
0.30 (0.012)
0.10 (0.004)
1.27 (0.050)
0.51 (0.020)
0.33 (0.013) 0.32 (0.012)
0.23 (0.009)
1.981 (0.078)
9.373 (0.369)
0.533 (0.021)1.27 (0.050)
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 20 of 22
August 6, 2015
Small Outline Plastic Packages (SOIC)
a
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45o
C
H0.25(0.010) BM M
(1.50mm)
(9.38mm)
(1.27mm TYP) (0.51mm TYP)
TYPICAL RECOMMENDED LAND PATTERN
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.6969 0.7125 17.70 18.10 3
E 0.2914 0.2992 7.40 7.60 4
e 0.05 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.01 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N28 287
0o8o0o8o-
Rev. 1, 1/13
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
FN3138 Rev 17.00 Page 21 of 22
August 6, 2015
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H0.25(0.010) BM M
0.25
0.010
GAUGE
PLANE
A2
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.078 - 2.00 -
A1 0.002 - 0.05 - -
A2 0.065 0.072 1.65 1.85 -
B 0.009 0.014 0.22 0.38 9
C 0.004 0.009 0.09 0.25 -
D 0.390 0.413 9.90 10.50 3
E 0.197 0.220 5.00 5.60 4
e 0.026 BSC 0.65 BSC -
H 0.292 0.322 7.40 8.20 -
L 0.022 0.037 0.55 0.95 6
N28 287
-
Rev. 2 6/05
FN3138 Rev 17.00 Page 22 of 22
August 6, 2015
HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 2004-2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
Metric Plastic Quad Flatpack Packages (MQFP)
D
D1
EE1
-A-
PIN 1
A2 A1
A
12o-16o
12o-16o
0o-7o
0.40
0.016 MIN
L
0o MIN
PLANE
b
0.005/0.009
0.13/0.23
WITH PLATING
BASE METAL
SEATING
0.005/0.007
0.13/0.17
b1
-B-
e
0.008
0.20 A-B SD SCM
0.076
0.003
-C-
-D-
-H-
Q44.10x10 (JEDEC MS-022AB ISSUE B)
44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A-0.096 -2.45 -
A1 0.004 0.010 0.10 0.25 -
A2 0.077 0.083 1.95 2.10 -
b0.012 0.018 0.30 0.45 6
b1 0.012 0.016 0.30 0.40 -
D0.515 0.524 13.08 13.32 3
D1 0.389 0.399 9.88 10.12 4, 5
E0.516 0.523 13.10 13.30 3
E1 0.390 0.398 9.90 10.10 4, 5
L0.029 0.040 0.73 1.03 -
N44 447
e 0.032 BSC 0.80 BSC -
Rev. 2 4/99
NOTES:
1. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
2. All dimensions and tolerances per ANSI Y14.5M-1982.
3. Dimensions D and E to be determined at seating plane .
4. Dimensions D1 and E1 to be determined at datum plane
.
5. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is 0.25mm (0.010 inch) per side.
6. Dimension b does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total.
7. “N” is the number of terminal positions.
-C-
-H-