GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Features * Expanded Data Protection - WP#/PD# pin configurable by firmware for prevention of data overwrites * Integrated Voltage Detector - Detects supply voltage fluctuations and generates reset during power-up and power-down to prevent inadvertent writes * 20-Byte Unique ID for Enhanced Security - Factory Pre-programmed 10-Byte Unique ID - User-Programmable 10-Byte ID * Integrated Voltage Detector - Prevents inadvertent Write operations due to unexpected power-down or brownout. * Pre-programmed Embedded Firmware - Executes industry standard ATA/IDE commands - Implements dynamic wear-leveling algorithms to substantially increase the longevity of flash media - Embedded Flash File System * Robust Built-in ECC * Industrial Temperature Range - -40C to 85C for industrial operation * Package - 12mm x 24mm x 1.40mm (maximum height), 91-ball, 1.0mm ball pitch, LBGA (LBTE) * All Devices are RoHS Compliant * Industry Standard ATA / IDE Bus Interface - Host Interface: 16-bit access 1) - Supports up to PIO Mode-6 2) - Supports up to Multi-Word DMA Mode-4 - Supports up to Ultra DMA Mode-4 * Performance - Sustained sequential data read Up to 30 MByte/sec* - Sustained sequential data write Up to 10 MByte/sec* * measured using 128 KByte block size * Power Management - 3.3V Power Supply - 5.0V or 3.3V Host Interface Through VDDQ pins - Immediate disabling of unused circuitry without host intervention - Zero wake-up latency * Power Specification - Active mode 85mA typical (GLS85LD0512) 100mA typical (GLS85LD1001T) - Sleep mode 160A typical (GLS85LD0512) 170A typical (GLS85LD1001T) Product Description The GLS85LD0512 and GLS85LD1001T Industrial Grade PATA NANDriveTM devices (referred to as "PATA NANDrive" in this datasheet) are high-performance, fullyintegrated, embedded flash solid-state drives. They combine an integrated ATA Controller and 512 MByte or 1 GByte of NAND flash memory in a multi-chip package. These products are ideal for solid-state mass storage in embedded and portable applications that require smaller form-factor and more reliable data storage. The integrated NAND flash controller with built-in advanced NAND management firmware communicates with the Host through the standard ATA protocol. It does not require any additional or proprietary software such as the Flash File System (FFS) and Memory Technology Driver (MTD). The PATA NANDrive provides a WP#/PD# pin to protect critical information stored in the flash media from unauthorized overwrites. The PATA NANDrive is preprogrammed with a 10-Byte unique serial ID and has the option of programming an additional 10-Byte serial ID for even greater system security. ATA-based solid-state mass storage technology is widely used in GPS and telematics, in-vehicle infotainment, portable and industrial computers, handheld data collection scanners, point-of-sale terminals, networking and telecommunications equipment, robotics, audio and video recorders, monitoring devices and set-top boxes. The PATA NANDrive's advanced NAND management technology enhances data security, improves endurance and accurately predicts the remaining lifespan of the NAND flash devices. This innovative technology combines robust NAND controller hardware error correction capabilities with advanced wear-leveling algorithms and bad block management to significantly extend the life of the product. The PATA NANDrive is a single device, solid-state drive designed for embedded ATA/IDE protocol systems and 1) supports standard ATA/IDE protocol with up to PIO Mode-6 , 2) Multi-Word DMA Mode-4 and Ultra DMA Mode-4 interface. The PATA NANDrive device provides complete IDE hard disk drive functionality and compatibility in a 12 mm x 24 mm LBGA package for easy, space-saving mounting to a system motherboard. These products surpass traditional storage in their small size, security, reliability, ruggedness and low power consumption. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 1) 2) 1 PATA NANDrive is capable of supporting PIO Mode-6, but IdentifyDrive information report will show PIO Mode-4 PATA NANDrive is capable of supporting Multi-Word DMA Mode4, but Identify-Drive information report will show MWDMA Mode-2 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Contents 1.0 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.1.5 1.1.6 1.1.7 1.1.8 1.2 2.0 3.0 4.0 5.0 5.1 5.2 6.0 7.0 7.1 8.0 9.0 10.0 10.1 10.2 10.2.1 10.2.2 10.2.3 10.2.4 10.2.5 10.2.6 11.0 11.1 11.1.1 11.2 11.3 11.3.1 11.4 11.5 11.6 11.7 12.0 12.1 12.1.1 12.1.2 12.2 12.3 12.4 12.4.1 12.5 12.6 GENERAL DESCRIPTION......................................................................................................................................... 3 Optimized PATA NANDrive ........................................................................................................................................ 3 Microcontroller Unit (MCU) ......................................................................................................................................... 3 Internal Direct Memory Access (DMA) ....................................................................................................................... 3 Power Management Unit (PMU)................................................................................................................................. 3 SRAM Buffer .............................................................................................................................................................. 3 Embedded Flash File System..................................................................................................................................... 3 Error Correction Code (ECC) ..................................................................................................................................... 3 Serial Communication Interface (SCI) ........................................................................................................................ 3 Multi-tasking Interface ................................................................................................................................................ 3 Advanced NAND Management .................................................................................................................................. 3 FUNCTION BLOCKS ................................................................................................................................................. 4 PIN ASSIGNMENT..................................................................................................................................................... 4 KEY PARAMETERS .................................................................................................................................................. 7 CONFIGURABLE WRITE PROTECT / POWER-DOWN MODES ............................................................................. 8 Write Protect Mode..................................................................................................................................................... 8 Power-down Mode ..................................................................................................................................................... 8 POWER-ON INITIALIZATION .................................................................................................................................... 8 ATA/IDE HOST INTERFACE ..................................................................................................................................... 8 Serial Communication Interface (SCI) ........................................................................................................................ 8 LIFETIME EXPECTANCY .......................................................................................................................................... 8 POWER-ON AND BROWN-OUT RESET CHARACTERISTICS................................................................................ 9 SOFTWARE INTERFACE.......................................................................................................................................... 9 I/O Transfer Function ................................................................................................................................................. 9 Command Description.............................................................................................................................................. 10 Identify-Drive - ECh ................................................................................................................................................. 11 Set-Features - EFh .................................................................................................................................................. 19 Idle - 97h or E3h ...................................................................................................................................................... 20 Set-Sleep-Mode - 99h or E6h .................................................................................................................................. 20 Set-WP#/PD#-Mode - 8Bh ....................................................................................................................................... 20 Error Posting ............................................................................................................................................................ 21 ELECTRICAL SPECIFICATIONS ............................................................................................................................ 22 Absolute Maximum Ratings...................................................................................................................................... 22 Absolute Maximum Power Pin Stress Ratings ......................................................................................................... 22 Operating Ratings .................................................................................................................................................... 22 AC Characteristics.................................................................................................................................................... 22 AC Conditions of Test .............................................................................................................................................. 22 Recommended System Power-on Timing ................................................................................................................ 23 29) Reliability Characteristics ..................................................................................................................................... 23 29) Capacitance ......................................................................................................................................................... 23 DC Characteristics ................................................................................................................................................... 24 APPENDIX ............................................................................................................................................................... 25 Differences between the PATA NANDrive and the ATA Specifications.................................................................... 25 Idle Timer ................................................................................................................................................................. 25 Recovery from Sleep Mode ...................................................................................................................................... 25 Reflow Profile ........................................................................................................................................................... 25 Product Ordering Information ................................................................................................................................... 26 Packaging Diagram .................................................................................................................................................. 27 LBTE Package ......................................................................................................................................................... 27 Reference Documents.............................................................................................................................................. 28 Revision History....................................................................................................................................................... 28 These specifications are subject to change without notice. (c) 2011 Greenliant Systems 2 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 1.0 GENERAL DESCRIPTION Each PATA NANDrive contains an integrated PATA NAND flash memory controller and discrete NAND flash die(s) in a LBGA package. Refer to Figure 2-1 for the PATA NANDrive block diagram. 1.1 1.1.6 Error Correction Code (ECC) High performance is achieved through optimized hardware error detection and correction. Optimized PATA NANDrive The heart of the PATA NANDrive is the PATA NAND flash memory controller, which translates standard PATA signals into flash media data and control signals. The following components contribute to the PATA NANDrive's operation. 1.1.7 Serial Communication Interface (SCI) The Serial Communication Interface (SCI) is designed for manufacturing error reporting. During the design process, always provide access to the SCI port in the PCB design to aid in design validation. 1.1.1 Microcontroller Unit (MCU) The MCU transfers the ATA/IDE commands into data and control signals required for flash media operation. 1.1.8 Multi-tasking Interface The multi-tasking interface enables fast, sustained write performance by allowing concurrent Read, Program and Erase operations to multiple flash media devices. 1.1.2 Internal Direct Memory Access (DMA) The PATA NANDrive uses internal DMA allowing instant data transfer from/to buffer to/from flash media. This implementation eliminates microcontroller overhead associated with the traditional, firmwarebased approach, thereby increasing the data transfer rate. 1.2 Advanced NAND Management 1.1.3 Power Management Unit (PMU) The PMU controls the power consumption of the PATA NANDrive. The PMU dramatically reduces the power consumption of the PATA NANDrive by putting the part of the circuitry that is not in operation into sleep mode. Advanced NAND management technology balances the wear on erased blocks with an advanced wearleveling scheme. Advanced NAND management technology tracks the number of program/erase cycles within a group. When the Host updates data, higher priority is given to the less frequently written erase blocks; thereby, evenly distributing host writes within a wear-leveling group. 1.1.4 SRAM Buffer A key contributor to the PATA NANDrive performance is an SRAM buffer. The buffer optimizes the Host's data transfer to and from the flash media. Advanced NAND management technology enhances the PATA NANDrive security with password protection and four independent protection zones, which can be set to Read-only or Hidden. 1.1.5 Embedded Flash File System The embedded flash file system is an integral part of the PATA NANDrive. It contains MCU firmware that performs the following tasks: 1. Translates host side signals into flash media writes and reads 2. Provides flash media wear leveling to spread the flash writes to increase the longevity of flash media 3. Keeps track of data file structures These specifications are subject to change without notice. (c) 2011 Greenliant Systems 3 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 2.0 FUNCTION BLOCKS Figure 2-1: PATA NANDrive Block Diagram 3.0 PIN ASSIGNMENT The signal/pin assignments are listed in Table 3-1. Low active signals have a "#" suffix. Pin types are Input, Output or Input/Output. Signals that the Host sources are designated as inputs, while signals that the PATA NANDrive sources are outputs. Figure 3-1: Pin Assignments for 91-Ball LBGA These specifications are subject to change without notice. (c) 2011 Greenliant Systems 4 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Table 3-1: Pin Assignments (1 of 2) Pin No. Pin Symbol Type 91-Ball Host Side Interface A2 K8 I A1 K3 A0 L2 D15 H8 D14 G9 D13 G8 D12 H7 D11 F9 D10 F8 D9 E8 D8 F7 I/O D7 F4 D6 H4 D5 E3 D4 H3 D3 F3 D2 G3 D1 F2 D0 G2 DMACK# K2 I DMARQ J3 O CS1FX# L3 I/O Type I1Z I1Z/O2 I2U O1 I2Z CS3FX# L8 I CSEL L9 I I1U IORD# H2 I I2Z IOWR# H9 I I2Z These specifications are subject to change without notice. (c) 2011 Greenliant Systems Name and Functions A[2:0] are used to select one of eight registers in the Task File. D[15:0] Data bus DMA Acknowledge - input from Host DMA Request to Host CS1FX# is the chip select for the task file registers CS3FX# is used to select the alternate status register and the Device Control register. This internally pulled-up signal is used to configure this device as a Master or a Slave. When this pin is grounded, this device is configured as a Master. When the pin is open, this device is configured as a Slave. The pin setting should remain the same from Power-on to Power-down. IORD#: This is an I/O Read Strobe generated by the Host. When Ultra DMA mode is not active, this signal gates I/O data from the device. (This pin supports three functions) HDMARDY#: In Ultra DMA mode when DMA Read is active, this signal is asserted by the Host to indicate that the Host is ready to receive Ultra DMA data-in bursts. The Host may negate HDMARDY# to pause an Ultra DMA transfer. HSTROBE: When DMA Write is active, this signal is the data-out strobe generated by the Host. Both the rising and falling edges of HSTROBE cause data to be latched by the device. The Host may stop generating HSTROBE edges to pause an Ultra DMA data-out burst. IOWR#: This is an I/O Write Strobe generated by the Host. When Ultra DMA mode is not active, this signal is used to clock I/O data into the device. (This pin supports two functions) STOP: When Ultra DMA mode protocol is active, the assertion of this signal causes the termination of the Ultra DMA burst 5 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Table 3-1: Pin Assignments (2 of 2) Pin No. Pin Symbol Type 91-Ball I/O Type IORDY J4 O O1 IOCS16# J8 O O2 INTRQ PDIAG# J2 K9 O I/O O1 I1U/O1 DASP# D9 I/O I1U/O6 RESET# E4 I I2U WP#/PD# F6 I I3U Name and Functions IORDY: When in PIO mode, the device is not ready to respond to a data transfer request. This signal is negated to extend the Host transfer cycle from the assertion of IORD# or IOWR#. However, it is never negated by this controller. (This pin supports three functions) DDMARDY#: When Ultra DMA mode DMA Write is active, this signal is asserted by the device to indicate that the device is ready to receive Ultra DMA data-out bursts. The device may negate DDMARDY# to pause an Ultra DMA transfer. DSTROBE: When Ultra DMA mode DMA Read is active, this signal is the data-in strobe generated by the device. Both the rising and falling edges of DSTROBE cause data to be latched by the Host. The device may stop generating DSTROBE edges to pause an Ultra DMA data-in burst. This output signal is asserted low when the device is indicating a Word data transfer cycle. This signal is the active high Interrupt Request to the Host. The Pass Diagnostic signal in the Master/Slave handshake protocol. The Drive Active/Slave Present signal in the Master/Slave handshake protocol. This input pin is the active low hardware reset from the Host. The WP#/PD# pin can be used for either the Write Protect mode or Power-down mode, but only one mode is active at any time. The Write Protect or Power-down modes can be selected through the host command. The Write Protect mode is the factory default setting. Serial Communication Interface (SCI) SCIDOUT D8 O O4 SCIDIN SCICLK Miscellaneous D7 E7 I I I3U I3U VDD VDDQ G4, G6, G7, K4, K6, K7, J9 E9, K5, L5, M2 E2, M9 POR# J7 I VREG D2 A1, A2, A9, A10, B1, B9, B10, D3, D4, D5, D6, E5, E6, F5, G5, L4, L6, L7, M3, M4, M5, M6, M7, M8, N2, N3, N4, N5, N6, N7, N8, N9, R1, R2, R9, R10, T1, T2, T9, T10 O VSS DNU SCI data output. No external pull-up or pull-down resistor should connect to this signal. SCI data input SCI clock PWR Ground PWR PWR VDD (3.3V) VDDQ (5V/3.3V) for Host interface Power-on Reset (POR). Active low. Analog input for supply voltage detection External capacitor pin Analog Input These specifications are subject to change without notice. (c) 2011 Greenliant Systems Do not use. All these pins should not be connected. 6 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 4.0 KEY PARAMETERS Table 4-1 shows the PATA NANDrive default capacity and specific settings for heads, sectors and cylinders. Users can change the default settings in the drive ID table using the Identify-Drive command. If the total number of Bytes is less than the default, the remaining space could be used as spares to increase the flash drive endurance. It should also be noted that if the total flash drive capacity exceeds the total default number of Bytes, the flash drive endurance will be reduced. Table 4-1: Default PATA NANDrive Settings Capacity 512 MByte 1 GByte Total Bytes 512,483,328 1,024,966,656 Cylinders 993 1,986 Heads 16 16 Sectors 63 63 Max LBA (Logical Block Addressing) 1,000,944 2,001,888 Table 4-2: Sustained Performance Product GLS85LD0512-60-RI-LBTE GLS85LD1001T-60-RI-LBTE Write Performance Up to 5 MByte/sec Up to 10 MByte/sec Read Performance Up to 17 MByte/sec Up to 30 MByte/sec Table 4-3: Supported ATA Modes Products GLS85LD0512-60-RI-LBTE GLS85LD1001T-60-RI-LBTE PIO 1) Up to Mode-6 1) Up to Mode-6 MWDMA 2) Up to Mode-4 2) Up to Mode-4 Ultra DMA Up to Mode-4 Up to Mode-4 Table 4-4: Advanced NAND Management Technology Write Cycles Products GLS85LD0512-60-RI-LBTE GLS85LD1001T-60-RI-LBTE Write Cycles per Group 100M 100M These specifications are subject to change without notice. (c) 2011 Greenliant Systems Number of Groups per Product 4 4 7 Wear-leveling Group Size 128 MBytes 256 MBytes Cluster Size 2 KBytes 4 KBytes 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 5.0 During the first self-initialization, the PATA NANDrive firmware scans all connected flash media devices and reads their device ID. If the device ID matches the listed flash media devices, the PATA NANDrive performs drive recognition based on the algorithm provided by the flash media suppliers, including setting up the bad block table, executing all the necessary handshaking routines for flash media support and performing the low-level format. CONFIGURABLE WRITE PROTECT / POWER-DOWN MODES The WP#/PD# pin can be used for either Write Protect mode or Power-down mode, but only one mode is active at any time. Either mode can be selected through the host command, Set-WP#/PD#-Mode. Once the mode is set with this command, the device will stay in the configured mode until the next time this command is issued. Power-off or reset will not change the configured mode. 5.1 If the drive initialization fails and a visual inspection is unable to determine the problem, Greenliant provides a comprehensive interface for manufacturing flow debug. This interface not only allows debug of the failure and manual reset of the initialization process, but also allows customization of user definable options. Write Protect Mode When the device is configured in the Write Protect mode, the WP#/PD# pin offers extended data protection. This feature can be either selected through a jumper or host logic to protect the stored data from inadvertent system writes or erases, and viruses. The Write Protect feature protects the full address space of the data stored on the flash media. 7.0 The ATA/IDE host interface can be used for PATA NANDrive manufacturing support. Greenliant provides an example of a DOS- and WindowsTM-based solution (an executable routine) for manufacturing debug and rework. In the Write Protect mode, the WP#/PD# pin should be asserted prior to issuing the destructive commands: Erase-Sector, Format-Track, Write-DMA, Write-Multiple, Write-Multiple-without-Erase, WriteSector(s) Write-Sector-without-Track or Write-Verify. This will force the PATA NANDrive to reject any destructive commands from the ATA interface. All destructive commands will return 51H in the Status register and 04H in the Error register signifying an invalid command. All non-destructive commands will be executed normally. 5.2 7.1 Serial Communication Interface (SCI) For additional manufacturing flexibility, the SCI bus can be used for manufacturing error reporting and for accessing the status of the controller's internal activities. The SCI consists of three active signals: SCIDOUT, SCIDIN and SCICLK. Always provide access to the SCI port in the PCB design to aid in design validation. Power-down Mode When the device is configured in the Power-down mode, if the WP#/PD# pin is asserted during a command, the PATA NANDrive completes the current command and returns to the standby mode immediately to save power. Afterwards, the device will not accept any other commands. Only a Power-on Reset (POR) or hardware reset will bring the device to normal operation with the WP#/PD# pin de-asserted. 6.0 ATA/IDE HOST INTERFACE 8.0 LIFETIME EXPECTANCY The PATA NANDrive with advanced NAND management technology significantly extends the life of a product with its extensive ECC and advanced wear-leveling algorithms. For applications where data security is essential, the PATA NANDrive with advanced NAND management technology offers two additional protection features protection zones and password protections. POWER-ON INITIALIZATION The PATA NANDrive is self-initialized during the first power-up. As soon as the power is applied to the PATA NANDrive it reports busy for typically up to five seconds while performing bad blocks search and lowlevel format. This initialization is a one-time event. Protection Zones - Up to four independent protection zones can be enabled as either Read-only or Hidden (Read/Write protected). If the zones are not enabled, the data is unprotected (default configuration). Password Protection - Requires a customer-unique password to access information within the protected zones. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 8 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 9.0 POWER-ON AND BROWN-OUT RESET CHARACTERISTICS Please contact Greenliant to obtain the PATA NANDrive reference design schematics including the POR# circuit for the industrial PATA NANDrive offerings. Figure 9-1: Power-on and Brown-out Reset Timing Table 9-1: Power-on and Brown-out Reset Timing Item VDD/POR# Rise Time VDD/POR# Fall Time 10.0 SOFTWARE INTERFACE 10.1 I/O Transfer Function Symbol TR TF Min Max 250 250 Units ms ms The default operation for the PATA NANDrive is 16-bit. However, if the Host issues a SET-FEATURE command to enable 8-bit mode, the PATA NANDrive permits 8-bit data access. The following table defines the function of various operations. Table 10-1: I/O Function Function Code Invalid Mode Standby Mode Task File Write Task File Read Data Register Write Data Register Read Control Register Write Alt Status Read CS3FX# CS1FX# A0-A2 VIL VIL X VIH VIH X VIH VIL 1-7H VIH VIL 1-7H VIH VIL 0 VIH VIL 0 VIL VIH 6H VIL VIH 6H IORD# X X VIH VIL VIH VIL VIH VIL IOWR# X X VIL VIH VIL VIH VIL VIH D15-D8 Undefined High Z X High Z 3) In 3) Out X High Z D7-D0 Undefined High Z Data In Data Out In Out Control In Status Out If 8-bit data transfer mode is enabled. In 8-bit data transfer mode, High Byte is undefined for Data Out. For Data In, X can be VIH or VIL, but no other value. 3) These specifications are subject to change without notice. (c) 2011 Greenliant Systems 9 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 10.2 Command Description This section defines the software requirements and the format of the commands the Host sends to the PATA NANDrive. Commands are issued to the PATA NANDrive by loading the required registers in the command block with the supplied parameters, and then writing the command code to the Command register. With the exception of commands listed in Sections "Idle - 97h or E3h", "Set-Sleep-Mode - 99h or E6h", "Set-WP#/PD#-Mode - 8Bh", the PATA NANDrive complies with ATA-6 Specifications. Table 10-2: NANDrive Command Set Command Check-Power-Mode Execute-Drive-Diagnostic Erase-Sector(s) Flush-Cache Format-Track Identify-Drive Idle Idle-Immediate Initialize-Drive-Parameters NOP Read-Buffer Read-DMA Read-Multiple Read-Sector(s) Read-Verify-Sector(s) Recalibrate Request-Sense Security-Disable-Password Security-Erase-Prepare Security-Erase-Unit Security-Freeze-Lock Security-Set-Password Security-Unlock Seek Set-Features 12) SMART Set-Multiple-Mode Set-Sleep-Mode Set-WP#/PD#-Mode Standby Standby-Immediate Translate-Sector Write-Buffer Write-DMA Write-Multiple Write-Multiple-Without-Erase Write-Sector(s) Write-Sector(s)-Without-Erase Write-Verify Code E5h or 98h 90h C0h E7h 50h ECh E3h or 97h E1h or 95h 91h 00h E4h C8h or C9h C4h 20h or 21h 40h or 41h 1Xh 03h F6h F3h F4h F5h F1h F2h 7Xh EFh B0h C6h E6h or 99h 8Bh E2h or 96h E0h or 94h 87h E8h CAh or CBh C5h CDh 30h or 31h 38h 3Ch FR 4),5) Y Y Y - SC 5), 6) Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y SN 5), 7) Y Y Y Y Y Y Y Y Y Y Y Y Y Y CY 5), 8) Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y DH 9), 10) D D Y D Y D D D Y D D Y Y Y Y D D D D D D D D Y D D D D D D D Y D Y Y Y Y Y Y 5), 11) LBA Y Y Y Y Y Y Y Y Y Y Y Y Y Y 4) 5) 6) 7) 8) 9) FR - Features register Y - The register contains a valid parameter for this command SC - Sector Count register SN - Sector Number register CY - Cylinder registers For the Drive/Head register: Y means both the Drive and Head parameters are used; D means only the Drive parameter is valid and not the Head parameter 10) DH - Drive/Head register 11) LBA - Logical Block Address mode supported (see command descriptions for use) 12) Please ask your Greenliant contact about SMART command support These specifications are subject to change without notice. (c) 2011 Greenliant Systems 10 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 10.2.1 Identify-Drive - ECh Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 7 6 5 4 3 2 1 0 ECh X Drive X X X X X X The Identify-Drive command enables the Host to receive parameter information from the PATA NANDrive. This command has the same protocol as the Read-Sector(s) command. The parameter Words in the buffer have the arrangement and meanings defined in Table 10-3. All reserved bits or Words are zero. The following table gives the definition for each field in the Identify-Drive information. Table 10-3: Identify-Drive Information (1 of 2) Word Address 0 1 2 3 4 5 6 7-8 9 10-14 15-19 20 21 22 23-26 27-46 47 48 49 50 51 52 53 54 55 56 57-58 59 60-61 62 63 64 65 66 67 68 Total Bytes 2 2 2 2 2 2 2 4 2 10 10 2 2 2 8 40 2 2 2 2 2 2 2 2 2 2 4 2 4 2 2 2 2 2 2 2 Default Value 044Ah 14) bbbbh 0000h 14) bbbbh 0000h xxxxh 14) bbbbh 14) bbbbh 13) xxxxh 16) eeeeH 17) ddddH 0002h 13) xxxxh 13) xxxxh 18) aaaah 19) cccch 8001h 0000h 0B00h 0000h 0200h 0000h 0007h 15) nnnnh 15) nnnnh 15) nnnnh 15) nnnnh 010xh 15) nnnnh 0000h 0x07h 0003h 0078h 0078h 0078h 0078h Data Field Type Information General configuration bit Default number of cylinders Reserved Default number of heads Reserved Vendor Unique Default number of sectors per track Number of sectors per device (Word 7 = MSW, Word 8 = LSW) Vendor Unique User-programmable serial number in ASCII Greenliant preset, unique ID in ASCII Buffer type Vendor Unique Vendor Unique Firmware revision in ASCII. Big Endian Byte Order in Word User Definable Model number Maximum number of sectors on Read/Write-Multiple command Reserved Capabilities Reserved PIO Data Transfer Cycle Timing Mode Reserved Translation parameters are valid Current numbers of cylinders Current numbers of heads Current sectors per track Current capacity in sectors (LBAs) (Word 57 = LSW, Word 58 = MSW) Multiple sector setting Total number of sectors addressable in LBA mode Reserved DMA data transfer is supported in NAND Controller Advanced PIO Transfer mode supported 120 ns cycle time support for Multi-Word DMA Mode-2 120 ns cycle time support for Multi-Word DMA Mode-2 PIO Mode-4 supported PIO Mode-4 supported These specifications are subject to change without notice. (c) 2011 Greenliant Systems 11 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Table 10-3: Identify-Drive Information (2 of 2) Word Address 69-79 80 81 82 83 84 85-87 88 89 90 91-127 128 129-159 160-162 163 164-255 13) 14) 15) 16) 17) 18) 19) Total Bytes 22 2 2 2 2 2 6 2 2 2 74 2 62 6 2 184 Default Value 0000h 007Eh 0019h 706Bh 400Ch 4000h 13) xxxxh xx1Fh 13) xxxxh 13) xxxxh 0000h 13) xxxxh 0000h 0000h xxx2h 0000h Data Field Type Information Reserved ATA major version number ATA minor version number Features/command sets supported Features/command sets supported Features/command sets supported Features/command sets enabled UDMA modes Time required for security erase unit completion Time required for enhanced security erase unit completion Reserved Security Status Vendor unique bytes Reserved CF Advanced True IDE Timing Mode capabilities and settings Reserved xxxx - This field is subject to change by the Host or the device. bbbb - default value set by the controller. The selections could be user programmable. n - calculated data based on product configuration eeee - the default value is `0000000000' dddd - unique number of each device aaaa - any unique Greenliant firmware revision cccc - the default value is "xxxMB NANDrive" or "xxxGB NANDrive" where xxx is the flash drive capacity. The user has an option to change the model number during manufacturing. Word 0: General Configuration This field informs the Host that this is a non-magnetic, hard sectored, removable storage device with a transfer rate greater than 10 MByte/sec and is not MFM encoded. Word 1: Default Number of Cylinders This field contains the number of translated cylinders in the default translation mode. This value will be the same as the number of cylinders. Word 3: Default Number of Heads This field contains the number of translated heads in the default translation mode. Word 6: Default Number of Sectors per Track This field contains the number of sectors per track in the default translation mode. Word 7-8: Number of Sectors This field contains the number of sectors per the PATA NANDrive. This Double Word value is also the first invalid address in LBA translation mode. This field is only required by CF feature set support. Word 10-19: Serial Number The contents of this field are right justified and padded with spaces (20h). The right-most ten bytes are Greenliant preset, unique ID. The left-most ten bytes are a user-programmable value with a default value of spaces. Word 20: Buffer Type This field defines the buffer capability: 0002h: a dual ported multi-sector buffer capable of simultaneous data transfers to or from the host and the PATA NANDrive. Word 23-26: Firmware Revision This field contains the revision of the firmware for this product. Word 27-46: Model Number This field is reserved for the model number for this product. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 12 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Word 47: Read-/Write-Multiple Sector Count This field contains the maximum number of sectors that can be read or written per interrupt using the Read-Multiple or Write-Multiple commands. Only a value of `1' is supported. Word 49: Capabilities Bit Function 13 Standby Timer 0: Forces sleep mode when Host is inactive 11 IORDY Support 1: PATA NANDrive supports PIO Mode-4 9 LBA support 1: PATA NANDrive supports LBA mode addressing 8 DMA Support 1: DMA mode is supported Word 51: PIO Data Transfer Cycle Timing Mode This field contains the mode for PIO data transfer. The PATA NANDrive supports PIO Mode-4. Word 53: Translation Parameters Valid Bit Function 0 1: Words 54-58 are valid and reflect the current number of cylinders, heads and sectors. 1 1: Words 64-70 are valid to support PIO Mode-3 and -4. 2 1: Word 88 is valid to support Ultra DMA data transfer. Word 54-56: Current Number of Cylinders, Heads, Sectors/Track These fields contain the current number of user addressable Cylinders, Heads and Sectors/Track in the current translation mode. Word 57-58: Current Capacity This field contains the product of the current cylinders times heads times sectors. Word 59: Multiple Sector Setting This field contains a validity flag in the Odd Byte and the current number of sectors that can be transferred per interrupt for Read/Write Multiple in the Even Byte. The Odd Byte is always 01h which indicates that the Even Byte is always valid. The Even Byte value depends on the value set by the Set Multiple command. The Even Byte of this Word by default contains a 00h which indicates that Read/Write Multiple commands are not valid. Word 60-61: Total Sectors Addressable in LBA Mode This field contains the number of sectors addressable for the PATA NANDrive in LBA mode only. Word 63: Multi-Word DMA Transfer Mode This field identifies the Multi-Word DMA transfer modes supported by the PATA NANDrive and indicates the mode that is currently selected. Only one DMA mode can be selected at any given time. Bit Function 15-11 Reserved 10 Multi-Word DMA mode 2 selected 1: Multi-Word DMA mode 2 is selected and bits 8 and 9 are cleared to 0 0: Multi-Word DMA mode 2 is not selected 9 Multi-Word DMA mode 1 selected 1: Multi-Word DMA mode 1 is selected and 8 and 10 should be cleared to 0 0: Multi-Word DMA mode 1 is not selected 8 Multi-Word DMA mode 0 selected 1: Multi-Word DMA mode 0 is selected and bits 9 and 10 are cleared to 0 0: Multi-Word DMA mode 0 is not selected 7-3 Reserved 2 Multi-Word DMA mode 2 supported These specifications are subject to change without notice. (c) 2011 Greenliant Systems 13 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM 1 0 Data Sheet 06.000 July 2011 1: Multi-Word DMA mode 2 and below are supported and Bits 0 and 1 are set to 1 Multi-Word DMA mode 1 supported 1: Multi-Word DMA mode 1 and below are supported Multi-Word DMA mode 0 supported 1: Multi-Word DMA mode 0 is supported 3) Word 64: Advanced PIO Data Transfer Mode Bits [7:0] are defined as the PIO data and register transfer supported field. If this field is supported, bit 1 of Word 53 shall be set to one. This field is bit significant. Any number of bits may be set to one in this field by the device to indicate the PIO modes the device is capable of supporting. Of these bits, bits [7:2] are reserved for future PIO modes. Bit 0 1 Function 1: PATA NANDrive supports PIO Mode-3 1: PATA NANDrive supports PIO Mode-4 20) Word 65: Minimum Multi-Word DMA Transfer Cycle Time Per Word This field defines the minimum Multi-Word DMA transfer cycle time per Word. This field defines, in nanoseconds, the minimum cycle time that the PATA NANDrive supports when performing Multi-Word DMA transfers on a per Word basis. The PATA NANDrive supports up to Multi-Word DMA Mode-2, so this field is set to 120ns. 20) The PATA NANDrive is capable of supporting Multi-Word DMA Mode-4 cycle time of 80ns (0050H). Contact Greenliant sales/ FAE for more details. 20) Word 66: Device Recommended Multi-Word DMA Cycle Time This field defines the PATA NANDrive recommended Multi-Word DMA transfer cycle time. This field defines, in nanoseconds, the minimum cycle time per Word during a single sector host transfer while performing a multiple sector READ DMA or WRITE DMA command for any location on the media under nominal conditions. If a Host runs at a faster cycle rate by operating at a cycle time of less than this value, the PATA NANDrive may negate DMARQ for flow control. The rate at which DMARQ is negated could result in Advance Information reduced throughput despite the faster cycle rate. Transfer at this rate does not ensure that flow control will not be used, but implies that higher performance may result. The PATA NANDrive supports Multi-Word DMA Mode-2, so this field is set to 120ns. 21) Word 67: Minimum PIO Transfer Cycle Time Without Flow Control This field defines, in nanoseconds, the minimum cycle time that, if used by the Host, the device guarantees data integrity during the transfer without utilization of IORDY flow control. If this field is supported, Bit 1 of Word 53 shall be set to one. The PATA NANDrive supports PIO Mode-4, so this field is set to 120ns. 21) The PATA NANDrive is capable of supporting PIO Mode-6 cycle time of 80ns (0050H). Contact Greenliant sales/ FAE for more details. 21) Word 68: Minimum PIO Transfer Cycle Time With IORDY This field defines, in nanoseconds, the minimum cycle time that the device supports while performing data transfers while utilizing IORDY flow control. If this field is supported, Bit 1 of Word 53 shall be set to one. The PATA NANDrive supports PIO Mode-4, so this field is set to 120ns. Word 80: Major Version Number If not 0000h or FFFFh, the device claims compliance with the major version(s) as indicated by bits [6:1] being set to one. Since ATA standards maintain downward compatibility, a device may set more than one bit. The PATA NANDrive supports ATA-1 to ATA-6. Word 81: Minor Version Number If an implementer claims that the revision of the standard they used to guide their implementation does not need to be reported or if the implementation was based upon a standard prior to the ATA-3 standard, Word 81 should be 0000h or FFFFh. A value of 0019h reported in Word 81 indicates ATA-6 T13/1410D revision 3a guided the implementation. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 14 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Words 82-84: Features/command sets supported Words 82, 83 and 84 indicate the features and command sets supported. A value of 706Bh is reported. Word 82 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Function 0: Obsolete 1: NOP command is supported 1: Read Buffer command is supported 1: Write Buffer command is supported 0: Obsolete 0: Host Protected Area feature set is not supported 0: Device Reset command is not supported 0: Service interrupt is not supported 0: Release interrupt is not supported 1: Look-ahead is supported 1: Write cache is supported 0: Packet Command feature set is not supported 1: Power Management feature set is supported 0: Removable Media feature set is not supported 1: Security Mode feature set is supported 1: SMART feature set is supported Word 83 The values in this Word should not be depended on by host implementers. Bit 15 14 13-9 8 7-5 4 3 2 1 0 Function 0: Provides an indication whether the features/command sets supported Words are not valid 1: Provides an indication whether the features/command sets supported Words are valid 0: Reserved 0: Set-Max security extension is not supported 0: Reserved 0: Removable Media Status feature set is not supported 1: Advanced Power Management feature set is supported 1: CFA feature set is supported 0: Read DMA Queued and Write DMA Queued commands are not supported 0: Download Microcode command is not supported Word 84 The values in this Word should not be depended on by host implementers. Bit 15 14 13-0 Function 0: Provides an indication whether the features/command sets supported Words are not valid 1: Provides an indication whether the features/command sets supported Words are valid 0: Reserved Words 85-87: Features/command sets enabled Words 85, 86, and 87 indicate features/command sets enabled. The Host can enable/disable the features or command set only if they are supported in Words 82-84. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 15 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Word 85 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Function 0: Obsolete 0: NOP command is not enabled 1: NOP command is enabled 0: Read Buffer command is not enabled 1: Read Buffer command is enabled 0: Write Buffer command is not enabled 1: Write Buffer command is enabled 0: Obsolete 1: Host Protected Area feature set is enabled 0: Device Reset command is not enabled 0: Service interrupt is not enabled 0: Release interrupt is not enabled 0: Look-ahead is not enabled 1: Look-ahead is enabled 0: Write cache is not enabled 1: Write cache is enabled 0: Packet Command feature set is not enabled 0: Power Management feature set is not enabled 1: Power Management feature set is enabled 0: Removable Media feature set is not enabled 0: Security Mode feature set has not been enabled via the Security Set Password command 1: Security Mode feature set has been enabled via the Security Set Password command 0: SMART feature set is not enabled Word 86 Bit 15-9 8 7-5 4 3 2 1 0 Function 0: Reserved 1: Set-Max security extension supported 0: Reserved 0: Removable Media Status feature set is not enabled 0: Advanced Power Management feature set is not enabled 0: CFA feature set is disabled 0: Read DMA Queued and Write DMA Queued commands are not enabled 0: Download Microcode command is not enabled Word 87 The values in this Word should not be depended on by host implementers. Bit 15 14 13-0 Function 0: Provides an indication whether the features/command sets supported Words are not valid 1: Provides an indication whether the features/command sets supported Words are valid 0: Reserved These specifications are subject to change without notice. (c) 2011 Greenliant Systems 16 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Word 88 Bit Function 15-13 Reserved 12 1: Ultra DMA mode 4 is selected 0: Ultra DMA mode 4 is not selected 11 1: Ultra DMA mode 3 is selected 0: Ultra DMA mode 3 is not selected 10 1: Ultra DMA mode 2 is selected 0: Ultra DMA mode 2 is not selected 9 1: Ultra DMA mode 1 is selected 0: Ultra DMA mode 1 is not selected 8 1: Ultra DMA mode 0 is selected 0: Ultra DMA mode 0 is not selected 7-5 Reserved 4 1: Ultra DMA mode 4 and below are supported 3 1: Ultra DMA mode 3 and below are supported 2 1: Ultra DMA mode 2 and below are supported 1 1: Ultra DMA mode 1 and below are supported 0 1: Ultra DMA mode 0 is supported Word 89: Time required for Security erase unit completion Word 89 specifies the time required for the Security Erase Unit command to complete. Value 0 1-254 255 Time Value not specified (Value * 2) minutes >508 minutes Word 90: Time required for Enhanced security erase unit completion Word 90 specifies the time required for the Enhanced Security Erase Unit command to complete. Value 0 1-254 255 Time Value not specified (Value * 2) minutes >508 minutes Word 128: Security Status Bit 8 5 4 3 2 1 0 Function Security Level 1: Security mode is enabled and the security level is maximum 0: and security mode is enabled, indicates that the security level is high Enhanced security erase unit feature supported 1: Enhanced security erase unit feature set is supported Expire 1: Security count has expired and Security Unlock and Security Erase Unit are command aborted until a Power-on reset or hard reset Freeze 1: Security is frozen Lock 1: Security is locked Enable/Disable 1: Security is enabled 0: Security is disabled Capability 1: PATA NANDrive supports security mode feature set 0: PATA NANDrive does not support security mode feature set These specifications are subject to change without notice. (c) 2011 Greenliant Systems 17 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 Word 163: CF Advanced True IDE Timing Mode Capability and Settings This Word describes the capabilities and current settings for CF modes utilizing the True IDE interface. Four separate fields determine support and selection options in the Advanced PIO and Advanced Multiword DMA timing modes. For information on the older modes, see "Word 63: Multi-Word DMA Transfer Mode" and "Word 64: Advanced PIO Data Transfer Mode". When the Identity-Drive command executes, the device returns 0492h. Bit Function 2-0 Advanced True IDE PIO Mode Support. Indicates the maximum True IDE PIO Mode supported by the card Value Time 0 Specified in Word64 1 PIO Mode 5 2 PIO Mode 6 3-7 Reserved 5-3 Advanced True IDE Multi-Word DMA Mode Support. Indicates the maximum True IDE MultiWord DMA Mode supported by the card Value Time 0 Specified in Word63 1 Multiword DMA Mode 3 2 Multiword DMA Mode 4 3-7 Reserved 8-6 Advanced True IDE PIO Mode Support. Indicates the current True IDE PIO Mode selected on the card Value Time 0 Specified in Word64 1 PIO Mode 5 2 PIO Mode 6 3-7 Reserved 11-9 Advanced True IDE Multi-Word DMA Mode Support. Indicates the current True IDE Multi-Word DMA Mode selected on the card Value Time 0 Specified in Word63 1 Multiword DMA Mode 3 2 Multiword DMA Mode 4 3-7 Reserved 15-12 Reserved These specifications are subject to change without notice. (c) 2011 Greenliant Systems 18 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 10.2.2 Set-Features - EFh Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 7 6 5 4 3 2 1 0 EFh X Drive X X X X Config Feature This command is used by the Host to establish or select certain features. Table 10-4 defines all features that are supported. Table 10-4: Features Supported Feature Operation 01h Enable 8-bit data transfers. 02h Enable Write cache 03h Set transfer mode based on value in Sector Count register. Table 10-5 defines the values. 09h Enable Extended Power Operations 55h Disable Read Look Ahead. 66h Disable Power-on Reset (POR) establishment of defaults at software reset. 69h NOP - Accepted for backward compatibility. 81h Disable 8-bit data transfer. 82h Disable Write Cache 89h Disable Extended Power operations 96h NOP - Accepted for backward compatibility. 97h Accepted for backward compatibility. Use of this Feature is not recommended. AAh Enable Read-Look-Ahead CCh Enable Power-on Reset (POR) establishment of defaults at software reset. Features 01h and 81h are used to enable and clear 8-bit data transfer mode. If the 01h feature command is issued all data transfers will occur on the low order D[7:0] data bus and the IOCS16# signal will not be asserted for data register accesses. Features 02h and 82h allow the Host to enable or disable write cache in the PATA NANDrive that implements write cache. When the subcommand Disable-Write-Cache is issued, the PATA NANDrive should initiate the sequence to flush cache to non-volatile memory before command completion. Feature 03h allows the Host to select the transfer mode by specifying a value in the Sector Count register. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. One PIO mode is selected at all times. The Host may change the selected modes by the Set-Features command. Feature 55h is the default feature for the PATA NANDrive. Therefore, the Host does not have to issue SetFeatures command with this feature unless it is necessary for compatibility reasons. Features 66h and CCh can be used to enable and disable whether the Power-on Reset (POR) Defaults will be set when a software reset occurs. Table 10-5: Transfer Mode Values Mode PIO default mode PIO default mode, disable IORDY PIO flow control transfer mode Multi-Word DMA mode Ultra-DMA mode Reserved 22) Bits [7:3] Bits [2:0] 00000b 00000b 00001b 00100b 01000b Other 000b 001b 22) Mode 22) Mode 22) Mode N/A Mode = transfer mode number, all other values are not valid These specifications are subject to change without notice. (c) 2011 Greenliant Systems 19 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 10.2.3 Idle - 97h or E3h Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 7 6 X 5 4 3 2 97h or E3h Drive X X X Timer Count (5 msec increments) X 1 0 X This command causes the PATA NANDrive to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic Power-down mode is enabled. If the sector count is zero, the automatic Power-down mode is also 23) enabled, the timer count is set to 3, with each count being 5 ms . 23) The time base equals to 5 ms is different from the ATA specification. 10.2.4 Set-Sleep-Mode - 99h or E6h Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 7 6 5 4 3 99h or E6h Drive X X X X X X 2 1 0 X This command causes the PATA NANDrive to set BSY, enter the Sleep mode, clear BSY and generate an interrupt. Recovery from sleep mode is accomplished by simply issuing another command (a reset is permitted, but not required). Sleep mode is also entered when internal timers expire so the Host does not need to issue this command except when it wishes to enter Sleep mode immediately. The default value for the timer is 15 milliseconds. 10.2.5 Set-WP#/PD#-Mode - 8Bh Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 7 6 5 4 3 2 1 0 8Bh X Drive X 6Eh 44h 72h 50h 55h or AAh This command configures the WP#/PD# pin for either the Write Protect mode or the Power-down mode. When the Host sends this command to the device with the value AAH in the feature register, the WP#/PD# pin is configured for the Write Protect mode. The Write Protect mode is the factory default setting. When the Host sends this command to the device with the value 55h in the feature register, WP#/PD# is configured for the Power-down mode. All values in the C/D/H register, the Cylinder Low register, the Cylinder High register, the Sector Number register, the Sector Count register, and the Feature register need to match the values shown above, otherwise, the command will be treated as an invalid command. Once the mode is set with this command, the device will stay in the configured mode until the next time this command is issued. Power-off or reset will not change the configured mode. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 20 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 10.2.6 Error Posting The following table summarizes the valid status and error values for the PATA NANDrive command set. Table 10-6: Error and Status Register Command Check-Power-Mode Execute-Drive-Diagnostic Erase-Sector(s) Flush-Cache Format-Track Identify-Drive Idle Idle-Immediate Initialize-Drive-Parameters NOP Read-Buffer Read-DMA Read-Multiple Read-Sector(s) Read-Verify-Sector(s) Recalibrate Request-Sense Security-Disable-Password Security-Erase-Prepare Security-Erase-Unit Security-Freeze-Lock Security-Set-Password Security-Unlock Seek Set-Features Set-Multiple-Mode Set-Sleep-Mode Set-WP#/PD#-Mode SMART Standby Standby-Immediate Translate-Sector Write-Buffer Write-DMA Write-Multiple Write-Multiple-Without-Erase Write-Sector(s) Write-Sector(s)-Without-Erase Write-Verify Invalid-Command-Code 24), 25) BBK UNC Error Register IDNF ABRT V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V AMNF V V V V V V V V V V V V RDY V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V Status Register DWF DSC CORR V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V ERR V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V 24) The Host is required to reissue any media access command (such as Read-Sector and Write Sector) that ends with an error condition. 25) V = valid on this command. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 21 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 11.0 ELECTRICAL SPECIFICATIONS 11.1 Absolute Maximum Ratings Absolute Maximum Stress Ratings - Applied conditions greater than those listed under "Absolute Maximum Stress Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this datasheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability. Storage Temperature......................................................................................................................... -55C to +125C 26) D.C. Voltage on Pin types I3, I4, O4, and O5 to Ground Potential ............................................-0.5V to VDD +0.5V 26) Transient Voltage (<20 ns) on Pin types I3, I4, O4, and O5 to Ground Potential......................-2.0V to VDD +2.0V 26) D.C. Voltage on Pin types I1, I2, O1, O2, and O6 to Ground Potential ...................................-0.5V to VDDQ +0.5V 26) Transient Voltage (<20 ns) on Pin types I1, I2, O1, O2, and O6 to Ground Potential .............-2.0V to VDDQ +2.0V Package Power Dissipation Capability (TA = 25C)............................................................................................ 1.0W Through Hole Lead Soldering Temperature (10 Seconds) ................................................................................300C 28) Surface Mount Solder Reflow Temperature ..........................................................................260C for 10 seconds 27) Output Short Circuit Current ........................................................................................................................... 50mA 26) Refer to Table 3-1 "Pin Assignment" 27) Outputs shorted for no more than one second. No more than one output shorted at a time. 28) Refer to Figure 12-1 11.1.1 Absolute Maximum Power Pin Stress Ratings Table 11-1: Absolute Maximum Power Pin Stress Ratings Parameter Input Power Symbol VDDQ VDD Voltage on all other pins with respect to VSS 11.2 Conditions -0.3V min to 6.5V max -0.3V min to 4.0V max -0.5V min to VDD + 0.5V max Operating Ratings Table 11-2: Operating Range VDDQ Range Ambient Temperature Industrial -40C to +85C 11.3 3.3V Min 3.135V VDD 3.3V 5V Max 3.465V Min 4.5V Max 5.5V Min 3.135V Max 3.465V AC Characteristics 11.3.1 AC Conditions of Test Table 11-3: AC Conditions of Test Input Rise/Fall Time 10 ns Output Load CL = 100 pF Figure 11-1: AC Input/Output Reference Waveforms These specifications are subject to change without notice. (c) 2011 Greenliant Systems 22 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 11.4 Recommended System Power-on Timing Table 11-4: Recommended System Power-on Timing Symbol Parameter 29) TPU-INITIAL Drive Initialization to Ready TPU-READY1 TPU-WRITE1 Host Power-on/Reset to Ready Operation Host Power-on/Reset to Write Operation Typical Maximum 3sec + (0.5 100 sec/GByte) 200 1,000 200 1,000 Units sec ms ms 29) This parameter is measured only for initial qualification and after a design or process change that could affect. 11.5 Reliability Characteristics 29) Table 11-5: Reliability Characteristics Symbol Parameter ILTH Latch Up 11.6 Minimum Specification 100 + IDD Units Test Method mA JEDEC Standard 78 Capacitance 29) Table 11-6: Capacitance (Ta = 25C, f=1 MHz, other pins open) Parameter Description CI/O I/O Pin Capacitance CIN Input Capacitance These specifications are subject to change without notice. (c) 2011 Greenliant Systems 23 Test Condition VI/O = 0V VIN = 0V Maximum 10 pF 10 pF 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 11.7 DC Characteristics Table 11-8: DC Characteristics for Host Interface Symbol VIH1 VIL1 IIL1 IU1 VT+2 VT-2 IIL2 IU2 VOH1 VOL1 IOH1 IOL1 VOH2 VOL2 IOH2 IOL2 VOH6 VOL6 IOH6 IOL6 IOH6 IOL6 Type I1 Parameter Min Input Voltage I1Z I1U I2 Input Leakage Current Input Pull-Up Current Input Voltage Schmitt Trigger I2Z I2U Input Leakage Current Input Pull-Up Current Output Voltage -10 -150 0.8 10 -6 2.0 0.8 -10 -150 2.4 10 -6 0.4 O1 -4 Output Current Output Voltage 4 2.4 0.4 O2 -8 Output Current Output Voltage O6 8 2.4 0.4 Output Current -4 Output Current -4 12 12 Table 11-9: Power Consumption Symbol Type Device IDD 30), 31) ISP IDD ISP PWR PWR 30), 31) Max 2 PWR PWR Parameter Power supply current (TA = -40C to +85C) GLS85LD0512 Sleep/Standby/Idle -60-RI-LBTE current (TA = -40C to +85C) Power supply current (TA = -40C to +85C) GLS85LD1001T Sleep/Standby/Idle -60-RI-LBTE current (TA = -40C to +85C) Units V V A A V V A A V V mA mA V V mA mA V V mA mA mA mA Min Conditions VDDQ=VDDQ Max VDDQ=VDDQ Min VIN = GND to VDDQ, VDDQ=VDDQ Max VOUT=GND, VDDQ=VDDQ Max VDDQ=VDDQ Max VDDQ=VDDQ Min VIN = GND to VDDQ, VDDQ=VDDQ Max VOUT=GND, VDDQ=VDDQ Max IOH1=IOH1 Min IOL1=IOL1 Max VDDQ=VDDQ Min VDDQ=VDDQ Min IOH2=IOH2 Min IOL2=IOL2 Max VDDQ=2.7V VDDQ=VDDQ Min IOH6=IOH6 Min IOL6=IOL6 Max VDDQ=2.7-3.465V VDDQ=2.7-3.465V VDDQ=4.5-5.5V VDDQ=4.5-5.5V Max Units Conditions VDD=VDD Max, VDDQ=VDDQ Max 130 mA 1000 A VDD=VDD Max, VDDQ=VDDQ Max 160 mA VDD=VDD Max, VDDQ=VDDQ Max 1050 A VDD=VDD Max, VDDQ=VDDQ Max 30) Sequential data transfer from host interface and write data to media. 31) This parameter is measured only for initial qualification and after a design or process change that could affect. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 24 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 12.0 APPENDIX 12.1 Differences between the PATA NANDrive and the ATA Specifications 12.1.1 Idle Timer The Idle timer uses an incremental value of 5 ms, rather than the 5 sec minimum increment value specified in the ATA specifications. 12.1.2 Recovery from Sleep Mode For the PATA NANDrive devices, recovery from sleep mode is accomplished by simply issuing another command to the device. Hardware or Software reset is not required. 12.2 Reflow Profile Figure 12-1: Soldering Reflow Profile These specifications are subject to change without notice. (c) 2011 Greenliant Systems 25 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 12.3 Product Ordering Information GLS 85 LD XX XX 1 001T X XXXX - 60 - RI XX - XX - LBTE - XXXX Environmental Attribute 32) E = non-Pb Package Modifier T = 88 ball positions (nearest letter code to total ball count of 91) Package Type LB = LBGA Operation Temperature I = Industrial: -40C to +85C Write Cycles per Group R = 100M Host Access Time 60 = 60ns, UDMA Mode-4 Version Capacity 512 = 512 MByte 001 = 1 GByte MByte or GByte Designator 1 = GByte/ 0 = MByte Interface P= Parallel ATA/IDE Interface Voltage L = 3.3V Product Series 85 NANDrive 32) Environmental suffix "E" denotes nonPb solder. Greenliant non-Pb solder devices are "RoHS Compliant." Valid Combinations 33) PATA NANDrive Product GLS85LD0512-60-RI-LBTE/ GLS85LD1001T-60-RI-LBTE PATA NANDrive Evaluation Board (xxCN: xx-pin ATA Interface EVB, K: Kit) GLS85LD0512-60-RI-40CN-K, GLS85LD1001T-60-RI-40CN-K, GLS85LD0512-60-RI-44CN-K, GLS85LD1001T-60-RI-44CN-K 33) Valid product combinations are those that are in the mass production or will be in the mass production. Consult your Greenliant sales representative to confirm availability of the valid combinations and to determine availability of new product combinations. These specifications are subject to change without notice. (c) 2011 Greenliant Systems 26 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 12.4 Packaging Diagram 12.4.1 LBTE Package Figure 12-2: PATA NANDrive 91-Ball, Ball Grid Array (BGA) Greenliant Package Code: LBTE Note: All linear dimensions are in millimeters. Un-tolerance dimensions are nominal target values. Co-planarity: 0.15 mm. Ball opening size is 0.40 mm ( 0.05 mm). These specifications are subject to change without notice. (c) 2011 Greenliant Systems 27 07/26/2011 S71382 GLS85LD1001T / GLS85LD512 Industrial Grade PATA NANDriveTM Data Sheet 06.000 July 2011 12.5 Reference Documents Table 12-1: Reference Document Title Revision 02.000 02.000 NANDrive SMART Specification WindowsPT2 User Guide 12.6 Date Feb 10, 2011 March 1, 2011 Revision History Table 12-2: Revision History Number 00.000 01.000 02.000 03.000 04.000 05.000 06.000 Description - Initial release for SST85LD0512/SST85LD1001T/SSTLD1002U Data Sheet - Added 5I (100M cycle endurance) information including updates in "Features" , "General Description" , "Capacity Specification" , "Lifetime Expectancy" , "Software Interface" "Electrical Specifications" , and "Product Ordering Information". - Changed pin K2 from DMACK to DMACK# in Figure 2 and Table 1. - Preliminary Specifications-to-Data Sheet phase change - End-of-Life valid combinations SST85LD0512-60-5I-LBTE, SST85LD1001T-605ILBTE, and SST85LD1002U-60-5I-LBTE. See S71382 (02). - Removed all references to 100M cycle endurance in Features, page 1 and Standard NANDrive on page 2 and page 12. - Removed SST85LD0512-60-5I-LBTE, SST85LD1001T-60-5I-LBTE, and - SST85LD1002U-60-5I-LBTE from Table 3 on page 7, Table 4 on page 7, and Table 20 on page 30. - Applied the new document format - Updated Figure 1. - Transferred from SST to Greenliant - Updated the typical of power consumption for GLS85LD1001T-60-RI-LBTE and the performance value for Sustained Sequential Write, on Page1. - Removed the descriptions of Endurance and Data retention on Page1. - Corrected the description and I/O type of IORDY on pin assignment table, on Table3-1 on Page6. - Added Solder Reflow Profile, Figure12-1 on Page25. - Changed the definition of "R" in the ordering information from Endurance to Write Cycles per Group on Page26. - Added Reference Document table, Table12-1 on Page28. Date April, 2008 September, 2008 November, 2008 September, 2008 October, 2009 May, 2010 July, 2011 (c) 2011 Greenliant Systems. All rights reserved. Greenliant, the Greenliant Logo and NANDrive are trademarks of Greenliant Systems. All other trademarks and registered trademarks are the property of their respective owners. Specifications are subject to change without notice. Memory sizes denote raw storage capacity; actual usable capacity may be less. Greenliant makes no warranty for the use of its products other than those expressly contained in the Greenliant Terms and Conditions of Sale. www.greenliant.com These specifications are subject to change without notice. (c) 2011 Greenliant Systems 28 07/26/2011 S71382 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Greenliant: GLS85LD0512-60-RI-LBTE-TM023