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FEATURES
LOWDRIFT|VGS12/T|=10µV/°CTYP.
LOWNOISEen=6nV/Hz@10HzTYP.
LOWPINCHOFFV
p
=2.5VTYP.
ABSOLUTEMAXIMUMRATINGS
@25°C(unlessotherwisenoted)
MaximumTemperatures
StorageTemperature‐65°Cto+150°C
OperatingJunctionTemperature+150°C
MaximumVoltageandCurrentforEachTransistorNote1
VGSSGateVoltagetoDrainorSource50V
VDSODraintoSourceVoltage50V
IG
(
f
)
GateForwardCurrent10mA
MaximumPowerDissipation
DeviceDissipation@FreeAirTotal300mW
MATCHINGCHARACTERISTICS@25°CUNLESSOTHERWISENOTED
SYMBOLCHARACTERISTICSVALUEUNITSCONDITIONS
|VGS12/T|max.DRIFTVS.
TEMPERATURE
40µV/°CVDG=10V,ID=200µA
TA=55°Cto+125°C
|VGS12|max.OFFSETVOLTAGE20mVVDG=10V,ID=200µA
ELECTRICALCHARACTERISTICS@25°C(unlessotherwisenoted)
SYMBOLCHARACTERISTICSMIN.TYP.MAX.UNITSCONDITIONS
BVGSSBreakdownVoltage5060 ‐‐ VVDS=0ID=1nA
BVGGOGateToGateBreakdown±50 ‐‐ ‐‐ V IG=1nAID=0IS=0
YfSS
TRANSCONDUCTANCE
FullConduction
2000
‐‐
7000
µmho
VDG=10VVGS=0Vf=1kHz
YfSTypicalOperation1000 ‐‐ 2000µmho VDG=15VID=200µAf=1kHz
|YFS12/YFS|Mismatch ‐‐ 0.63%
IDSS
DRAINCURRENT
FullConduction
0.5
‐‐
10
mA
VDG=10VVGS=0V
|IDSS12/IDSS|MismatchatFullConduction ‐‐ 15%
VGS(off)orV
p
GATEVOLTAGE
Pinchoffvoltage
0.5
‐‐
2.5
V
VDS=15VID=1nA
VGS(on)OperatingRange ‐‐ ‐‐ 2.3V VDS=15VID=200µA
IGmax.
GATECURRENT
Operating
‐‐
4
15
pA
VDG=15VID=200µA
IGmax.HighTemperature ‐‐ ‐‐ 10nATA=+125°C
IGSSmax.AtFullConduction ‐‐ ‐‐ 100pAVDS =0
IGSSmax.HighTemperature555pAVDG=15VTA=+125°C
YOSS
OUTPUTCONDUCTANCE
FullConduction
‐‐
‐‐
20
µmho
VDG=10VVGS=0V
YOSOperating ‐‐ 0.22µmhoVDG=15VID=500µA
CMR
COMMONMODEREJECTION
20log|VGS12/VDS|
95
‐‐
‐‐
dB
VDS=10to20VID=30µA
NF
NOISE
Figure
‐‐
‐‐
0.5
dB
VDS=15VVGS=0VRG=10M
f=100HzNBW=6Hz
enVoltage ‐‐ 20 ‐‐ nV/HzVDS=15VID=200µAf=10HzNBW=1Hz
CISS
CAPACITANCE
Input
‐‐
‐‐
8
pF
VDS=15VID=200µAf=1MHz
CRSSReverseTransfer ‐‐ ‐‐ 1.5pF
The SST405 is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET
SST405
LOW NOISE, LOW DRIFT
MONOLITHIC DUAL
N-CHANNEL JFET
SST405 Applications:
Wideband Differential Amps
High-Speed,Temp-Compensated Single-Ended
Input Amps
High-Speed Comparators
Impedance Converters and vibrations detectors.
The SST405 is a high-performance monolithic dual
JFET featuring extremely low noise, tight offset voltage
and low drift over temperature specifications, and is
targeted for use in a wide range of precision
instrumentation applications. The SST405 features a 5-
mV offset and 10-µV/°C drift. The SST405 is a direct
replacement for discontinued Siliconix SST405.
The 8 Pin P-DIP and 8 Pin SOIC provide ease of
manufacturing, and the symmetrical pinout prevents
improper orientation.
(See Packaging Information).
Linear S
y
stems re
p
laces discontinued Siliconix SST405
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
PDIP / SOIC (Top View)
Available Packages:
SST405 in PDIP / SOIC
SST405 available as bare die
Please contact Micross for full package and die dimensions
Micross Components Europe
Tel: +44 1603 788967
Email: chipcomponents@micross.com
Web: http://www.micross.com/distribution