K6T4008C1B Family CMOS SRAM
Revision 3.0
September 1998
4
RECOMMENDED DC OPERATING CONDITIONS1)
Note:
1. Commercial Product: TA=0 to 70°C, otherwise specified
Industrial Product: TA=-40 to 85°C, otherwise specified
2. Overshoot: VCC+3.0V in case of pulse width ≤ 30ns
3. Undershoot: -3.0V in case of pulse width ≤ 30ns
4. Overshoot and undershoot are sampled, not 100% tested.
Item Symbol Min Typ Max Unit
Supply voltage Vcc 4.5 5.0 5.5 V
Ground Vss 0 0 0 V
Input high voltage VIH 2.2 -Vcc+0.52) V
Input low voltage VIL -0.53) -0.8 V
CAPACITANCE1) (f=1MHz, TA=25°C)
1. Capacitance is sampled, not 100% tested
Item Symbol Test Condition Min Max Unit
Input capacitance CIN VIN=0V -8pF
Input/Output capacitance CIO VIO=0V -10 pF
DC AND OPERATING CHARACTERISTICS
Item Symbol Test Conditions Min Typ Max Unit
Input leakage current ILI VIN=Vss to Vcc -1 -1µA
Output leakage current ILO CS=VIH or OE=VIH or WE=VIL, VIO=Vss to Vcc -1 -1µA
Operating power supply ICC IIO=0mA, CS=VIL, VIN=VIL or VIH, Read -7.5 15 mA
Average operating current ICC1 Cycle time=1µs, 100% duty, IIO=0mA
CS≤0.2V, VIN≥0.2V or VIN ≥ Vcc-0.2V Read -410 mA
Write -27 40
ICC2 Cycle time=Min, 100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL -65 80 mA
Output low voltage VOL IOL=2.1mA - - 0.4 V
Output high voltage VOH IOH=-1.0mA 2.4 - - V
Standby Current(TTL) ISB CS=VIH, Other inputs = VIL or VIH - - 3mA
Standby Current(CMOS) ISB1 CS≥Vcc-0.2V, Other inputs=0~Vcc
K6T4008C1B-L -2100 µA
K6T4008C1B-B -120 µA
K6T4008C1B-P -2100 µA
K6T4008C1B-F -150 µA