N February 1999
Evaluation Board Instruction Manual
ADC12081, ADC12181 and ADC12281
12-Bit, 5, 10 and 20 MSPS, Self-Calibrating, Pipelined
Analog-to-Digital Converters with Internal Sample & Hold
© 1999 National Semiconductor Corporation.
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Table of Contents
1.0 Introduction ...................................................................................................................................5
2.0 Board Assembly.............................................................................................................................5
3.0 Quick Start.....................................................................................................................................6
4.0 Functional Description...................................................................................................................6
4.1 Input (signal conditioning) circuitry .................................................................................6
4.2 ADC reference circuitry....................................................................................................6
4.3 ADC clock circuit.............................................................................................................6
4.4 ADC control signals.........................................................................................................6
4.5 Digital Data Output..........................................................................................................7
4.6 Power Supply Connections ...............................................................................................7
4.7 Power Requirements.........................................................................................................7
5.0 Installing the ADC12181 Evaluation Board ...................................................................................7
6.0 Evaluation Board Specifications.....................................................................................................7
7.0 Hardware Schematic ......................................................................................................................8
8.0 Evaluation Board Bill of Materials.................................................................................................9
A1.0 Operating in the Computer Mode ................................................................................................10
A2.0 Summary Tables of Test Points and Connectors...........................................................................10
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1.0 Introduction The second mode is the Computer mode. In this mode,
evaluation is simplified by connecting the board to the
Wavevision™ Digital Interface Board (order number
WAVEVISION BRD), which is connected to a personal
computer through a serial communication port and running
WaveVision™ software, operating under Microsoft
Windows 3.1 or later.
The ADC12181EVAL Design Kit (consisting of the
ADC12181 Evaluation Board, National's WaveVision™
software and this manual) is designed to ease evaluation
and design-in of Nationals ADC12081, ADC12181 and
ADC12281 12-bit Analog-to-Digital Converters, which
operate at s peeds up to 5 MSPS, 10 MSPS and 20 MSPS,
respectively. W henever t he AD C12181 is ment ioned in this
manual, the ADC12081 and the ADC12281 are also
included.
The signal at the Analog Input to the board is digitized and
is available at pins B16 through B21 and C16 through C21
of J7. Pins A16 through A21 of J7 are ground pins.
The WaveVision™ software can be operated under
Microsoft W indows 3.1 or later. The signal at the Analog
Input is digitized and can be c aptur ed and displayed on t he
computer monitor as dynamic waveforms. The digitized
output is also available at Euro connector J7.
Provis ion is made f or adjus tment of t he Ref erenc e V oltage
VREF and of the Input Signal DC Offset voltage.
2.0 Board Assembly
T he AD C12181 Evaluation B oard may come preas sembled
or as a bare board with a surf ace mounted ADC 12181 that
must be assembled. Refer to the Bill of Materials for a
description of components, to Figure 1 for major component
placement and to Figure 2 for the Evaluation Board
schematic.
The software can perform an FFT on the captured data
upon command. The FFT display also shows dynamic
performance in the form of SNR, SINAD, THD and SFDR.
A prototype area is available for building customized input
conditioning circuitry. A breadboard area is provided for building customized
circuitry. For best performance, keep circuitry neat and
arrange components to provide short, direct connections.
The evaluation board can be used in either of two modes.
The first mode is the Manual or Stand-Alone mode where
suitable test equipment can be used with the board to
evaluate the ADC12181 performance.
J2
J7
Y1
RP3 RP2
+Vin
GND
+5V
-Vin
J5
L4
L1
L2
L3
U9
GND
TP4
TP8
-12V
TP9
+12V
TP10
+5V
ADC CLK
J6
TP2
VREF
TP1
ADC IN
VR1
VR2
VREF
Input Signal
DC Offset
Analog Input
J2
S1
Calibrate
NATIONAL SEMICONDUCTOR
ADC12181 EVAL BOARD
POWE R CO NNECTOR
+5V
TP6
TP5
ADC CLK
GND
TP3
GND
JP1
U1
TP7
-5VA
J6
ADC CLK
Analog
Input
DC
Offset Ref.
Adj.
TP1
ADC IN
TP2
VREF
Ground S1
Cal SW TP5
ADC CLK TP6
+5V
J5
Power
Ground
TP9
+12V
TP10
+5V
TP3
Ground TP8
-12V TP4
+5VA
TP7
-5VA
Proto
Area
J6
Detail
Stand Alone
Position
Figure 1. Component and Test Point Locations
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3.0 Quick Start 4.1 Input (signal conditioning) circuitry
Refer to Figure 1 for locations of test points and major
components. For Stand-Alone operation:The input signal to be digitized should be applied to BNC
connector J2. This 50 Ohm input is intended to accept a
low-noise sine wave signal centered at ground with
amplitude up to 1V peak-to-peak. To accurately evaluate the
ADC12181 dynamic performance, the input test signal will
have to be passed through a high-quality bandpass filter
with better than 12-bit equivalent noise and distortion
characteristics.
1. Install a 5, 10 or 20 MHz crystal into socket Y1,
depending upon the particular ADC on the board.
While the oscillator may be soldered to the board,
using a socket will allow you to easily change clock
frequencies.
2. Connect pin C12 of J7 to GND to enable the ADC
output buffers. The input amplifier, U1 (an LM6181 or a CLC409,
depending upon the ADC used), provides a gain of
approximately +1.35 f or the AD C12081 and the AD C12181
circuits and about +1.95 for the ADC12281 circuit. The
output of the amplifier is applied to the ADC and can be
monitored at test point TP1. The d.c. level of the amplifier
output is c ontrolled by V R2. The analog input s ignal applied
to the ADC should be checked (at TP1) and adjusted to
ensure that it remains between GND and the reference
voltage applied to the ADC12181.
3. Connec t a c lean power supply to +Vin, -V in and G ND
at connector J5. Adjust power supplies +Vin and -Vin
to +5.5V and -5.5V, res pectively, bef ore connecting to
t he b oard . Wh en p ower i s app li ed t o t he boar d , adj u s t
the p ower s up plies s o that +5 V appear s at ei ther end
of L4 and -5V appear s at pin 4 of op-amp U1 (LM6181
or CLC409, depending upon the ADC used).
4. Use VR1 to set the ref erence voltage (VREF) for the
ADC to 2.0V. VREF can be measured at TP2. No scope or other test equipment should be connected to
TP1 to TP5 while gathering data or the results could be
worse than expected.
5. To use the crystal oscillator located at Y1 to clock the
ADC, connect the jumper at J6 to pins 2 and 3. The
ADC clock signal may be monitored at TP5.
4.2 ADC reference circuitry
6. Connect a signal of 1VP-P amplitude from a 50-Ohm
sourc e to Analog I nput BN C J2. The ADC input s ignal
can be observed at TP1. An adjustable reference circuit based on the LM4041-ADJ
i s p rovi d ed. Wh en us i ng th e r es i s tor val ues s h own in F ig . 1
the r ef erence circ uit will gener ate a referenc e voltage in the
range of approximately 1.2 to 2.4 volts. The ADC12181 is
s pecifi ed t o operate w i th VREF in the range of 1.8 to 2.2 V,
with a nominal value of 2.0V.
7. Adjus t the input signal amplitude (at the s ource or wit h
VR2) and the DC offset using VR2 as needed to
ens ur e that the s ignal at T P1 remains within the val id
signal range of 0V to VREF.
8. Push switch S1 to calibrate the ADC. The reference voltage for the ADC12181 can be monitored
at test point TP2 and is set with VR1.
9. The digitized signa l is a va ilable at pin B16 through B21
and C16 through C21 of J7.
4.3 ADC clock circuit
For Computer mode operation:
1. Connect the evaluation board to the Digital Interface
Board. See the Digital Interface Board Manual for
operation of that board.
T he clock signal applied to the ADC is s elec ted with jumper
JP6. A standard 5, 10 or 20 MHz crystal oscillator can be
inst alled at Y1 and selec ted with jumper J6 pins 2- 3. T o use
a diff erent c lock s ource, connec t the signal to pin B23 of J 7
and selec t pins 1-2 of jumper J6. T he ADC c lock s ignal can
be monitored at test point TP5. R10 and C8 are used for
high frequency termination of the clock line. In the Co mputer
mode of operation using the Digital Interface Board, JP6
should be set to connect pins 1 and 2 together to use the
clock from the Digital Interface Board used.
2. Perform steps 3 through 4 of the Stand-Alone
operating quick start, above.
3. Connect the jumper at J6 to pins 1 and 2. The ADC
clock s ignal may be monitored at T P5 af ter application
of power.
4. Perform steps 6 through 8 of the Stand-Alone
operating quick start, above.
4.4 ADC control signals
5. S ee t he Dig ital In terf ace Board M an ual for i nstructi ons
for gathering data. T he input and output c ontrol s ignals are at JP1. T he status
signals Ready and Over-Range are av ailable at pins 1 and 2
respectively. The active high Calibration command is
activated by pushing switch S1 and is available at JP1 pin 3.
The ADC12181 should be calibrated after power is applied
to the board. The active high Power-Down command is
4.0 Functional Description
The ADC12181 Evaluation Board schematic is shown in
Figure 2.
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conne cted to JP1 pin 4. The default level of the Power-dow n
command is LOW , which places the ADC12181 in normal
operating mode.
4.7 Power Requirements
Voltage and current requirements for the ADC12181
Evaluation Board in Stand-Alone mode are:
4.5 Digital Data Output. •+5.7V at 100 mA
•- 5.7V at 50 mA
The digital output data from the ADC12181 is available at
the 96-pin Euro connect or J7. If t he board is us ed in Stand-
Alone mode, J7 pin C12 must be connected to GND in
order to enable the ADC output buffer drivers. Series
resistors RP2 and RP3 isolate the ADC from the load circuit
in order to reduce noise coupling into the ADC.
•+5.0V at 30mA (1A when connected to the Digital
Interface Board).
5.0 Installing the ADC12181 Evaluation Board
The evaluation board requires power supplies as described
in Section 4.7. An appropriate signal generator (s uc h as the
HP3325B, HP4662A or the Tektronix TSG130A) with 50
Ohm source impedance should be connected to the Analog
Input BNC, J2.
4.6 Power Supply Connections
Pow er to this board is supplied thro ugh power connector J5.
The analog supplies are labeled +5VA and -5VA and can be
measured at TP4 (+5VA) and TP7 (-5VA). Because of the
series protection diodes, the voltages input at J5 should be
slightly higher than 5V in absolute magnitude. The
recommended power supply connection procedure is to
adjust a low-noise power supply to +5.5V and -5.5V before
connecting to J 5. Then, with the power supplies turned of f,
connec t the pos itive s upply to J 5- 1 (+V in label), c onnec t the
common GND t o J 5-2, connec t the negative supply to J 5-4
(-Vin label) and a +5V supply to J5-3(+5V label). Turn on
the power supplies and adjust the voltages measured at
TP4 and TP7 to +5V and -5V, respectively.
If this board is us ed in conjunc tion with the Digital Interface
Board and WaveVision software, a cable with a DB-9
connector must be connected between the Digital Interface
Board and the host computer. See the Digital Interface
Board manual for details.
6.0 Evaluation Board Specifications
Boa rd Size: 6.5" x 3.5" (16.5cm x 8.9 cm)
Pow er Require me nts: +5.7V @ 100 mA
When using the ADC12181 Evaluation Board with the
Digital Interface Board, the 5V logic power supply for the
interface board is pass ed through the evaluation board. T he
connection to the 5V logic power source is at J5-3 (+5V
label) and the common GND is connected at J5-2. This
supply is protected by shunt dio de D2 and can be measured
at T P6 or T P1 0. If a circ uit on the int erf ace board requir es
voltages greater than 5V, there are pins on connector J7
reserved for this purpose. These pins can be contacted at
TP8 and TP9 on the ADC12181 Evaluation Board and are
labeled -12V and +12V, respectively.
- 5.7V @ 50 mA
+ 5.0V @ 30 mA / 1A
(se e section 4.7)
Clock Freque ncy Ra nge : 1 MHz to 20 MHz
Analo g Input
Nomina l Volta ge : 1V
P
-
P
Impeda nce: 50 Ohms
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7.0 Hardware Schematic
Figure 2. ADC12081 / ACD12181 / ADC12281 Evaluation Board Hardware Schematic
Values in parentheses indicate
those used for the ADC12281,
when different from those used
with the ADC12081 and the
ADC12181.
CLKIN
__
OE
C3
0.0022uF
(22pF)
R5
47
(22)
IN PUT SIGNAL
DC O FFSET
TP1
TP_ADC IN
-5VA
+5VA
-5VA
VR2
2K
R8
430
(2.2K)
U1
LM6181
(CLC409)
+5VA
R2
1K
(220)
R1
150
(22)
R4
50
R3
220
R6
47
C2
0.1uF
C4
0.1uF
J2
BNC
ANALOG
INPUT
2 7
6
3
4
-
+
C16
1uF
C13
1uF TP2
REF
REF1
LM4041-ADJ
+5VA
R14
470
R15
1K
VR1
1K
C17
0.1uF
VREF
C18
1uF
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
RP3
8 X 47 Ohms
D7
D6
D5
D4
D3
D2
D1
D0
RP2
8 X 47 Ohms 1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
D9
D8
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
C20
0.1uF
PWRDN
CLKADC
R10
100
C8
22pF
C22
0.1uF
C21
0.1uF
C11, 0.1uF
C12, 0.1uF
C14, 0.1uF
CAL
OVER RANGE
READY JP1
+5VDUT
S1
CAL
R13
10K
C15
10uF
16V
+5VDUT
ADC12x81
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
VREF
VIN
VIN COM
AGND
VA
AGND
PD
CAL
D8
D7
D6
VD I/ O
DG ND I/O
D5
D4
D3
VRP
VRM
VRN
READY
OR
D11
D10
D9
DGND
CLK
__
OE
DGND
VD
D0
D1
D2
U9
TP3
GND
CLKIN
OSC
N/C DVCC
DGND OUT
1
7
14
8
Y1
+ 5V
J6
OSC
R11
47
R9
1K
1
2
3
C23
0.1uF
TP5
ADCCLK
CLKOSC
+5VA
+ C19
10uF, 15V
1
2
3
4
L1
CHOKE
L2
CHOKE
L3
CHOKE
+Vin
-Vin
D1
1N4001
D2
1N4001
D3
1N4001
+ C7
33uF, 15V
+ C9
100uF, 5V
C10
+ 33uF, 15V
-5VA
+5V
J5
POWER
CONNECTOR
+ 5VDUT L4
CHOKE
+Vin
GND
+5V
-Vin TP7
-5VA
TP4
+5VA
TP8 TP9 TP10
-12V +12V +5V
J7
96 PIN FEMALE EURO (DIN) CONNECT OR
A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11
A12
B12
C12
A13
B13
C13
A14
B14
C14
A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
A21
B21
C21
A22
B22
C22
A23
B23
C23
A24
B24
C24
A25
B25
C25
A26
B26
C26
A27
B27
C27
A28
B28
C28
A29
B29
C29
A30
B30
C30
A31
B31
C31
A32
B32
C32
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8.0 Evaluation Board Bill of Materials
(ADC12281 board componentes in parentheses, where different)
C1, C5, C6 - not used - --
C3 0.0022uF (22pF) DigiKey # P4574ND (TBD)
C8 22pF SMT type 1206
C2, C4, C11, C12, C14, C17, 0.1uF SMT type 0805
C20, C21, C22, C23
C13, C16, C18 1uF SMT type 1206
C15, C19 10uF, 16V SMT type 7343
C7, C10 33uF, 16V SMT type 7343
C9 100uF, 5V SMT type 7343
D1, D2, D3 1N400x Axial lead
J1, J3, J4 (not used) --
J2 BNC, right angle DigiKey # ARF1178-ND
J5 4-pin Terminal Block DigiKey # ED1609-ND
J6 3-pin Header, 0.1” (same as TP)
-- Shorting Jumper (one needed) DigiKey # S9001-ND
J7 96 Pin Female DIN Connector DigiKey # H7096-ND
JP1 4-pin Header, 0.1” (same as TP)
L1, L2, L3, L4 Choke DigiKey # M2204-ND
R7, R12 - not used - --
R1 150 Ω (22 Ω) SMT type 1206
R5 47 Ω (22 Ω) SMT type 1206
R4 50 ΩSMT type 1206
R6, R11 47 ΩSMT type 1206
R10 100 ΩSMT type 1206
R2 1k Ω (220 Ω)SMT type 1206
R3 220 ΩSMT type 1206
R9, R15 1 kΩSMT type 1206
R13 10 kΩSMT type 1206
R8 430 Ω (2.2 kΩ)SMT type 1206
R14 470 ΩSMT type 1206
RP1 - not used - --
RP2, RP3 8 X 47 Ω (33Ω is O.K.) SMT dual-in-line
REF1 Voltage Reference National LM4041CIZ-ADJ
S1 Push-button switch, SPST- NO DigiKey # P8026S-ND
Socket for U1 DIP 8 socket
TP1 - 5, 7 - 10, GND (2) Breakable Header, single row DigiKey # S1012-36-ND
TP6 - not used - --
-- 2 additional TP’s used for GND(same as TP)
U2 - 8 (not used) --
U1 Op-Amp National LM6181AIN (CLC409AJP)
U9 DUT National ADC12x81CIVT
VR1 1 kΩDigiKey # 3386F-102-ND
VR2 2 kΩDigiKey # 3386F-202-ND
Y1 10 MHz Full-size X TAL Oscillato rDigiKey # CTX-114-ND
Socket 4-pin full-size XTAL osc. socket for Y1 DigiKey # A462-ND
Standoffs or rubber feet 1 @ each corner of board --
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APPENDIX
A1.0 Operating in the Computer Mode
The ADC12181 Evaluation Board is compatible with the W aveVision™ Digital Interface Board and W aveVision™ software.
W hen connected to the Digital Interface Board data capture is easily controlled from a personal computer operating in the
Windows™ environment. The data samples captured can be observed on the video monitor in the time and frequency
do m ai n s. An FFT p l ot of t h e d ata sampl e can b e i m m edi ately calculated an d d ispl a yed . Th e F FT an al ysis of th e cap t u red d ata
yields insight into system noise and dis tortion sources and es timates of AD C dynamic perf ormanc e suc h as SI NA D, SN R and
THD.
See the Digital Interface Board manual for more information.
A2.0 Summary Tables of Test Points and Connectors
Test Points on the ADC12181 Evaluation Board
TP 1 Analog input to the ADC, measured at output pin of op-amp U1
TP 2 ADC reference voltage
TP 3 Ground
TP 4 +5V power supply for ADC12181 Eval Board
TP 5 ADC clock
TP 6 Not used
TP 7 -5V power supply for ADC12181 Eval Board
TP 8 Optional -12V power supply for Digital Interface Board
TP 9 Optional +12V power supply for Digital Interface Board
TP 10 +5V power supply for Digital Interface Board
JP1-1 ADC Ready output ( High indicates valid data output on D0...D11 )
JP1-2 ADC Out of Range output ( High indicates ADC analog input is Out of Range )
JP1-3 ADC Calibrate command ( Active High, connected to switch S1 )
JP1-4 ADC Power Down command ( Active High, connected to GND through R12 )
J5 Connector - Power Supply Connections
J5-1 +VIN +5.5V Power Supply for ADC12181 Eval Board
J5-2 GND Power Supply Ground
J5-3 +5V +5.0V Logic Power Supply for Digital Interface Board
J5-4 -VIN -5.5V Power Supply for ADC12181 Eval Board
J6 Connector - ADC Clock selection jumper settings
Connect 1-2 Use external clock signal from J7 pin B23
Connect 2-3 Use crystal oscillator Y1
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J7 Connector - ADC Data Outputs - Connection to WaveVision™ Digital Interface Board
Signal J7 pin number
ADC output D0 B16
ADC output D1 C16
ADC output D2 B17
ADC output D3 C17
ADC output D4 B18
ADC output D5 C18
ADC output D6 B19
ADC output D7 C19
ADC output D8 B20
ADC output D9 C20
ADC output D10 B21
ADC output D11 C21
GND A1 thru A24, A28, B28, C28, A31, B31, C31
ADC Output Enable C12
External clock input B23
Reserved, signal B22, C22, C23
Reserved, power A25, A26, B25, B26, C25, C26
(+5V Logic Power Supply to Digital Interface Board )
Reserved, power A29, B29, C29
Reserved, power A32, B32, C32
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The ADC12181 Evaluation Board is intended for product evaluation purposes only and is not intended for resale to end
consumers, is not authorized for such use and is not designed for compliance with European EMC Directive 89/336/EEC.
W aveVision™ is a trademark of National Semiconductor Corporation. National does not assume any responsibility for use of
any circuitry or software supplied or described. No circuit patent licenses are implied.
LIFE SUPPORT POLICY
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
f ailure to per for m, when pr operly us ed in ac cor danc e
with instructions for use provided in the labeling, can
be reas on ab ly exp ected to resul t i n a sig ni fi cant in ju ry
to the user.
2. A critical component is any component in a life
support device or sy stem whose failure to perform can
be r eas onab ly expec t ed t o c au s e th e f ai lu r e of th e l if e
support device or system, or to affect its safety or
effectiveness.
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Tel: 1-800-272-9959
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m
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Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
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National does not assume any responsibility for any circuitry described, no circuit patent licenses are implied and National reserves the right
at any time without notice to change said circuitry and specifications.
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