HCTS85MS Radiation Hardened 4-Bit Magnitude Comparator September 1995 Features * * * * * * * * * * * * * Pinouts 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) -Standard Outputs: 10 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility -VIL = 0.8V Max -VIH = VCC/2 Min Input Current Levels Ii 5A at VOL, VOH 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW 16 VCC B3 1 (A<B)IN 2 15 A3 (A=B)IN 3 14 B2 (A>B)IN 4 13 A2 (A<B)OUT 5 12 A1 (A=B)OUT 6 11 B1 (A>B)OUT 7 10 A0 GND 8 9 B0 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C TOP VIEW Description The Intersil HCTS85MS is a Radiation Hardened 4-bit high speed magnitude comparator. This device compares two binary, BCD, or other monotonic codes and presents the three possible magnitude results at the outputs (A>B, A<B, and A=B). The 4-bit input words are weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits. The HCTS85MS is expandable without external gating, both serial and parallel operation. B3 1 16 VCC (A<B)IN 2 15 A3 (A=B)IN 3 14 B2 (A>B)IN 4 13 A2 (A<B)OUT 5 12 A1 (A=B)OUT 6 11 B1 (A>B)OUT 7 10 A0 GND 8 9 B0 The HCTS85MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family with TTL input compatibility. The HCTS85MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE HCTS85DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP HCTS85KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack HCTS85D/Sample +25oC Sample 16 Lead SBDIP HCTS85K/Sample +25oC Sample 16 Lead Ceramic Flatpack HCTS85HMSR +25oC Die Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 1 Spec Number File Number 518624 3059.1 HCTS85MS Functional Block Diagram B3 1 B3 B3 A2 B2 A3 A3 B3 15 A3 A3 A1 B1 B2 7 14 B2 B2 (A<B) OUT 13 A2 A2 A2 B1 11 B1 B1 12 A1 6 A1 A1 4 (A>B) IN B0 B0 A0 B0 B0 9 B0 (A=B) OUT A0 10 A0 A0 A0 3 (A=B) IN 5 2 (A<B) IN A1 B1 (A>B) OUT A3 B3 A2 B2 TRUTH TABLE CASCADING INPUTS COMPARING INPUTS OUTPUTS A3, B3 A2, B2 A1, B1 A0, B0 A>B A<B A=B A>B A<B A=B A3>B3 X X X X X X H L L A3<B3 X X X X X X L H L A3=B3 A2>B2 X X X X X H L L A3=B3 A2<B2 X X X X X L H L A3=B3 A2=B2 A1>B1 X X X X H L L A3=B3 A2=B2 A1<B1 X X X X L H L A3=B3 A2=B2 A1=B1 A0>B0 X X X H L L A3=B3 A2=B2 A1=B1 A0<B0 X X X L H L A3=B3 A2=B2 A1=B1 A0=B0 H L L H L L A3=B3 A2=B2 A1=B1 A0=B0 L H L L H L A3=B3 A2=B2 A1=B1 A0=B0 L L H L L H A3=B3 A2=B2 A1=B1 A0=B0 X X H L L H A3=B3 A2=B2 A1=B1 A0=B0 H H L L L L A3=B3 A2=B2 A1=B1 A0=B0 L L L H H L Single Device OR Series Cascading Parallel Cascading NOTE: L = Logic Level Low, H = Logic Level High, x = Immaterial Spec Number 2 518624 Specifications HCTS85MS Absolute Maximum Ratings Reliability Information Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation. Operating Conditions Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . 500ns Max. Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Quiescent Current Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Noise Immunity Functional Test GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 40 A 2, 3 +125oC, -55oC - 750 A 1 +25oC 4.8 - mA 2, 3 +125oC, -55oC 4.0 - mA 1 +25oC -4.8 - mA 2, 3 +125oC, -55oC -4.0 - mA VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIN = VCC or GND 1 +25oC - 0.5 A 2, 3 +125oC, -55oC - 5.0 A 7, 8A, 8B +25oC, +125oC, -55oC - - - (NOTE 1) CONDITIONS SYMBOL ICC IOL IOH VOL VOH IIN FN VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V VCC = 4.5V, VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 2) LIMITS NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0". Spec Number 3 518624 Specifications HCTS85MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER An to (A>B)OUT Bn to (A>B)OUT An, Bn to (A<B)OUT An, Bn to (A=B)OUT An, Bn to (A>B)OUT (A>B)IN to (A>B)OUT (A=B)IN to (A=B)OUT (A<B)IN to (A<B)OUT (NOTES 1, 2) CONDITIONS SYMBOL TPHL, TPLH TPHL, TPLH TPHL, TPLH TPHL, TPLH TPHL, TPLH TPHL, TPLH TPHL, TPLH TPHL, TPLH GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 9 +25oC 2 36 ns 10, 11 +125oC, -55oC 2 43 ns 9 +25oC 2 57 ns 10, 11 +125oC, -55oC 2 66 ns 9 +25oC 2 45 ns 10, 11 +125oC, -55oC 2 51 ns 9 +25oC 2 42 ns 10, 11 +125oC, -55oC 2 50 ns 9 +25oC 2 29 ns 10, 11 +125oC, -55oC 2 35 ns 9 +25oC 2 34 ns 10, 11 +125oC, -55oC 2 39 ns 9 +25oC 2 28 ns 10, 11 +125oC, -55oC 2 37 ns 9 +25oC 2 35 ns 10, 11 +125oC, -55oC 2 40 ns VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V LIMITS NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation Input Capacitance SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES TEMPERATURE MIN MAX UNITS 1 +25oC - 39 pF - 92 pF - 10 pF - 10 pF - 15 ns - 22 ns 1 CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time TTHL, TTLH VCC = 4.5V 1 1 +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Spec Number 4 518624 Specifications HCTS85MS TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER (NOTES 1, 2) CONDITIONS SYMBOL TEMPERATURE MIN MAX UNITS Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND +25oC - 0.750 mA Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V +25oC 4.0 - mA Output Current (Source) IOH VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V +25oC -4.0 - mA Output Voltage Low VOL VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOL = 50A +25oC - 0.1 V Output Voltage High VOH VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOH = -50A +25oC VCC -0.1 - V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC - 5 A Noise Immunity Functional Test FN VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 3) +25oC - - - An to (A>B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 43 ns Bn to (A>B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 66 ns An, Bn to (A<B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 51 ns An, Bn to (A=B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 50 ns (A<B)IN to (A<B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 35 ns (A>B)IN to (A>B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 40 ns (A=B)IN to (A=B)OUT TPHL, TPLH VCC = 4.5V +25oC 2 37 ns NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0". TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP DELTA LIMIT ICC 5 12A IOL/IOH 5 -15% of 0 Hour PARAMETER Spec Number 5 518624 Specifications HCTS85MS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS METHOD GROUP A SUBGROUPS Initial Test (Preburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test I (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test II (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H PDA 100%/5004 1, 7, 9, Deltas Interim Test III (Postburn-In) 100%/5004 1, 7, 9 PDA 100%/5004 1, 7, 9, Deltas Final Test 100%/5004 2, 3, 8A, 8B, 10, 11 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample/5005 1, 7, 9 Sample/5005 1, 7, 9 Group A (Note 1) Group B Group D READ AND RECORD Subgroups 1, 2, 3, 9, 10, 11, (Note 2) NOTES: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised. 2. Table 5 parameters only. TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS READ AND RECORD METHOD PRE RAD POST RAD PRE RAD POST RAD 5005 1, 7, 9 Table 4 1, 9 Table 4 (Note 1) Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz - 16 - - - 1 - 4, 9 - 16 - - 5, 6, 7 2, 3, 4, 16 12, 15 9, 14 STATIC BURN-IN I TEST CONNECTIONS (Note 1) 5, 6, 7 1 - 4, 8 - 15 STATIC BURN-IN II TEST CONNECTIONS (Note 1) 5, 6, 7 8 DYNAMIC BURN-IN TEST CONDITIONS (Note 2) - 1, 8, 10, 11, 13 NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% for static burn-in. 2. Each pin except VCC and GND will have a resistor of 1K 5% for dynamic burn-in. TABLE 9. IRRADIATION TEST CONNECTIONS OPEN GROUND VCC = 5V 0.5V 5, 6, 7, 8 1 - 4, 9 - 16 NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Spec Number 6 518624 HCTS85MS Intersil Space Level Product Flow - `MS' Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) 100% Interim Electrical Test 1 (T1) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Nondestructive Bond Pull, Method 2023 100% Interim Electrical Test 2 (T2) Sample - Wire Bond Pull Monitor, Method 2011 100% Delta Calculation (T0-T2) Sample - Die Shear Monitor, Method 2019 or 2027 100% PDA 1, Method 5004 (Notes 1and 2) 100% Internal Visual Inspection, Method 2010, Condition A 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Delta Calculation (T0-T1) 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Interim Electrical Test 3 (T3) 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% PIND, Method 2020, Condition A 100% Final Electrical Test 100% External Visual 100% Fine/Gross Leak, Method 1014 100% Serialization 100% Radiographic, Method 2012 (Note 3) 100% Initial Electrical Test (T0) 100% External Visual, Method 2009 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5) NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. Spec Number 7 518624 HCTS85MS AC Timing Diagrams AC Load Circuit DUT VIH TEST POINT INPUT VS CL VIL RL TPLH TPHL VOH CL = 50pF VS OUTPUT RL = 500 VOL VOH TTLH TTHL 80% VOL 20% 80% 20% OUTPUT AC VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VIL 0 V GND 0 V Spec Number 8 518624 HCTS85MS Die Characteristics DIE DIMENSIONS: 100 x 100 mils METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils Metallization Mask Layout HCTS85MS (A<B)IN (2) B3 (1) VCC (16) A3 (15) (A=B)IN(3) (14) B2 (A>B)IN(4) (13) A2 (A<B)OUT(5) (12) A1 (A=B)OUT(6) (11) B1 (7) (A>B)OUT (8) GND (9) B0 (10) A0 Spec Number 9 518624 HCTS85MS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 Spec Number 10