ASAHI KASEI [AKD4220-A] AKD4220-A AK4220 Evaluation Board Rev.0 GENERAL DESCRIPTION AKD4220-A is an evaluation board for AK4220 that has various 7:3 audio and 6:3 video switches. This board can achieve the interface with AV systems via RCA connectors. Ordering guide AKD4220-A --- AK4220 Evaluation Board 10-wire flat cable for connection with printer port of PC (IBM-AT compatible machine), control software for AK4220, driver for control software on Windows 2000/XP are packed with this. Control software does not work on Windows NT Windows 2000/XP needs an installation of driver. Windows 95/98/ME does not need an installation of driver. FUNCTION * RCA connectors for analog audio: 7 inputs 3 outputs * RCA connectors for video: 6 inputs, 3 outputs * 10-pin header for I2C/4-wire serial control AVDD VVDD1 +12V D5V 5V REG 3.3V DVDD D3.3V REG DVDD VVDD2 VVDD1 LIN+1 GND1 RIN+1 LIN+2 GND2 RIN+2 LIN+3 GND3 RIN+3 LIN+4 GND4 RIN+4 LIN+5 GND5 RIN+5 LIN+6 GND6 RIN+6 LIN+7 GND7 RIN+7 AVDD Digital Logic Output circuits LOUT1 ROUT1 LOUT2 ROUT2 LOUT3 ROUT3 VOUT1 VOUT2 VOUT3 Input circuits AK4220 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 Figure 1. AKD4220-A Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual. 2006/06 -1- ASAHI KASEI [AKD4220-A] EVALUATION BOARD MANUAL Operation sequence 1) Set up power supply lines. Name of jack +12V Color of jack Green Voltage AVDD Red +5V VVDD1 Bule +5V D5V Red +5V DVDD Orange +3.3V D3.3V Orange +3.3V AGND VVSS DGND Black Black Black 0V 0V 0V +12V Used for Open / connect Regulator (T1) Should be always connected when power supply lines are supplied from regulator of T1. In this case "JP9 (REG)" is set to short. AVDD of AK4220 Should be always connected when AVDD is not supplied from regulator of T1. In this case "JP9 (REG)" is set to open. VVDD1 of AK4220 Should be always connected when AVDD is not supplied from regulator of T1. In this case "JP10 (VVDD1)" is set to open. Regulator (T2) Should be always connected when JP2(DVDD_SEL) is set to DVDD side. Can be open when JP2(DVDD_SEL) is set to REG side. DVDD of AK4220 Should be always connected when DVDD is not supplied from regulator of T1 and T2. In this case "JP15 (DVDD)" is set to open. Digital Logic Should be always connected when D3.3V is not supplied from regulator of T1 and T2. In this case "JP13 (D3.3V)" is set to open. Analog Ground Should be always connected. Analog Ground Should be always connected. Digital Ground Should be always connected, when JP1 (GND) is set to open. Table 1. Set up the power supply lines Default Setting +12V Open Open Open Open Open 0V 0V 0V (Note) Each supply line should be distributed from the power supply unit. 2) Set-up jumper pins and DIP switches. (See the followings.) 3) Power on. AK4220 should be reset once bringing SW2 (PDN) to "L" upon power-up. 2006/06 -2- ASAHI KASEI [AKD4220-A] Set up jumper pins 1. JP1 (GND) OPEN SHORT : Analog ground and Digital ground : Separated. : Common. (The connector "DGND" can be open.) 2. JP9 (REG) OPEN SHORT : AVDD, VVDD1 of the AK4220, and regulator of T2 (TA48M033F) : AVDD is supplied from "AVDD " jack. ("+12V" jack should be open) : AVDD is supplied from regulator of T1 (NJM78M05FA). < Default > 3. JP16 (AVDD) OPEN SHORT : AVDD of the AK4220 : AVDD is supplied from "AVDD " jack. : AVDD is supplied from regulator of T1 (NJM78M05FA). ("AVDD" jack should be open) < Default > 4. JP10 (VVDD1) OPEN SHORT : VVDD1 of the AK4220 : VVDD1 is supplied from "VVDD1 " jack. : VVDD1 is supplied from regulator of T1 (NJM78M05FA). ("VVDD1" jack should be open) < Default > 5. JP11 (D-A) OPEN SHORT : Regulator of T2 (TA48M033F) : Regulator of T2 (TA48M033F) is supplied from "D5V " jack. : Regulator of T2 (TA48M033F) is supplied from regulator of T1 (NJM78M05FA). ("D5V" jack should be open) < Default > 6. JP15 (DVDD) OPEN SHORT : DVDD of the AK4220 : DVDD is supplied from "DVDD " jack. : DVDD is supplied from regulator of Regulator of T2 (TA48M033F). ("DVDD" jack should be open) < Default > 7. JP13 (D3.3V) OPEN SHORT : Power of digital logic : D3.3V is supplied from "D3.3V " jack. : D3.3V is supplied from regulator of Regulator of T2 (TA48M033F). ("D3.3V" jack should be open) < Default > 8. JP12 (VVDD2) : Should be open. 2006/06 -3- ASAHI KASEI [AKD4220-A] Set up DIP switches SW1 Setting for I2C of AK4220 Pin No. Pin Name ON ("H","1") / OFF ("L","0") 1 I2C Control mode Select 2 CAD1 Chip Address Select (Note1) 3 CAD0 Chip Address Select (Note1) Table 2. SW1 Setting for I2C of AK4220 Default ON ("H", "1") OFF ("L", "0") OFF ("L", "0") (Note1) Chip Address is selected by CAD1, CAD0 pin (CAD10="00","01","10","11") The function of the toggle SW [SW2] (PDN): Resets the AK4220. Keep "H" during normal operation. Indication for LED [LE1] (INT): Monitor INT0 pin of the AK4220. LED turns on when channel dependent audio input detect circuit and video signal detect circuit of the AK4220. [LE2 6] (Q0 4): Monitor Q0 4 pin of the AK4220. 2006/06 -4- ASAHI KASEI [AKD4220-A] Serial Control The AK4220 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect printer port (parallel port) of PC and PORT2 (CTRL) of AKD4220-A by 10-wire flat cable (packed with AKD4220-A). Take care of the direction of 10-pin connector and 10-pin header. The control software packed with this evaluation board supports 4-wire serial control only. PORT2 CTRL 1 10 CSN Connect CCLK/SCL CDTI/SDA CDTO/SDA PC Red 5 6 10-pin header 10-wire 10-pin flat cable connector AKD4220-A Figure 2. 10-wire flat cable, 10-pin connector, and 10-pin header (1) 4-wire Serial Control Mode The jumper pins should be set to the following. JP8 I2C (2) I2C-bus Control Mode The jumper pins should be set to the following. JP8 I2C 2006/06 -5- ASAHI KASEI [AKD4220-A] Input / Output circuit & Set-up jumper pin for Input / Output circuits (1) Audio Input Circuit GND1, LIN+1, RIN+1 GND7, LIN+7, RIN+7 Input circuits C18 0.47u R73 1 GND1 + 2 3 4 5 J1 GND1 R7 (short) (open) C21 0.47u R74 1 LIN+1 + 2 3 4 5 J4 LIN+1 R10 (short) (open) C24 0.47u R75 1 RIN+1 + 2 3 4 5 J7 RIN+1 R13 (short) (open) Figure 3. GND, LIN+, RIN+ Input circuit (2) Audio Output Circuit LOUT1/ROUT1 LOUT3/ROUT3 Output circuits R28 10u 300 + C39 LOUT1 J22 LOUT1 1 2 3 4 5 R94 22k R29 10u 300 + C40 ROUT1 R95 J23 ROUT1 1 2 3 4 5 22k Figure 4. LOUT/ROUT Output circuit 2006/06 -6- ASAHI KASEI [AKD4220-A] (3)Video Input Circuit VIN1 VIN6 Input circuits C64 2 3 4 5 J28 VIN1 R58 0.1u 1 VIN1 (short) R61 75 Figure 5. VIN Input circuit (4)Video Output Circuit VOUT1 VOUT3 Output circuits 1 VOUT1 1 2 3 4 5 SAG1-2 JP3 C45 + 2.2u VOUT1 75 0 1 VFB1 J34 R70 C70 + 100u SAG1-1 JP2 0 Figure 6. VOUT Output circuit (4-1) "DC Output" is output from J34, J35 and J36 connector. (SAGN bit = 1) JP3/JP5/JP7 SAG1-2/SAG2-2/SAG3-2 JP2/JP4/JP6 SAG1-1/SAG2-1/SAG3-1 1 1 0 0 (4-2) "SAG Trimming Circuit " is output from J34, J35 and J36 connector. (SAGN bit = 0) JP3/JP5/JP7 SAG1-2/SAG2-2/SAG3-2 JP2/JP4/JP6 SAG1-1/SAG2-1/SAG3-1 1 1 0 0 2006/06 -7- ASAHI KASEI [AKD4220-A] Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4220-A according to previous term. 2. Connect IBM-AT compatible PC with AKD4220-A by 10-line type flat cable (packed with AKD4220-A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AKD4220-A Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "akd4220-a.exe" to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button. Explanation of each buttons 1. [Port Reset]: 2. [Write default]: 3. [All Write]: 4. [Function1]: 5. [Function2]: 6. [Function3]: 7. [Function4]: 8. [Function5]: 9. [SAVE]: 10. [OPEN]: 11. [Write]: Set up the USB interface board (AKDUSBIF-A). Initialize the register of AK4220. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation. Indication of data Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet. 2006/06 -8- ASAHI KASEI [AKD4220-A] Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button. 2. [Function1 Dialog]: Dialog to write data by keyboard operation Address Box: Input registers address in 2 figures of hexadecimal. Data Box: Input registers data in 2 figures of hexadecimal. When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button. 3. [Function2 Dialog]: Dialog to evaluate ATT of VOL Control Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4220 by this interval. Step Box: Data changes by this step. Mode Select Box: With checking this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 Without checking this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button. 2006/06 -9- ASAHI KASEI [AKD4220-A] 4. [Save] and [Open] 4-1. [Save] Save the current register setting data. The extension of file name is "akr". (Operation flow) (1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is "akr". 4-2. [Open] The register setting data saved by [Save] is written to AK4220. The file type is the same as [Save]. (Operation flow) (1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button. 2006/06 - 10 - ASAHI KASEI [AKD4220-A] 5. [Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set "-1" to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the [Function3] window. The extension of file name is "aks". Figure 1. Window of [F3] 2006/06 - 11 - ASAHI KASEI [AKD4220-A] 6. [Function4 Dialog] The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the window as shown in Figure 2 opens. Figure 2. [F4] window 2006/06 - 12 - ASAHI KASEI [AKD4220-A] 6-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 3. Figure 3. [F4] window(2) (2) Click [START] button, then the sequence is executed. 6-2. [SAVE] and [OPEN] buttons on right side [SAVE]: The sequence file names can assign be saved. The file name is *.ak4. [OPEN]: The sequence file names assign that are saved in *.ak4 are loaded. 6-3. Note (1) [Function4] doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change. 2006/06 - 13 - ASAHI KASEI [AKD4220-A] 7. [Function5 Dialog] The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 4opens. Figure 4. [F5] window 7-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). (2) Click [WRITE] button, then the register setting is executed. 7-2. [SAVE] and [OPEN] buttons on right side [SAVE]: The register setting file names assign can be saved. The file name is *.ak5. [OPEN]: The register setting file names assign that are saved in *.ak5 are loaded. 7-3. Note (1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change. 2006/06 - 14 - ASAHI KASEI [AKD4220-A] MEASUREMENT RESULTS Audio [Measurement condition] * Measurement unit : Audio Precision System two Cascade * BW : 10Hz20kHz * Power Supply : AVDD=5V, VVDD1=5V, VVDD2=5V, DVDD=3V * Temperature : Room * Measurement signal line path: LIN+1/RIN+1 LOUT/ROUT Parameter S/(N+D) at 1Vrms Output DR S/N Input signal 1kHz, 0dBV 1kHz, -60dBV Off Measurement filter 20kLPF 22kLPF, A-weighted 22kLPF, A-weighted Results [dB] 93.2 / 93.1 96.2 / 96.2 96.2 / 96.1 Plots Figure 1-1. FFT (1kHz, 0dBV input) at 1Vrms output Figure 1-2. FFT (1kHz, -60dBV input) Figure 1-3. FFT (Noise floor) Figure 1-4. THD+N vs. Input Level (fin=1kHz) Figure 1-5. THD+N vs. fin (Input Level=0dBFS) Figure 1-6. Linearity (fin=1kHz) Figure 1-7. Frequency Response (Input Level=0dBV) Figure 1-8. Crosstalk (Input Level=0dBV) 2006/06 - 15 - ASAHI KASEI [AKD4220-A] Video [Measurement condition] * Signal Generator : Sony Tectonics TG2000 * Measurement unit : Sony Tectonics VM700T * Power Supply : AVDD=5V, VVDD1=5V, VVDD2=5V, DVDD=3V * Temperature : Room * Measurement signal line path: VIN1 VOUT1 Parameter S/N Crosstalk DG DP Measurement conditions Input = 0% flat field Filter = Uni-weighted, BW= 15kHz to 5MHz SAG = 1 Input = 100%red(ENCRC), Measured at VOUT Input = Modulated Lamp SAG = 1 Input = Modulated Lamp SAG = 1 Results 72.4 Unit dB -74.0 dB 0.22 % 0.91 deg. Plots Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz to 5MHz, uni weighted, SAG=1) Figure 2-2. Frequency Response (Input= Multi Burst, SAG=1) Figure 2-3 Crosstalk (Input= 100% red (VIN1), measured at VOUT1) Figure 2-4 Crosstalk (Input= 100% red (VIN2), measured at VOUT1) Figure 2-5 DG, DP (Input= Modulated Lamp, SAG=1) 2006/06 - 16 - ASAHI KASEI [AKD4220-A] Plots (Audio) AKM AK4220 FFT LIN1/RIN1-->LOUT1/ROUT1 input=0dBV 11/17/05 10:47:28 +0 -10 -20 -30 -40 -50 -60 -70 d B V -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-1. FFT (fin=1kHz Input Level=0dBV) AKM AK4220 FFT LIN1/RIN1-->LOUT1/ROUT1 input=-60dBV 11/17/05 10:55:52 +0 -10 -20 -30 -40 -50 -60 -70 d B V -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure-1-2. FFT (fin=1kHz Input Level=-60dBV) 2006/06 - 17 - ASAHI KASEI [AKD4220-A] AKM AK4220 FFT LIN1/RIN1-->LOUT1/ROUT1 Input=no signal 11/17/05 11:18:13 +0 -10 -20 -30 -40 -50 -60 -70 d B V -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-3. FFT (Noise Floor) AKM AK4220 LIN1/RIN1-->LOUT1/ROUT1 THD vs.Input Level fin=1kHz 11/17/05 11:05:06 -70 -72 -74 -76 -78 -80 -82 d B r -84 -86 A -88 -90 -92 -94 -96 -98 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBV Figure1-4. THD+N vs. Input level (fin=1kHz) 2006/06 - 18 - ASAHI KASEI [AKD4220-A] AKM AK4220 LIN1/RIN1-->LOUT1/ROUT1 THD vs.Input Frequency Input=0dB 11/17/05 11:13:51 -70 -72 -74 -76 -78 -80 -82 d B r -84 -86 A -88 -90 -92 -94 -96 -98 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-5. THD+N vs. Input Frequency (Input level=0dBV) AKM AK4220 LIN1/RIN1-->LOUT1/ROUT1 Linearity fin=1kHz 11/17/05 11:22:34 +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBV Figure1-6.Linearity (fin=1kHz) 2006/06 - 19 - ASAHI KASEI AKM [AKD4220-A] AK4220 LIN+1/RIN+1-->LINEOUT Frequency Response Input=0dBV 05/18/06 13:15:12 +1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d B r A +0.1 +0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz last.at2 Figure1-7. Frequency Response (Input level=0dBV) Figure1-8. Crosstalk (Input level=0dBV) 2006/06 - 20 - ASAHI KASEI [AKD4220-A] Plots(Video) Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz to 5MHz, uni weighted, SAG=1) Figure 2-2. Frequency Response (Input= Multi Burst, SAG=1) 2006/06 - 21 - ASAHI KASEI [AKD4220-A] Figure 2-4 Crosstalk (Input= 100% red (VIN1), measured at VOUT1) Figure 2-4 Crosstalk (Input= 100% red (VIN2), measured at VOUT1) 2006/06 - 22 - ASAHI KASEI [AKD4220-A] Figure 2-5 DG, DP (Input= Modulated Lamp, SAG=1) 2006/06 - 23 - ASAHI KASEI [AKD4220-A] Revision History Date (YY/MM/DD) 06/06/12 Manual Revision KM083400 Board Revision 0 Reason Contents First Edition IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. 2006/06 - 24 - 5 4 3 2 1 JP1 LIN+2 RIN+2 LIN+3 GND3 RIN+3 LIN+4 GND4 RIN+4 LIN+5 GND5 RIN+5 LIN+6 GND6 RIN+6 Digital Ground Analog Ground GND7 LIN+7 GND VVSS D D 50 49 49 LIN+2 50 RIN+2 51 51 GND3 52 52 53 RIN+3 LIN+3 53 54 54 GND4 56 55 55 LIN+4 56 57 57 RIN+4 LIN+5 RIN+5 GND5 58 59 58 59 60 61 60 GND6 LIN+6 61 62 62 63 GND7 RIN+6 LIN+7 1 RIN+7 GND2 48 48 GND2 2 2 PDN RIN+1 47 47 RIN+1 3 3 CAD1/CSN LIN+1 46 46 LIN+1 4 4 SCL/CCLK GND1 45 45 GND1 5 5 SDA/CDTI ROUT3 44 44 ROUT3 6 6 CAD0/CDTO LOUT3 43 43 LOUT3 INT 7 7 INT ROUT2 42 42 ROUT2 Q0 8 8 Q0 LOUT2 41 41 LOUT2 Q1 9 9 Q1 ROUT1 40 40 ROUT1 Q2 10 10 Q2 LOUT1 39 39 LOUT1 Q3 11 11 Q3 AVSS 38 Q4 12 12 Q4 VCOM 37 DVDD_IN 13 13 DVDD MUTET 36 R1 51 PDN R2 51 CSN/CAD1 R3 51 CCLK/SCL R4 51 CDTI/SDA R5 AK4220 38 2.2u C1 36 C8 + R6 12k 14 14 DVSS 15 15 VOUT1 16 16 R 35 AVDD 34 VIN6 33 C5 1u 35 C7 0.1u 10u 34 AVDD_IN 33 VIN6 100u B 0.1u VIN5 32 IICN 31 VIN4 30 30 31 32 VIN4 I2C VIN5 28 VIN3 29 27 VVDD1_IN + 26 10u VIN2 25 24 23 22 + 21 19 2.2u 20 18 17 C15 + VVSS1 C13 10u 100u CN3 0.1u C12 C14 + 29 C11 28 VIN3 VVDD1 27 VIN2 26 VVSS3 25 VIN1 24 VVSS2 23 22 VFB3 VOUT3 VVDD2 C10 21 20 TEST 64pin_1 17 + VOUT2 2.2u VFB2 VFB1 19 C9 18 0 0.1u 37 + 0 SAG1-2 1 JP3 C4 10u C6 SAG1-1 1 JP2 VOUT1 C3 C2 0.1u + + B C 51 + CDTO/CAD0 64pin_3 1 RIN+7 C 64 U1 CN1 63 64 CN2 64pin_4 0 1 C16 + C17 + 100u 2.2u 0 1 SAG2-1 SAG2-2 JP4 JP5 SAG3-1 SAG3-2 JP6 JP7 VOUT3 0 1 VOUT2 1 VIN1 A VVDD1_IN CN4 64pin_2 0 A Title Size Document Number AKD4220-A AK4220 A2 Date: 5 4 3 2 Sheet 1 Rev 0 1 of 6 5 4 3 C18 J1 GND1 1 (short) (open) 1 R8 GND2 (short) (open) 2 3 4 5 0.47u R79 1 GND3 + 2 3 4 5 GND1 C20 J3 GND3 0.47u + R7 1 C19 J2 GND2 R73 + 2 3 4 5 0.47u 2 R9 (short) (open) D D C21 J4 LIN+1 C22 1 (short) (open) 1 R11 0.47u 1 R12 R14 LIN+3 (short) (open) J9 RIN+3 R78 RIN+2 (short) (open) 2 3 4 5 0.47u R81 1 RIN+3 + + RIN+1 R80 C26 0.47u 1 + 2 3 4 5 (short) (open) (short) 2 3 4 5 0.47u C25 J8 RIN+2 R75 1 R13 LIN+2 (open) C24 J7 RIN+1 2 3 4 5 J6 LIN+3 R77 + 2 3 4 5 LIN+1 C23 0.47u + R10 J5 LIN+2 R74 + 2 3 4 5 0.47u R15 (short) (open) C29 C27 C J10 GND4 2 3 4 5 GND4 (short) (open) R85 1 R17 GND5 + R16 0.47u (short) (open) 2 3 4 5 0.47u R18 C R88 1 GND6 + 1 J12 GND6 C28 J11 GND5 R82 + 2 3 4 5 0.47u (short) (open) C32 C30 J13 LIN+4 LIN+4 (short) (open) R86 1 R20 LIN+5 + R19 2 3 4 5 0.47u (short) (open) 2 3 4 5 0.47u R89 1 LIN+6 + 1 J15 LIN+6 C31 J14 LIN+5 R83 + 2 3 4 5 0.47u R21 (short) (open) C35 C33 J16 RIN+4 RIN+4 (short) (open) R87 1 R23 RIN+5 + R22 2 3 4 5 0.47u (short) (open) 2 3 4 5 0.47u R90 1 RIN+6 + 1 J18 RIN+6 C34 J17 RIN+5 R84 + 2 3 4 5 0.47u R24 (short) (open) B B C36 J19 GND7 0.47u R25 C37 0.47u R26 LIN+7 (short) (open) C38 J21 RIN+7 0.47u R93 A 1 RIN+7 + 2 3 4 5 R92 1 + 2 3 4 5 GND7 (short) (open) J20 LIN+7 A R91 1 + 2 3 4 5 R27 (open) (short) Title Size A3 Date: 5 4 3 2 Document Number AKD4220-A Analog Input Circuit Tuesday, September 13, 2005Sheet 1 Rev 0 2 of 6 5 4 3 R28 C39 10u + 300 1 J22 LOUT1 1 LOUT1 2 2 3 4 5 D R94 D 22k R29 C40 10u + 300 J23 ROUT1 1 ROUT1 2 3 4 5 R95 22k R30 C41 10u + 300 J24 LOUT2 1 LOUT2 2 3 4 5 R96 22k C C R31 C42 10u + 300 J25 ROUT2 1 ROUT2 2 3 4 5 R97 22k R32 10u 300 + C43 J26 LOUT3 1 LOUT3 2 3 4 5 R98 22k B B R33 C44 10u + 300 J27 ROUT3 1 ROUT3 R99 2 3 4 5 22k A A Title Size A3 Date: 5 4 3 2 Document Number AKD4220-A Analog Output Circuit Tuesday, September 13, 2005Sheet 1 3 Rev 0 of 6 A B C D E R34 51 R35 51 D3.3V_IN E RP1 6 5 4 3 2 1 D3.3V_IN SW1 CAD0 CAD1 I2C 1 2 3 4 5 6 51 R37 51 R38 51 R39 10k I2C MODE R36 Q0 Q1 Q2 Q3 Q4 RP2 CAD0 CAD1 I2C_H 47k D3.3V_IN Q0 Q1 14 D U4A 1 2 I2C Q2 7 74HC04 INT E 51 LE1 R40 1 INT 3 2 1 PORT1 10 9 8 7 6 Q/INT D3.3V_IN U3A 14 2 7 74HCU04 U3B 14 3 4 7 74HCU04 U3C 14 5 6 7 74HCU04 U3D 14 9 8 7 74HCU04 U3E 14 11 10 7 74HCU04 U3F 14 13 12 7 74HCU04 1 2 3 4 5 Q3 Q4 D3.3V_IN 1k INT LE2 1k Q0 LE3 1k Q1 LE4 1k Q2 LE5 1k Q3 LE6 R41 D3.3V_IN R42 D D3.3V_IN R43 D3.3V_IN R44 D3.3V_IN R45 Q4 1k C46 0.1u C C U5 B 1 2 3 4 5 PORT2 10 9 8 7 6 CSN CCLK/SCI CDTI/SDA CDTO/SDA(ACK) 2 3 5 6 11 10 14 13 1A 1B 2A 2B 3A 3B 4A 4B 1 15 A/B G 1Y 4 CSN/CAD1 2Y 7 CCLK/SCL 3Y 9 4Y 12 VCC GND 16 8 D3.3V_IN U6A L 0.1u D3.3V_IN B 10k D3.3V_IN 74LVC157 U6B 14 3 4 7 74HC14 PDN H 51 SW2 C47 PDN 0.1u 2 R53 R52 D1 HSU119 14 1 2 7 74HC14 C58 CTRL R100 D3.3V_IN 2 470 470 470 1 R47 R49 R51 1 10k 10k 10k 3 R46 R48 R50 D3.3V_IN D3.3V_IN 3.9k 14 2 7 U7A 74LVC07 CAD1 1 I2C_H 10k R54 D3.3V_IN CDTI/SDA A A JP8 CAD0 CDTO/CAD0 I2C A Title B C D AKD4220-A Size A3 Document Number Date: Friday, May 19, 2006 Rev LOGIC 0 Sheet E 4 of 6 4 3 + DVDD VVDD1 VVDD2 AGND D5V D3.3V VVSS DGND T45_R T45_O T45_BL T45_BL T45_BK T45_R T45_O T45_BK T45_BK +12V VVDD1 R56 AVDD DVDD VVDD1 VVDD2 AGND D5V JP10 D5V D3.3V 1 1 47u 1 C51 0.1u 1 C50 AVDD T45_G 1 C49 0.1u +12V 1 REG 1 1 AVDD 47u IN 1 +C48 OUT GND 3 2 Short D JP9 AVDD_IN 1 +12V T1 NJM78M05FA JP16 R55 1 AVDD D 2 1 5 VVSS JP11 L1 VVDD1_IN +C52 VVDD1 T2 OUT C53 VVDD2 R57 D-A 10u TA48M033F 47u C54 47u 0.1u GND 5.1 IN + C55 + C56 (open) 0.1u JP12 VVDD2_IN short C +C57 VVDD2 C 47u JP13 D3.3V DVDD JP15 L3 D3.3V DVDD_IN L4 D3.3V_IN (short) DVDD + C59 47u (short) + C60 47u D3.3V_IN B B C62 C63 0.1u 0.1u 14 C61 0.1u U4B 3 4 3 U7B 14 4 7 74LVC07 5 U7C 14 6 7 74LVC07 9 U7D 14 8 7 74LVC07 11 U7E 14 10 7 74LVC07 14 7 74HC04 U6C U4C 5 6 5 14 7 74HC04 U6D U4D 9 8 9 14 7 74HC04 11 U4E 10 7 14 14 10 7 74HC14 U6F U4F 13 14 8 7 74HC14 U6E 11 74HC04 A 14 6 7 74HC14 12 7 74HC04 13 14 12 7 74HC14 13 A U7F 14 12 7 74LVC07 Title Size A3 Date: 5 4 3 2 Document Number AKD4220-A POWER SUPPLY Sheet 1 5 Rev 0 of 6 5 4 3 C64 J28 VIN1 D 2 3 4 5 R58 2 3 4 5 VIN1 (short) R61 75 2 3 4 5 0.1u 1 2 3 4 5 VIN4 (short) R67 75 C66 J30 VIN3 0.1u R59 1 VIN2 (short) R62 75 2 3 4 5 C68 J32 VIN5 C67 R64 1 C65 J29 VIN2 0.1u 1 J31 VIN4 2 1 VIN5 (short) R68 75 2 3 4 5 D 1 VIN3 (short) R63 75 C69 J33 VIN6 0.1u R65 0.1u R60 0.1u R66 1 VIN6 (short) R69 75 C C R70 75 R71 75 R72 75 VOUT3 2 3 4 5 J35 VOUT2 1 VOUT2 B J34 VOUT1 1 VOUT1 2 3 4 5 J36 VOUT3 1 2 3 4 5 B A A Title Size A3 Date: 5 4 3 2 Document Number AKD4220-A Video Block Input/Output Circuit Sheet 1 6 of Rev 0 6