ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
- 1 -
GENERAL DESCRIPTION
AKD4220-A is an eval uation board for AK4220 that has various 7:3 audio and 6:3 video switches. This
board can ach ieve the interface with AV systems via RCA connectors.
Ordering guide
AKD4220-A --- AK4220 Evaluation Board
10-wire flat cable for conne ction with printer port of PC (IBM-AT compatible
machine), control software for AK4220 , driver for control software on Windows
2000/XP are packed with this.
Control software does not work on Windows NT
Windows 2000/XP needs an installation of driver.
Windows 95/98/M E does not need an installation of driver.
FUNCTION
• RCA connectors for analog audio: 7 inputs 3 outputs
• RCA connectors for video: 6 inputs, 3 outputs
• 10-pin header for I2C/4-wire serial control
AK4220
GND1 LOUT1
ROUT1
LOUT2
AVDD
LIN+1
RIN+1
LIN+2
GND3
LIN+3
GND2 ROUT2
+12V
VVDD1
DVDD
RIN+2
GND6
LIN+7
RIN+6
GND7
LIN+4
RIN+3
RIN+4
GND5
LIN+5
GND4
RIN+5
LIN+6
RIN+7
VIN3
VIN4
VIN5
VIN6
VIN1
VIN2
LOUT3
ROUT3
VOUT1
VOUT2
VOUT3
REG 5V
Di gital Logi c
D3.3V
Input
circuits
Output
circuits
VVDD2
AVDD VVDD1 D5V REG
3.3V
DVDD
Figure 1. AKD4220-A Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
A
K4220 Evaluation Board Rev.0
A
KD4220-
A
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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EVAL UATION BOARD MANUAL
Operation sequence
1) Set up power supply lines.
Name of
jack Color
of jack Voltage Used for Open / connect Default
Setting
+12V Green +12V Regulator (T1)
Should be always connected when
power supply lines are supplied from
regulator of T1. In this case “JP9
(REG)” is set to sho r t.
+12V
AVDD Red +5V AVDD of AK4220 Should be always connected when
AVDD is not supplied from regulator
of T1. In this case “JP9 (REG)” is set to
open.
Open
VVDD1 Bule +5V VVDD1 of AK4220 Should be always connected when
AVDD is not supplied from regulator
of T1. In this case “JP10 (VVDD1)” is
set to open.
Open
D5V Red +5V Regulator (T2) Should be always connect ed when
JP2(DVDD_SEL) is set to DVDD side.
Can be open whe n JP2(DVDD_SEL) is
set to REG side.
Open
DVDD Orange +3.3V DVDD of AK4220 Should be always connected when
DVDD is not supplied from regulator
of T1 and T2. In this case “JP15
(DVDD)” is set to open.
Open
D3.3V Orange +3.3V Digital Logic Should be always connected when
D3.3V is not suppli ed from regul ator of
T1 and T2. In this ca se “JP13 (D3.3V)”
is set to open.
Open
AGND Black 0V Analog Ground Should be always connected. 0V
VVSS Black 0V Analog Ground Should be always connected. 0V
DGND Black 0V Digital Ground Should be always connected, when JP1
(GND) is set to open. 0V
Table 1. Set up the power supply lines
(Note) Each supply line should be dist ributed from the power supply unit.
2) Set-up jumper pins and DIP switches. (See the followings.)
3) Power on.
AK4220 should be reset once bringing SW2 (PDN) to “L” upon power-up.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Set up jumper pins
1. JP1 (GND) : Analog ground and Digital ground
OPEN : Separated.
SHORT : Common. (The connector “DGND” can be open.) <Default>
2. JP9 (REG) : AVDD, VVDD1 of the AK4220, and regulator of T2 (TA48M033F)
OPEN : AVDD is supplied from “AVDD ” jack. (“+12V” jack should be open)
SHORT : AVDD is supplied from regulator of T1 (NJM78M05FA). < Default >
3. JP16 (AVDD) : AVDD of the AK4220
OPEN : AVDD is supplied from “AVDD ” jack.
SHORT : AVDD is supplied from regulator of T1 (NJM78M05FA).
(“AVDD” jack should be open) < Default >
4. JP10 (VVDD1) : VVDD1 of the AK4220
OPEN : VVDD1 is supplied from “VVDD1 ” jack.
SHORT : VVDD1 is supplied from regulator of T1 (NJM78M05FA).
(“VVDD1” jack should be open) < Default >
5. JP11 (D-A) : Regulator of T2 (TA48M033F)
OPEN : Regulator of T2 (TA48M033F) is supplied from “D5V ” jack.
SHORT : Regulator of T2 (TA48M033F) is supplied from regulator of T1 (NJM78M05FA).
(“D5V” jack should be open) < Default >
6. JP15 (DVDD) : DVDD of the AK4220
OPEN : DVDD is supplied from “DVDD ” jack.
SHORT : DVDD is supplied from regulator of Regulator of T2 (TA48M033F).
(“DVDD” jack should be open) < Default >
7. JP13 (D3.3V) : Power of digital logic
OPEN : D3.3V is supplied from “D3.3V ” jack.
SHORT : D3.3V is supplied from regulator of Regulator of T2 (TA48M033F).
(“D3.3V” jack should be open) < Default >
8. JP12 (VVDD2) : Should be open.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Set up DIP switches
SW1 Setting for I2C of AK4220
Pin No. Pin Name ON (“H”,“1”) / OFF (“L”,“0”) Default
1 I2C Control mode Select ON (“H”, “1”)
2 CAD1 Chip Address Select (Note1) OFF (“L”, “0”)
3 CAD0 Chip Address Select (Note1) OFF (“L”, “0”)
Table 2. SW1 Setting for I2C of AK4220
(Note1) Chip Address is selected by CAD1, CAD0 pin (CAD10=”00”,”01”,”10”,”11”)
The function of the toggle SW
[SW2] (PDN): Resets the AK4220. Keep “H” during normal operation.
Indication for LED
[LE1] (INT): Monitor INT0 pin of the AK4220. LED turns on when channe l dependent audio input det ect
circuit and video signa l detect circuit of the AK4220.
[LE2 ∼ 6] (Q0 ∼ 4): Monitor Q0 ∼ 4 pin of the AK4220.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Serial Control
The AK4220 can be controlled via t he printer port (parallel port) of IBM-AT compatible PC. Connect printe r port
(parallel port) of PC and PORT2 (CTRL) of AKD4220-A by 10-wire flat cable (packed with AKD4220-A).
Take care of the direction of 10-pin connector and 10-pin header.
The control software pa cked with this evaluation board supports 4-wire serial control only .
Connect
CDTO/SDA
CCLK/SCL
CDTI/SDA
10-pin
header
10-pin
connector
10-wire
flat cable
PC
AKD4220-A
CSN
56
110
PORT2
CTRL
Red
Figure 2. 10-wire flat cable, 10-pin connector, and 10-pin header
(1) 4-wire Serial Control Mode
The jumper pins should be set to the following.
(2) I2C-bus Control Mode
The jumper pins should be set to the following. <Default>
JP8
I2C
JP8
I2C
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Input / Output circuit & Set-up jumper pin for Input / Output circuits
(1) Audio Input Circuit
GND1, LIN+1, RIN+1∼ GND7, LIN+7, RIN+7 Input circuits
12
3
4
5
J4
LIN+1
R10
(open)
LIN+1
12
3
4
5
J7
RIN+1
R13
(open)
RIN+1
R73
(short)
R74
(short)
R75
(short)
+
C18
0.47u
12
3
4
5
J1
GND1
+
C21
0.47u
R7
(open)
+
C24
0.47u
GND1
Figure 3. GND, LIN+, RIN+ Input circuit
(2) Audio Output Circuit
LOUT1/ROUT1 ∼ LOUT3/ROUT3 Output circuits
R28
300
+
C39
10u
1 2
3
4
5
J22
LOUT1
LOUT1
R29
300
+
C40
10u
1 2
3
4
5
J23
ROUT1
ROUT1
R94
22k
R95
22k
Figure 4. LOUT/ROUT Output circuit
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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(3)Video Input Circuit
VIN1 ∼ VIN6 Input circuit s
C64
0.1u
R58
(short)
R61
75
VIN1
12
3
4
5
J28
VIN1
Figure 5. VIN Input circuit
(4)Video Output Circuit
VOUT1 ∼ VOUT3 Output circuits
1 2
3
4
5
J34
VOUT1
VFB1
R70
75
VOUT1
+
C45
2.2u
+
C70
100u
JP2
SAG1-1
1
0
0
1
JP3
SAG1-2
Figure 6. VOUT Output circuit
(4-1) “DC Output” is output from J34, J35 and J36 connector. (SAGN bit = 1) <Default>
(4-2) “SAG Trimming Circuit ” is output from J34, J35 and J36 connector. (SAGN bit = 0)
JP2/JP4/JP6
SAG1-1/SAG2-1/SAG3-1
10
JP3/JP5/JP7
SAG1-2/SAG2-2/SAG3-2
10
JP2/JP4/JP6
SAG1-1/SAG2-1/SAG3-1
10
JP3/JP5/JP7
SAG1-2/SAG2-2/SAG3-2
10
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Control Software Manual
Set-up of evaluation board and control software
1. Set up the AKD4220-A according to previous term.
2. Connect IBM-AT compatible PC with AKD4220-A by 10-line ty pe flat cable (packed with AKD4220-A). Take care
of the direction of 10pin heade r. (Pl ease install the drive r in the CD-ROM when this control software is used on
Windows 2000/XP. Plea se refer “Install ation Manual of C ontrol Software Driver by AKM de vice control software” .
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AKD4220-A Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4220-a.exe” to set up the control program.
5. Then please evaluate according to the follows.
Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
Explanation of each buttons
1. [Port Reset]: Set up the USB interface board (AKDUSBIF-A).
2. [Write default]: Initialize the register of AK4220.
3. [All W r i te]: W rite all registe rs that is curr ently displaye d .
4. [Function1]: Dialog to write data by keyboard operation.
5. [Function2]: Dialog to write data by keyboard operation.
6. [Function3]: The sequence of register setting can be set and executed.
7. [Function4]: The sequence that is created on [Function3] can be assigned to buttons and executed.
8. [Function5]: The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
9. [SAVE]: Save the current register setting.
10. [OPEN]: Write the saved values to all register.
11. [Write]: Dialog to write data by mouse operation.
Indication of data
Input data is indica ted on t he regi ster m ap. R ed l ett er indicat es “H” or “1” and blue one indica tes “L” or “0”. B lank i s the
part that is not defined in the datasheet.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal .
Data Box: Input registers data in 2 figures of hexadecimal.
When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate ATT of VOL Control
Address Box: Input registers address in 2 figures of hexadecimal.
Start Data Box: Input starts data in 2 figures of hexadecimal.
End Data Box: Input end data in 2 figures of hexadecimal.
Interval Box: Data is written to AK4220 by this interval.
Step Box: Data changes by this step.
Mode Select B ox:
With checking this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
Without checking this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
When writing the input data to AK4220, click [OK] button. If not, click [Cancel] button.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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4. [Save] and [Open]
4-1. [Save]
Save the current regist er setting data. The extension of file name is “akr”.
(Operation flow)
(1) Click [Save] Button.
(2) Set the file name and push [Save] Button. The extension of file name is “akr”.
4-2. [Open]
The register setting data save d b y [Save] is written to AK4220. The file type is the same as [Sav e].
(Operation flow)
(1) Click [Open] Button.
(2) Select the file (*.akr) and Click [Open] Button.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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5. [Functio n3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [Start] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence resta rts from the paused step.
This sequence can be saved and opened by [Save] and [Open] button on the [Function3] window. The extension of file
name is “aks”.
Figure 1. Window of [F3]
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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6. [Functio n4 Dialog]
The sequence that is created on [Functi on3] can be assigned to buttons and executed. When [F4] button is clicked, the
window as shown in Figure 2 opens.
Figure 2. [F4] window
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks).
The sequence file name is di splayed as shown in Figure 3.
Figure 3. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The sequence file names can assign be saved. The file name is *.ak4.
[OPEN]: The sequence file names assign that are saved in *.ak4 are loaded.
6-3. Note
(1) [Function4] doesn't support the pause function of sequence function.
(2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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7. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When
[F5] button is clicked, the following window as shown in Figure 4opens.
Figure 4. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The register setti ng file names assign can be saved. The file name is *.ak5.
[OPEN]: The register set ting file names assign that are saved in *.ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to
reflect the change.
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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MEASUREMENT RESULTS
Audio
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade
• BW : 10Hz∼20kHz
• Power Supply : AVDD=5V, VVDD1=5V, VVDD2=5V, DVDD=3V
• Temperature : Room
• Measurement signal line path: LIN+1/RIN+1 → LOUT/ROUT
Parameter Input signal Measurement filter Results [dB]
S/(N+D) at 1Vrms Output 1kHz, 0dBV 20kLPF 93.2 / 93.1
DR 1kHz, -60dBV 22kLPF, A-weighted 96.2 / 96.2
S/N Off 22kLPF, A-weighted 96.2 / 96.1
Plots
Figure 1-1. FFT (1kHz, 0dBV input) at 1Vrms output
Figure 1-2. FFT (1kHz, -60dBV input)
Figure 1-3. FFT (Noise floor)
Figure 1-4. THD+N vs. Input Level (fin=1kHz)
Figure 1-5. THD+N vs. fin (Input Level=0dBFS)
Figure 1-6. Linearity (fin=1kHz)
Figure 1-7. Frequency Response (Input Level=0dBV)
Figure 1-8. Crosstalk (Input Level=0dBV)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Video
[Measurement condition]
• Signal Generator : Sony Tectonics TG2000
• Measurem ent unit : Sony Tectonics VM700T
• Power Supply : AVDD=5V, VVDD1=5V, VVDD2=5V, DVDD=3V
• Temperature : Room
• Measurement signal line path: VIN1 → VOUT1
Parameter Measurement conditions Results Unit
S/N Input = 0% flat field
Filter = Uni-weighted,
BW= 15kHz to 5MHz
SAG = 1
72.4 dB
Crosstalk Input = 100%red(ENCRC),
Measured at VOUT -74.0 dB
DG Input = Modulated Lamp
SAG = 1 0.22 %
DP Input = Modulated Lam p
SAG = 1 0.91 deg.
Plots
Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz to 5MHz, uni weighted, SAG=1)
Figure 2-2. Frequency Response (Input= Multi Burst, SAG=1)
Figure 2-3 Crosstalk (Input= 100% red (VIN1), measured at VOUT1)
Figure 2-4 Crosstalk (Input= 100% red (VIN2), measured at VOUT1)
Figure 2-5 DG, DP (Input= Modulated Lamp, SAG=1)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Plots (Audio)
AKM 11/ 17/05 10:47: 28AK4220 FFT LIN1/RIN1- ->LOUT1/ R OUT1 i nput= 0dBV
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
V
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure1-1. FFT (fin=1kHz Input Level=0dBV)
AKM 11/ 17/05 10:55: 52AK4220 FFT LIN1/RIN1-->LOUT1/ RO UT1 i npu t=- 60dB V
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
V
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure-1-2. FFT (fin=1kHz Input Level=-60dBV)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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AKM 11/ 17/05 11:18: 13AK4220 FFT LIN1/R IN1-->LOUT1/ROUT1 Input=no signal
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
V
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure1- 3. FFT (Noise Floor)
AKM 11/ 17/05 11:05: 06AK4220 LIN1/RIN1-->LOUT1/ROUT1 THD vs.Input Level
fin=1kHz
-100
-70
-98
-96
-94
-92
-90
-88
-86
-84
-82
-80
-78
-76
-74
-72
d
B
r
A
-120 +0-110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBV
Figure1-4. THD+N vs. Input level (fin=1kHz)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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AKM 11/ 17/05 11:13: 51AK4220 LIN1/RIN1-->LO UT1/ROUT1 THD vs.Input Frequency
Input=0dB
-100
-70
-98
-96
-94
-92
-90
-88
-86
-84
-82
-80
-78
-76
-74
-72
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure1-5. THD+N vs. Input Frequency (Input level=0dBV)
AKM 11/ 17/05 11:22: 34AK4220 LIN1/RIN1-->LOUT1/ RO UT1 Li nea rity fi n=1kHz
-120 +0-110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBV
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure1-6.Linearity (fin=1kHz)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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AKM 05/ 18/06 13:15:12AK4220 LIN +1/RIN+1- ->LINEOUT Fr equency Response In put = 0dBV
last.at2
-1
+1
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
+0
+0.1
+0.2
+0.3
+0.4
+0.5
+0.6
+0.7
+0.8
+0.9
d
B
r
A
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
Figure1-7. Frequency Response (Input level=0dBV)
Figure1-8. Cro sstalk (Input level=0dBV)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Plots(Video)
Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz to 5MHz, uni weighted, SAG=1)
Figure 2-2. Frequency Response (Input= Multi Burst, SAG=1)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Figure 2-4 Crosstalk (Input= 100% red (VIN1), measured at VOUT1)
Figure 2-4 Crosstalk (Input= 100% red (VIN2), measured at VOUT1)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Figure 2-5 DG, DP (Input= Modulated Lamp, SAG=1)
ASAHI KASEI [AKD4220-A]
<KM083400> 2006/06
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Revision History
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering any use or
application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor
concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application
or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs,
currency exchange, or strategic materials.
• AKM products are neither inten ded nor authorized for use as critical components in any safety, life support, or
other hazard related device or system, and AKM assumes no responsibility relating to any such use, except
with the express written consent of the Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing
it, and which must therefore meet very high standards of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise
places the pro duct with a third party to no tify that p arty in advance of the above content a nd conditions, and the
buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from
any and all claims arising from the use of said product in the absence of such notification.
Date
(YY/MM/DD) Manual
Revision Board
Revision Reason Contents
06/06/12 KM083400 0 First Edition
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AVDD_IN
GND2
PDN
VIN6
ROUT1
RIN+6
DVDD_IN
VVDD1_IN
CDTO/CAD0
LIN+7
LIN+6
LIN+5
LIN+4
LIN+3
LIN+2
GND7
GND6
GND5
GND4
GND3
RIN+5
RIN+4
RIN+3
RIN+2
CSN/CAD1
CCLK/SCL
CDTI/SDA
INT
Q0
Q1
Q2
Q3
Q4
RIN+7
VIN1
VIN2
VIN3
VIN4
VIN5
VVDD1_IN
LOUT1
GND1
RIN+1
LIN+1
LOUT2
LOUT3
ROUT2
ROUT3
I2C
VOUT1
VOUT2
VOUT3
Title
Size Document Number Rev
Date: Sheet of
AK4220
0
AKD4220-A
A2
16
Title
Size Document Number Rev
Date: Sheet of
AK4220
0
AKD4220-A
A2
16
Title
Size Document Number Rev
Date: Sheet of
AK4220
0
AKD4220-A
A2
16
Analog Ground Digital Ground
VVSS
00110011
0
0
1
1
+
C9
2.2u
+
C9
2.2u
R3 51R3 51
C10
0.1u
C10
0.1u
+
C8
100u
+
C8
100u
R2 51R2 51
+
C17
2.2u
+
C17
2.2u
JP6
SAG3-1
JP6
SAG3-1
+
C16
100u
+
C16
100u
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CN1
64pin_1
CN1
64pin_1
JP7
SAG3-2
JP7
SAG3-2
R5 51R5 51
C11
0.1u
C11
0.1u
+
C2
2.2u
+
C2
2.2u
C1
0.1u
C1
0.1u
+
C3
10u
+
C3
10u
+
C13
10u
+
C13
10u
R4 51R4 51
+
C5
1u
+
C5
1u
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
CN2
64pin_4
CN2
64pin_4
+
C7
10u
+
C7
10u
+
C15
2.2u
+
C15
2.2u
+
C12
10u
+
C12
10u
RIN+7
1
PDN
2
CAD1/CSN
3
SCL/CCLK
4
SDA/CDTI
5
CAD0/CDTO
6
INT
7
Q0
8
Q1
9
Q2
10
Q3
11
Q4
12
DVDD
13
DVSS
14
VOUT1
15
VFB1
16
TEST
17
VOUT2
18
VFB2
19
VVDD2
20
VOUT3
21
VFB3
22
VVSS2
23
VIN1
24
VVSS3
25
VIN2
26
VVDD1
27
VIN3
28
VVSS1
29
VIN4
30
IICN
31
VIN5
32
VIN6 33
AVDD 34
R35
MUTET 36
VCOM 37
AVSS 38
LOUT1 39
ROUT1 40
LOUT2 41
ROUT2 42
LOUT3 43
ROUT3 44
GND1 45
LIN+1 46
RIN+1 47
GND2 48
LIN+2 49
RIN+2 50
GND3 51
LIN+3 52
RIN+3 53
GND4 54
LIN+4 55
RIN+4 56
GND5 57
LIN+5 58
RIN+5 59
GND6 60
LIN+6 61
RIN+6 62
GND7 63
LIN+7 64
U1
AK4220
U1
AK4220
JP4
SAG2-1
JP4
SAG2-1 JP5
SAG2-2
JP5
SAG2-2
R1 51R1 51
JP1
GND
JP1
GND
JP3
SAG1-2
JP3
SAG1-2
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
CN3
64pin_3
CN3
64pin_3
JP2
SAG1-1
JP2
SAG1-1 C6
0.1u
C6
0.1u
R6
12k
R6
12k
+
C14
100u
+
C14
100u
C4
0.1u
C4
0.1u
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
CN4
64pin_2
CN4
64pin_2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GND1
LIN+1
RIN+1
LIN+2
RIN+2
GND2
LIN+3
RIN+3
GND3
LIN+4
RIN+4
GND4
LIN+5
RIN+5
GND5
LIN+6
RIN+6
GND6
LIN+7
RIN+7
GND7
Title
Size Document Number Rev
Date: Sheet of
Analog Input Circuit
0
AKD4220-A
A3
26Tuesday, September 13, 2005
Title
Size Document Number Rev
Date: Sheet of
Analog Input Circuit
0
AKD4220-A
A3
26Tuesday, September 13, 2005
Title
Size Document Number Rev
Date: Sheet of
Analog Input Circuit
0
AKD4220-A
A3
26Tuesday, September 13, 2005
R15
(open)
R15
(open)
+
C26
0.47u
+
C26
0.47u
12
3
4
5
J12
GND6
J12
GND6
+
C37
0.47u
+
C37
0.47u
R20
(open)
R20
(open)
12
3
4
5
J15
LIN+6
J15
LIN+6
R87
(short)
R87
(short)
R74
(short)
R74
(short)
12
3
4
5
J21
RIN+7
J21
RIN+7
12
3
4
5
J14
LIN+5
J14
LIN+5
+
C36
0.47u
+
C36
0.47u
R79
(short)
R79
(short)
12
3
4
5
J11
GND5
J11
GND5
R19
(open)
R19
(open)
+
C23
0.47u
+
C23
0.47u R80
(short)
R80
(short)
+
C24
0.47u
+
C24
0.47u
R89
(short)
R89
(short)
12
3
4
5
J18
RIN+6
J18
RIN+6
12
3
4
5
J13
LIN+4
J13
LIN+4
R85
(short)
R85
(short)
R73
(short)
R73
(short)
+
C20
0.47u
+
C20
0.47u
R12
(open)
R12
(open)
R81
(short)
R81
(short)
12
3
4
5
J10
GND4
J10
GND4
+
C33
0.47u
+
C33
0.47u
+
C27
0.47u
+
C27
0.47u
+
C21
0.47u
+
C21
0.47u
12
3
4
5
J17
RIN+5
J17
RIN+5
R93
(short)
R93
(short)
R25
(open)
R25
(open)
12
3
4
5
J6
LIN+3
J6
LIN+3
R82
(short)
R82
(short)
+
C35
0.47u
+
C35
0.47u
+
C34
0.47u
+
C34
0.47u
12
3
4
5
J5
LIN+2
J5
LIN+2
+
C30
0.47u
+
C30
0.47u
12
3
4
5
J3
GND3
J3
GND3
12
3
4
5
J16
RIN+4
J16
RIN+4
R18
(open)
R18
(open)
R27
(open)
R27
(open)
R14
(open)
R14
(open)
+
C18
0.47u
+
C18
0.47u
+
C32
0.47u
+
C32
0.47u
+
C31
0.47u
+
C31
0.47u
+
C25
0.47u
+
C25
0.47u
12
3
4
5
J9
RIN+3
J9
RIN+3
R7
(open)
R7
(open)
R78
(short)
R78
(short)
R17
(open)
R17
(open)
12
3
4
5
J8
RIN+2
J8
RIN+2
R92
(short)
R92
(short)
R8
(open)
R8
(open)
12
3
4
5
J2
GND2
J2
GND2
12
3
4
5
J1
GND1
J1
GND1
+
C29
0.47u
+
C29
0.47u
+
C28
0.47u
+
C28
0.47u
R83
(short)
R83
(short)
R24
(open)
R24
(open)
R88
(short)
R88
(short)
R13
(open)
R13
(open)
R16
(open)
R16
(open)
+
C22
0.47u
+
C22
0.47u
R75
(short)
R75
(short)
R86
(short)
R86
(short)
R77
(short)
R77
(short)
12
3
4
5
J7
RIN+1
J7
RIN+1
R23
(open)
R23
(open)
(short)
(short)
R90
(short)
R90
(short)
R26
(open)
R26
(open)
R11
(open)
R11
(open)
R91
(short)
R91
(short)
+
C19
0.47u
+
C19
0.47u
R9
(open)
R9
(open)
R22
(open)
R22
(open)
R84
(short)
R84
(short)
R10
(open)
R10
(open)
+
C38
0.47u
+
C38
0.47u
12
3
4
5
J19
GND7
J19
GND7
12
3
4
5
J20
LIN+7
J20
LIN+7
R21
(open)
R21
(open)
12
3
4
5
J4
LIN+1
J4
LIN+1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOUT1
ROUT1
LOUT2
ROUT2
LOUT3
ROUT3
Title
Size Document Number Rev
Date: Sheet of
Analog Output Circuit
0
AKD4220-A
A3
36Tuesday, September 13, 2005
Title
Size Document Number Rev
Date: Sheet of
Analog Output Circuit
0
AKD4220-A
A3
36Tuesday, September 13, 2005
Title
Size Document Number Rev
Date: Sheet of
Analog Output Circuit
0
AKD4220-A
A3
36Tuesday, September 13, 2005
+
C40
10u
+
C40
10u
1 2
3
4
5
J26
LOUT3
J26
LOUT3
R28
300
R28
300
R99
22k
R99
22k
R97
22k
R97
22k
R95
22k
R95
22k
1 2
3
4
5
J23
ROUT1
J23
ROUT1
R31
300
R31
300
+
C42
10u
+
C42
10u
R33
300
R33
300
1 2
3
4
5
J22
LOUT1
J22
LOUT1
1 2
3
4
5
J25
ROUT2
J25
ROUT2
+
C44
10u
+
C44
10u
R30
300
R30
300
R98
22k
R98
22k
R96
22k
R96
22k
1 2
3
4
5
J27
ROUT3
J27
ROUT3
+
C41
10u
+
C41
10u
R32
300
R32
300
+
C39
10u
+
C39
10u
R29
300
R29
300
R94
22k
R94
22k
1 2
3
4
5
J24
LOUT2
J24
LOUT2
+
C43
10u
+
C43
10u
A
A
B
B
C
C
D
D
E
E
E E
D D
C C
B B
A A
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN D3.3V_IN
D3.3V_IN
D3.3V_IN
D3.3V_IN
CDTO/CAD0
CAD1
I2C_H
CAD0
PDN
INT
Q0
Q1
Q2
Q3
Q4
CSN/CAD1
CCLK/SCL
CDTI/SDA
D3.3V_IN
D3.3V_IN
D3.3V_IN
I2C_H
CAD1
CAD0
I2C
Title
Size Document Number Rev
Date: Sheet of
LOGIC
0
AKD4220-A
A3
46
Friday, May 19, 2006
Title
Size Document Number Rev
Date: Sheet of
LOGIC
0
AKD4220-A
A3
46
Friday, May 19, 2006
Title
Size Document Number Rev
Date: Sheet of
LOGIC
0
AKD4220-A
A3
46
Friday, May 19, 2006
LH
CCLK/SCI
CDTO/SDA(ACK)
CDTI/SDA
CSN
INTQ0
Q1
Q2
Q3
Q4
CAD0
CAD1
I2C
1
2
3
4
5
6
SW1
I2C MODE
SW1
I2C MODE
R50
10k
R50
10k
R51
470
R51
470
LE4
Q2
LE4
Q2
R43
1k
R43
1k
LE5
Q3
LE5
Q3
LE1
INT
LE1
INT
9 8
14
7
U3D
74HCU04
U3D
74HCU04
1
2
3
4
5 6
7
8
9
10
PORT1
Q/INT
PORT1
Q/INT
R44
1k
R44
1k
R40
1k
R40
1k
3 4
14
7
U6B
74HC14
U6B
74HC14
1 2
147
U4A
74HC04
U4A
74HC04
LE3
Q1
LE3
Q1
C58
0.1u
C58
0.1u
11 10
14
7
U3E
74HCU04
U3E
74HCU04
1 2
14
7
U3A
74HCU04
U3A
74HCU04
C46
0.1u
C46
0.1u
1A
21Y 4
1B
32A
52Y 7
2B
63A
11 3Y 9
3B
10 4A
14 4Y 12
4B
13
A/B
1G
15 VCC 16
GND 8
U5
74LVC157
U5
74LVC157
R42
1k
R42
1k
5 6
14
7
U3C
74HCU04
U3C
74HCU04
R48
10k
R48
10k
21
3
SW2
PDN
SW2
PDN
JP8
I2C
JP8
I2C
R35
51
R35
51
R34
51
R34
51
R54
10k
R54
10k
R53
51
R53
51
R36
51
R36
51
1 2
14
7
U6A
74HC14
U6A
74HC14
R46
10k
R46
10k
R37
51
R37
51
1 2
14
7
U7A 74LVC07
U7A 74LVC07
R38
51
R38
51
LE6
Q4
LE6
Q4
3
2
1
RP2
47k
RP2
47k
R39
51
R39
51
R45
1k
R45
1k
13 12
14
7
U3F
74HCU04
U3F
74HCU04
C47
0.1u
C47
0.1u
6
5
4
3
2
1
RP1
10k
RP1
10k
LE2
Q0
LE2
Q0
R49
470
R49
470
R41
1k
R41
1k
R47
470
R47
470
21
D1
HSU119
D1
HSU119
3 4
14
7
U3B
74HCU04
U3B
74HCU04
1
2
3
4
5 6
7
8
9
10
PORT2
CTRL
PORT2
CTRL
R52
10k
R52
10k
R100
3.9k
R100
3.9k
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+12V
DVDD
AVDD
VVDD1
VVDD2
D5V
D3.3V
+12V AVDD VVDD1DVDD D3.3VVVDD2 D5V
D3.3V_IN
AVDD_IN
DVDD_IN
VVDD1_IN
VVDD2_IN
D3.3V_IN
Title
Size Document Number Rev
Date: Sheet of
POWER SUPPLY
0
AKD4220-A
A3
56
Title
Size Document Number Rev
Date: Sheet of
POWER SUPPLY
0
AKD4220-A
A3
56
Title
Size Document Number Rev
Date: Sheet of
POWER SUPPLY
0
AKD4220-A
A3
56
AGND VVSS
C56
0.1u
C56
0.1u
R55
Short
R55
Short
L3
(short)
L3
(short)
C61
0.1u
C61
0.1u
+
C60
47u
+
C60
47u
9 8
14
7
U7D
74LVC07
U7D
74LVC07
1
VVDD1
T45_BL
VVDD1
T45_BL
R56
5.1
R56
5.1
+
C54
47u
+
C54
47u
C63
0.1u
C63
0.1u
11 10
147
U4E
74HC04
U4E
74HC04
C53
0.1u
C53
0.1u
JP15
DVDD
JP15
DVDD
JP9
REG
JP9
REG
+
C57
47u
+
C57
47u
+
C55
(open)
+
C55
(open)
1
DVDD
T45_O
DVDD
T45_O
JP16
AVDD
JP16
AVDD
5 6
147
U4C
74HC04
U4C
74HC04
11 10
14
7
U6E
74HC14
U6E
74HC14
5 6
14
7
U7C
74LVC07
U7C
74LVC07
1
AVDD
T45_R
AVDD
T45_R
1
VVDD2
T45_BL
VVDD2
T45_BL
OUT
3
GND
2
IN 1
T1
NJM78M05FA
T1
NJM78M05FA
1
DGND
T45_BK
DGND
T45_BK
+
C52
47u
+
C52
47u
3 4
14
7
U7B
74LVC07
U7B
74LVC07
1
D5V
T45_R
D5V
T45_R
+
C51
47u
+
C51
47u
JP11
D-A
JP11
D-A
1
AGND
T45_BK
AGND
T45_BK
9 8
14
7
U6D
74HC14
U6D
74HC14
C62
0.1u
C62
0.1u
1
D3.3V
T45_O
D3.3V
T45_O
JP10
VVDD1
JP10
VVDD1
13 12
147
U4F
74HC04
U4F
74HC04
INOUT
GND
T2
TA48M033FT2
TA48M033F
JP13
D3.3V
JP13
D3.3V
C50
0.1u
C50
0.1u
9 8
147
U4D
74HC04
U4D
74HC04
R57
short
R57
short
1
+12V
T45_G
+12V
T45_G
JP12
VVDD2
JP12
VVDD2
13 12
14
7
U7F
74LVC07
U7F
74LVC07
3 4
147
U4B
74HC04
U4B
74HC04
+
C48
47u
+
C48
47u
13 12
14
7
U6F
74HC14
U6F
74HC14
C49
0.1u
C49
0.1u
+
C59
47u
+
C59
47u
L1
10u
L1
10u
1
VVSS
T45_BK
VVSS
T45_BK
5 6
14
7
U6C
74HC14
U6C
74HC14
L4
(short)
L4
(short)
11 10
14
7
U7E
74LVC07
U7E
74LVC07
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VIN1 VIN2 VIN3
VIN4 VIN5 VIN6
VOUT1
VOUT2
VOUT3
Title
Size Document Number Rev
Date: Sheet of
Video Block Input/Output Circuit
0
AKD4220-A
A3
66
Title
Size Document Number Rev
Date: Sheet of
Video Block Input/Output Circuit
0
AKD4220-A
A3
66
Title
Size Document Number Rev
Date: Sheet of
Video Block Input/Output Circuit
0
AKD4220-A
A3
66
R58
(short)
R58
(short)
R72
75
R72
75
R59
(short)
R59
(short)
12
3
4
5
J28
VIN1
J28
VIN1 R60
(short)
R60
(short)
12
3
4
5
J33
VIN6
J33
VIN6
C67
0.1u
C67
0.1u R66
(short)
R66
(short)
C68
0.1u
C68
0.1u
R62
75
R62
75 R63
75
R63
75
R70
75
R70
75
R71
75
R71
75
1 2
3
4
5
J34
VOUT1
J34
VOUT1
R61
75
R61
75
1 2
3
4
5
J35
VOUT2
J35
VOUT2
R69
75
R69
75
12
3
4
5
J31
VIN4
J31
VIN4
1 2
3
4
5
J36
VOUT3
J36
VOUT3
12
3
4
5
J32
VIN5
J32
VIN5
R64
(short)
R64
(short)
C65
0.1u
C65
0.1u
C66
0.1u
C66
0.1u
R65
(short)
R65
(short)
C64
0.1u
C64
0.1u
R67
75
R67
75
C69
0.1u
C69
0.1u
R68
75
R68
75
12
3
4
5
J30
VIN3
J30
VIN3
12
3
4
5
J29
VIN2
J29
VIN2
