Hyp
e
Hyp
e
Mar
c
Ge
n
The
regu
l
up t
o
from
0.8V
swit
c
680
k
Hyp
e
V
OUT
)
redu
c
fore-
Loa
d
The
prot
e
und
e
pow
e
curr
e
prot
e
Data
Micr
e
Ty
p
e
r Speed Contro
e
rLight Load is
a
Micrel Inc. • 21
c
h 25, 2015
n
eral Des
c
MIC28513
i
l
ator with int
e
o
4A output
4.6V to 45V.
with a gu
a
c
hing freque
n
k
Hz. The MI
rLight Load
®
)
operation
c
ing the req
u
mentioned
a
d
architecture
MIC28513
o
e
ction und
e
e
rvoltage loc
k
e
r sag condi
t
e
nt, foldback
e
ction, and th
e
sheets and
s
e
l’s web site
a
p
ical Appl
l is a trademark
o
a
registered trad
e
80 Fortune Dri
v
c
ription
i
s a synchr
o
e
rnal power s
w
current from
The output
v
a
ranteed acc
n
cy can be p
r
C28513’s H
y
®
architectur
e
and ultra-fa
s
u
ired output
a
ttributes, th
e
provides ver
y
o
ffers a full
s
e
r fault c
o
k
out to ens
u
t
ions, interna
current limit,
e
rmal shutdo
w
s
upport doc
u
a
t: www.micr
e
i
cation
o
f Micrel, Inc.
e
mark of Micrel,
I
v
e • San Jose,
C
o
nous step-
d
w
itches capa
a wide inp
u
v
oltage is adj
u
uracy of ±1
%
r
ogrammed
f
y
per Speed
e
s allow for
s
t transient
r
capacitance
.
e
MIC28513
-
y
good light l
o
s
uite of feat
u
o
nditions.
T
u
re proper
o
l soft-start t
o
“hiccup” m
o
w
n.
u
mentation a
r
e
l.com.
I
nc.
C
A 95131 • USA
d
own switchi
ble of providi
u
t supply ran
u
stable down
%
. A const
a
f
rom 200kHz
Control™ a
high V
IN
(l
o
r
esponse w
h
In addition
-
1’s HyperLi
g
o
ad efficienc
y
u
res to ens
u
T
hese inclu
peration un
d
o
reduce inru
o
de short-cir
c
r
e available
4
• tel +1 (408) 9
4
ng
ng
ge
to
a
nt
to
nd
o
w
h
ile
to
g
ht
y
.
u
re
de
d
er
sh
c
uit
on
Feat
u
4.6
V
Up
t
Inte
g
Hyp
Co
n
Ena
Pro
g
sho
r
Buil
t
A
dj
u
Fix
e
Inte
r
The
Jun
c
A
ppl
Ind
u
Dist
Bas
Wal
Hig
h
4
5V 4A Sy
n
4
4-0800 • fax +
1
u
res
V
to 45V ope
r
t
o 4
A
output
c
g
rated high-
s
p
erLight Loa
n
trol (MIC285
a
ble input, po
w
g
rammable c
r
t circuit prot
e
t
-in 5V regul
a
u
stable 200k
H
e
d 5ms soft-s
t
rnal compen
s
rmally enhan
c
tion temper
a
l
ications
u
strial power
s
t
ributed suppl
e station po
w
l transformer
h
-voltage sin
g
50.0
60.0
70.0
80.0
90.0
100.0
0.0
1
EFFICIENCY (%)
MIC28
5
n
chronous
1
(408) 474-100
0
r
ating input v
o
c
urren
t
s
ide and low-
s
d
(MIC2851
13-2)
archite
c
w
er good (P
G
urrent limit a
n
e
ction
a
tor for single
H
z to 680kHz
t
ar
t
s
ation and th
e
ced 24-pin 3
m
a
ture range o
f
s
upplies
y regulation
w
er supplies
regulation
g
le board sys
1
0.1
OUTPUT CU
Efficiency (
V
vs. Output Curr
e
F
SW
= 3
0
5
13
Buck Re
g
0
http://www.
m
o
ltage supply
s
ide N-chann
e
3-1) and
H
c
ture
G
OOD) outpu
t
nd foldback
supply oper
a
switching fr
e
e
rmal shutdo
w
m
m × 4mm F
f
–40°C to +1
tems
11
0
RRENT (A)
V
IN =12V)
e
nt MIC28513-1
5.0V
3.3V
0
0kHz
g
ulator
m
icrel.com
Revision 1.2
e
l MOSFETs
H
yper Spee
d
t
hiccup” mod
e
a
tion
e
quency
w
n.
CQFN
25°C
0
d
e
Micr
e
Mar
c
Or
d
Par
t
MI
C
MI
C
Note:
1. F
C
Pin
e
l, Inc.
c
h 25, 2015
d
ering Inf
o
t
Numbe
r
C
28513-1YFL
C
28513-2YFL
C
QFN is a lead-
f
Configu
r
o
rmation
Archit
e
HyperLig
Hyper Spe
e
f
ree package. P
b
ation
e
cture
ht Load
2
e
d Control
2
b
-free lead finish
Pack
a
2
4-Pin 3mm ×
2
4-Pin 3mm ×
is Matte Tin.
24-Pin 3m
m
(
2
a
ge
(1)
4mm FCQFN
4mm FCQFN
m
× 4mm FCQ
F
Top View)
Junctio
F
N (FL)
o
n Temperatu
r
40°C to +125
°
40°C to +125
°
r
e Range
°
C
°
C
MIC2851
3
Revision 1.
2
Lead Finish
Pb-Free
Pb-Free
3
2
Micrel, Inc. MIC28513
March 25, 2015 3 Revision 1.2
Pin Description
Pin Number Pin Name Pin Function
1 DL
Low-side gate drive. Internal low-side power MOSFET gate connection. This pin must be left
unconnected or floating.
2 PGND
PGND is the return path for the low-side driver circuit. Connect to the source of low-side MOSFET
(PGND, Pin 10, 11, 22, 23, and 26) through a low impedance path.
3 DH
High-side gate drive. Internal high-side power MOSFET gate connection. This pin must be left
unconnected or floating.
4, 7, 8, 9, 25
(25 is ePad) PVIN
Power input voltage. The PVIN pins supply power to the internal power switch. Connect all PVIN
pins together and locally bypass with ceramic capacitors. The positive terminal of the input
capacitor should be placed as close as possible to the PVIN pins; the negative terminal of the
input capacitor should be placed as close as possible to the PGND pins 10,11, 22, 23, and 26.
5 LX
The LX pin is the return path for the high-side driver circuit. Connect the negative terminal of the
bootstrap capacitor directly to this pin. Also connect this pin to the SW pins 12, 21, and 27, with a
low impedance path. The controller monitors voltages on this pin and the PGND for zero current
detection.
6 BST
Bootstrap pin. This pin provides bootstrap supply for the high-side gate driver circuit. Connect a
0.1µF capacitor and an optional resistor in series from the LX (Pin 5) to the BST pin.
10, 11, 22,
23, 26
(26 is ePad)
PGND
Power ground. These pins are connected to the source of the low-side MOSFET. They are the
return path for the step-down regulator power stage and should be tied together. The negative
terminal of the input decoupling capacitor should be placed as close as possible to these pins.
12, 21, 27
(27 is ePad) SW Switch node. The SW pins are the internal power switch outputs. These pins should be tied
together and connected to the output inductor.
13 AGND
Analog ground. The analog ground for VDD and the control circuitry. The analog ground return
path should be separate from the power ground (PGND) return path.
14 FB
Feedback input. The FB pin sets the regulated output voltage relative to the internal reference.
This pin is connected to a resistor divider from the regulated output such that the FB pin is at 0.8V
when the output is at the desired voltage.
15 PGOOD
The power good output is an open drain output requiring an external pull-up resistor to external
bias. This pin is a high impedance open circuit when the voltage at FB pin is higher than 90% of
the feedback reference voltage (typically 0.8V).
16 EN
Enable input. The EN pin enables the regulator. When the pin is pulled below the threshold, the
regulator will shut-down to an ultra-low current state. A precise threshold voltage allows the pin to
operate as an accurate UVLO. Do not tie EN to VDD.
17 VIN
Supply voltage for the internal LDO. The VIN operating voltage range is from 4.6V to 45V. A
ceramic capacitor from VIN to AGND is required for decoupling. The decoupling capacitor should
be placed as close as possible to the supply pin.
18 ILIM
Currrent limit setting. Connect a resistor from this pin to the SW pin node to allow for accurate
current-limit-sense programming of the internal low-side power MOSFET.
19 VDD
Internal +5V linear regulator: VDD is the internal supply bus for the IC. Connect to an external
1µF bypass capacitor. When VIN is less than 5.5V, this regulator operates in drop-out mode.
Connect VDD to VIN.
20 PVDD
A 5V supply input for the low-side N-channel MOSFET driver circuit that can be tied to VDD
externally. A 1F ceramic capacitor from PVDD to PGND is recommended for decoupling.
24 FREQ
Switching frequency adjust pin. Connect this pin to VIN to operate at 600kHz. Place a resistor
divider network from VIN to the FREQ pin to program the switching frequency.
Micrel, Inc. MIC28513
March 25, 2015 4 Revision 1.2
Absolute Maximum Ratings(2)
PVIN, VIN to PGND ........................................ 0.3V to 50V
VDD, PVDD to PGND ................................ ……0.3V to 6V
VBST to VSW, VLX ........ …………………..…………0.3V to 6V
VBST to PGND .......................................... 0.3V to (VIN + 6V)
VSW, VLX to PGND ............................... 0.3V to (VIN + 0.3V)
VFREQ, VILIM, VEN to AGND .................... 0.3V to (VIN + 0.3V)
VLX, VFB, VPG, VFREQ, VILIM,
VEN to AGND ................................ 0.3V to (VDD + 0.3V)
PGND to AGND ………………......................0.3V to +0.3V
Junction Temperature (TJ) ....................................... +150C
Storage Temperature (TS) ......................... 65C to +150C
Lead Temperature (soldering, 10s) ............................ 300C
ESD HBM Rating(4) ...................................................... 1.5kV
ESD MM Rating(4) ......................................................... 150V
Operating Ratings(3)
Supply Voltage (PVIN, VIN) ............................. +4.6V to +45V
Enable Input (VEN) .................................................. 0V to VIN
VSW, VFEQ, VILIM, VEN ............................................... 0V to VIN
Junction Temperature (TJ) ........................ –40°C to +125°C
Junction Thermal Resistance
FQFN (JA) ......................................................... 30°C/W
Electrical Characteristics(5)
VIN = 12V; TA = 25°C, bold values indicate –40°C TA +125°C, unless noted.
Parameter Condition Min. Typ. Max. Units
Power Supply Input
Input Voltage Range (PVIN, VIN) 4.6 45
V
Quiescent Supply Current VFB = 1.5V (MIC28513-1) 0.4 0.75 mA
VFB = 1.5V (MIC28513-2) 0.7 1.5
Shutdown Supply Current SW = unconnected, VEN = 0V 0.1 10 µA
VDD Supply
VDD Output Voltage VIN =7V to 45V, IVDD = 10mA 4.8 5.2 5.4 V
VDD UVLO Threshold VVDD rising 3.8 4.2 4.6 V
VDD UVLO Hysteresis 400 mV
Load Regulation @ 40mA 0.6 2 4 %
Reference
Feedback Reference Voltage 25°C (±1%) 0.792 0.8 0.808 V
-40°C TJ 125°C (±2%) 0.784 0.8 0.816
FB Bias Current VFB = 0.8V 5 500 nA
Enable Control
EN Logic Level High 1.8
V
EN Logic Level Low
0.6 V
EN Hysteresis 200 mV
EN Bias Current VEN = 12V 5
40 µA
Notes:
2. Exceeding the absolute maximum ratings may damage the device.
3. The device is not guaranteed to function outside its operating ratings.
4. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5k in series with 100pF.
5. Specification for packaged product only.
Micrel, Inc. MIC28513
March 25, 2015 5 Revision 1.2
Electrical Characteristics(5) (Continued)
VIN = 12V; TA = 25°C, bold values indicate –40°C TA +125°C, unless noted.
Parameter Condition Min. Typ. Max. Units
Oscillator
Switching Frequency VFREQ = VIN 450 680 800 kHz
VFREQ = 50% VIN 340
Maximum Duty Cycle 85 %
Minimum Duty Cycle VFB > 0.8V 0 %
Minimum Off-Time 110 200 270 ns
Internal MOSFETs
High-Side NMOS On-Resistance 37 m
Low-Side NMOS On-Resistance 20 m
Short Circuit Protection
Current-Limit Threshold VFB = 0.79V –30 –14 0 mV
Short-Circuit Threshold VFB = 0V –24 –7 8 mV
Current-Limit Source Current VFB = 0.79V 50 70 90 µA
Short-Circuit Source Current VFB = 0V 25 36 43 µA
Leakage
SW, BST Leakage Current 50 µA
Power Good
Power Good Threshold Voltage Sweep VFB from low to high 85 90 95 %VOUT
Power Good Hysteresis Sweep VFB from high to low 6 %VOUT
Power Good Delay Time Sweep VFB from low to high 100 µs
Power Good Low Voltage VFB < 90% x VNOM, IPGOOD = 1mA 70 200 mV
Thermal Protection
Overtemperature Shutdown TJ rising 160 °C
Overtemperature Shutdown
Hysteresis 15 °C
Soft Start
Soft Start Time 5 ms
Micrel, Inc. MIC28513
March 25, 2015 6 Revision 1.2
Typical Characteristics
0
50
100
150
200
250
300
350
400
0.0 0.1 1.0 10.0
SWITCHING FREQUENCY (kHz)
OUTPUT CURRENT (A)
Switching Frequency vs.
Output Current MIC28513-1
V
IN
= 12V
V
OUT
= 5V
0.792
0.796
0.800
0.804
0.808
0.812
-50 -25 0 25 50 75 100 125
FEEBACK VOLTAGE (V)
TEMPERATURE (°C)
Feedback Voltage
vs. Temperature MIC28513-1
V
IN
= 12V
V
OUT
= 5.0V
I
OUT
= 0A
0.760
0.768
0.776
0.784
0.792
0.800
0.808
-50 -25 0 25 50 75 100 125
FEEBACK VOLTAGE (V)
TEMPERATURE (°C)
Feedback Voltage
vs. Temperature MIC28513-2
V
IN
= 12V
V
OUT
= 5.0V
I
OUT
= 0A
4.0
4.5
5.0
5.5
6.0
5 1015202530354045
VDD VOLTAGE (V)
INPUT VOLTAGE (V)
VDD Voltage vs. Input Voltage
V
OUT
= 5.0V
I
DD
= 10mA
I
DD
= 40mA
4.0
4.2
4.4
4.6
4.8
5.0
-50 -25 0 25 50 75 100 125
VDD THRESHOLD (V)
TEMPERATURE (°C)
VDD UVLO Threshold
vs. Temperature MIC28513-1
Rising
Falling
V
IN
=12V
I
OUT
= 0A
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
5 1015202530354045
OUTPUT VOLTAGE ERROR (%)
INPUT VOLTAGE (V)
Line Regulation Error
(V
OUT
vs. V
IN
)
V
OUT
= 5.0V
I
OUT
= 2A
F
SW
= 300kHz
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
5 1015202530354045
ENABLE THRESHOLD (V)
INPUT VOLTAGE (V)
Enable Threshold
vs. Input Voltage
FALLING
RISING
HYSTERESIS
0.0
0.4
0.8
1.2
1.6
2.0
5 1015202530354045
SUPPLY CURRENT (mA)
INPUT VOLTAGE (V)
VIN Operating Supply Current
vs. Input Voltage MIC28513-1
V
OUT
= 5V
I
OUT
= 0A
F
SW
= 300kHz
0
2
4
6
8
10
12
14
16
18
20
5 1015202530354045
SUPPLY CURRENT (mA)
INPUT VOLTAGE (V)
VIN Operating Supply Current
vs. Input Voltage MIC28513-2
V
OUT
= 5V
I
OUT
= 0A
F
SW
= 300kHz
Micrel, Inc. MIC28513
March 25, 2015 7 Revision 1.2
Typical Characteristics (Continued)
4.80
4.85
4.90
4.95
5.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
Output Voltage
vs. Output Current MIC28513-2
VIN = 12V
VOUT = 5.0V
FSW = 300kHz
100
150
200
250
300
350
400
450
500
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
SWITCHING FREQUENCY (kHz)
OUTPUT CURRENT (A)
Switching Frequency
vs. Output Current MIC28513-2
V
IN
= 12V
V
OUT
= 5V
0
2
4
6
8
10
12
-50 -25 0 25 50 75 100 125
CURRENT LIMIT (A)
TEMPERATURE (°C)
Output Peak Current Limit
vs. Temperature MIC28513-1
VIN =12V
VOUT = 5.0V
FSW = 300kHz
0
2
4
6
8
10
12
-50-25 0 255075100125
CURRENT LIMIT (A)
TEMPERATURE (°C)
Output Peak Current Limit
vs. Temperature MIC28513-2
VIN =12V
VOUT = 5.0V
FSW = 300kHz
50.0
60.0
70.0
80.0
90.0
100.0
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 12V)
vs. Output Current MIC28513-1
5.0V
3.3V
FSW = 300kHz
50
60
70
80
90
100
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 24V)
vs. Output Current MIC28513-1
5.0V
3.3V
FSW = 300kHz
50
60
70
80
90
100
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 36V)
vs. Output Current MIC28513-1
5.0V
3.3V
FSW = 300kHz
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
IC POWER DISSIPATION (W)
OUTPUT CURRENT (A)
IC Power Dissipation
vs. Output Current (V
IN
= 12V)
5.0V
3.3V
V
IN
=12V
f
SW
= 300kHz
0.0
0.5
1.0
1.5
2.0
2.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
IC POWER DISSIPATION (W)
OUTPUT CURRENT (A)
IC Power Dissipation
vs. Output Current (V
IN
= 24V)
5.0V
3.3V
V
IN
=24V
f
SW
= 300kHz
Micrel, Inc. MIC28513
March 25, 2015 8 Revision 1.2
Typical Characteristics (Continued)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
IC POWER DISSIPATION (W)
OUTPUT CURRENT (A)
IC Power Dissipation
vs. Output Current (V
IN
= 36V)
5.0V
3.3V
V
IN
= 36V
f
SW
= 300kHz
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
25 40 55 70 85 100
OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (°C)
12V Input Thermal Derating
5.0V
3.3V
V
IN
= 12V
f
SW
= 300kHz
T
JMAX
= 125°C
JA
= 30°C/W
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
25 40 55 70 85 100
OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (°C)
24V Input Thermal Derating
5.0V
3.3V
V
IN
= 24V
f
SW
= 300kHz
T
JMAX
= 125°C
JA
= 30°C/W
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
25 40 55 70 85 100
OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (°C)
36V Input Thermal Derating
5.0V
3.3V
V
IN
= 36V
f
SW
= 300kHz
T
JMAX
= 125°C
JA
= 30°C/W
10
20
30
40
50
60
70
80
90
100
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 12V)
vs. Output Current MIC28513-2
5.0V
3.3V
F
SW
= 300kHz
10
20
30
40
50
60
70
80
90
100
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 24V)
vs. Output Current MIC28513-2
5.0V
3.3V
F
SW
= 300kHz
10
20
30
40
50
60
70
80
90
100
0.01 0.1 1 10
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency (V
IN
= 36V)
vs. Output Current MIC28513-2
5.0V
3.3V
F
SW
= 300kHz
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Characteri
s
s
tics
9
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Characteri
s
s
tics (Co
n
n
tinued)
10
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Characteri
s
s
tics (Co
n
n
tinued)
11
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Characteri
s
s
tics (Co
n
n
tinued)
12
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Characteri
s
s
tics (Co
n
n
tinued)
13
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
e
l, Inc.
c
h 25, 2015
n
ctional Diagram
14
MIC2851
3
Revision 1.
2
3
2
Micr
e
Mar
c
Fu
n
The
regu
l
MO
S
volta
over
is su
outp
u
ada
p
cons
mod
e
oper
a
Ove
r
low-
s
softs
The
o
A
s i
volta
volta
refer
e
a l
o
feed
b
belo
w
cont
r
time
Esti
m
t
whe
r
inpu
t
end
turn
s
turn
s
leng
t
Whe
the
g
trigg
e
peri
o
the
m
(typ.
)
inste
the
MO
S
The
m
D
e
l, Inc.
c
h 25, 2015
n
ctional D
MIC28513 is
l
ator with
S
FETs suita
b
ge conversio
a wide input
itable for aut
o
u
t is adjusta
b
p
tive on-time
tant switchi
n
e
and reduc
e
a
tion mode
r
current prot
e
s
ide MOSFE
T
tart, enable,
U
o
ry of Opera
t
llustrated in
ge is sens
e
ge divider
R
e
nce voltage
o
w-gain tran
b
ack voltage
w
0.8V, the
n
r
ol logic and
period leng
t
m
ator” circuitr
y
ESTIMATE
D
(ON
t
r
e V
OUT
is th
e
t
voltage, an
d
of the ON-ti
m
s
off the high
s
on the lo
w
t
h depends u
p
n the feedba
g
m
amplifier
e
red and the
o
d determine
d
m
inimum O
F
)
, the MIC28
ad. t
OFF(min)
i
s
boost cap
a
S
FET.
m
aximum du
t
O
MAX
t1
D
escriptio
n
an adaptive
integrated
le for high-i
n
n application
voltage rang
o
motive and
b
le with an e
x
control sche
m
n
g frequency
e
d switching
f
to impro
v
e
ction is im
p
T
’s R
DS(ON)
. T
U
VLO, and t
h
t
ion
the
Functi
o
e
d by the f
e
R
1 and R2,
VREF at th
e
sconductanc
e
decreases
a
n
the error
c
generate an
t
h is predet
e
y
.
S
W
IN
OUT
)
D
fV
V
e
output volt
a
d
f
SW
is the
s
m
e period, t
h
-side MOSF
E
w
-side MOSF
p
on the feed
b
ck voltage d
e
is below 0.
8
OFF-time p
e
d
by the fee
d
F
F-time t
OFF(
m
513 control
l
s
required to
a
citor (C
BST
)
t
y cycle is ob
t
SW)MIN(
O
FF
f
n
on-time syn
c
high-side
a
n
put voltage
s
. It is desig
n
e, from 4.6V
industrial ap
p
x
ternal resisti
m
e is emplo
y
in continuo
u
f
requency in
v
e light lo
a
p
lemented b
y
he device fe
a
h
ermal shutd
o
o
nal Diagra
m
e
edback (FB
and compar
e
e
error comp
a
e
(g
m
) am
p
a
nd the amp
c
omparator
w
ON-time pe
r
e
rmined by t
W
a
ge, V
IN
is th
e
s
witching fre
q
h
e internal hi
E
T and the l
o
ET. The O
F
b
ack voltage
i
e
creases an
d
8
V, the ON-
t
e
riod ends. If
d
back voltag
e
m
in)
, which is
l
ogic will ap
p
maintain en
o
to drive
t
t
ained from:
c
hronous bu
c
a
nd low-sid
to low-outp
u
n
ed to operat
to 45V, whic
p
lications. Th
ve divider. A
ed to obtain
u
s conductio
discontinuou
a
d efficienc
y
y
sensing th
a
tures intern
a
o
wn.
m
, the outp
u
) pin via th
e
d to a 0.8
V
a
rator throug
p
lifier. If th
lifier output i
w
ill trigger th
r
iod. The O
N
he “Fixed t
O
Eq.
e
power stag
q
uency. At th
gh-side driv
e
o
w-side driv
e
F
F-time perio
i
n most case
s
d
the output
o
t
ime period i
the OFF-tim
e
is less tha
about 200n
p
ly the t
OFF(mi
o
ugh energy i
t
he high-sid
Eq.
15
c
k
e
u
t
e
h
e
n
a
n
s
y
.
e
a
l
u
t
e
V
h
e
s
e
N
-
O
N
1
e
e
e
r
e
r
d
s
.
o
f
s
e
n
s
n)
n
e
2
It is
n
time
c
The
cons
t
actu
a
vary
exter
n
lowe
r
Duri
n
chan
g
Figu
r
vers
u
0.8V
maxi
m
inter
n
Figu
r
To ill
state
Figu
r
stea
d
ampl
i
prop
o
curre
is pr
e
the
O
valle
y
V
FB
f
a
ON-ti
circui
not recomm
e
c
lose to t
OFF(
m
adaptive O
N
t
ant switchi
n
a
l ON-time
a
with the di
f
nal MOSFE
T
r
switching fr
e
n
g load tra
n
g
ed due to th
r
e 1 shows t
h
u
s the input
v
which is li
m
m
um output
n
al circuitry.
r
e 1. Allowabl
e
ustrate the
c
and load tra
n
r
e 2 shows t
h
d
y-state op
e
i
fier senses
o
rtional to th
e
nt ripple, to t
r
e
determined
b
O
FF-time is c
o
y
of the feed
b
a
lls below V
R
i
me period i
i
try.
e
nded to us
e
m
in)
during ste
a
N
-time cont
r
n
g frequenc
y
a
nd resultin
g
f
ferent rising
T
s. Also, the
e
quency in hi
g
n
sients, the
e varying O
F
h
e allowable
r
v
oltage. The
m
ited by th
e
voltage is 2
4
e
Output Volt
a
c
ontrol loop
o
n
sient scena
r
h
e MIC2851
3
e
ration. Duri
n
the feedbac
k
e
output volt
a
r
igger the O
N
b
y the t
ON
es
o
ntrolled by t
h
b
ack voltage
R
EF
, the OFF
i
s triggered
e
MIC28513
a
dy-state op
e
r
ol scheme
y
in the MI
C
g
switching
f
and falling
minimum t
O
g
h V
IN
to V
OU
T
switching
F
F-time.
r
ange of the
o
minimum ou
t
e
reference
4
V which is
l
a
ge Range vs
.
o
peration, bo
t
r
ios will be an
3
control loop
n
g steady-s
t
k
voltage ri
p
a
ge ripple an
d
N
-time period
.
timator. The
h
e feedback
v
ripple, whic
h
period ends
through the
MIC2851
3
Revision 1.
2
with an OF
F
e
ration.
results in
a
C
28513. Th
e
f
requency wi
times of th
e
N
results in
a
T
application
s
frequency i
o
utput voltag
e
t
put voltage i
voltage. Th
e
limited by th
e
.
Input Voltag
e
t
h the stead
y
alyzed.
timing durin
g
t
ate, the g
m
p
ple, which i
d
the induct
o
.
The ON-tim
e
termination
o
v
oltage. At th
e
h
occurs whe
n
and the ne
x
control logi
3
2
F
-
a
e
ll
e
a
s
.
s
e
s
e
e
e
y
-
g
m
s
o
r
e
o
f
e
n
x
t
c
Micr
e
Mar
c
Figu
r
load
sudd
than
an
O
mini
m
sinc
e
next
volta
duri
n
freq
u
curr
e
freq
u
volta
e
l, Inc.
c
h 25, 2015
Figure 2
.
r
e 3 shows t
h
transient.
T
en load incr
e
V
REF
. This
w
O
N-time peri
o
m
um OFF-ti
m
e
the feedba
c
ON-time per
i
ge. Therefo
r
n
g the load tr
a
u
ency once t
h
e
nt level. Wit
u
ency, the ou
t
ge deviation
Figure 3. M
.
MIC28513 C
o
h
e operation
T
he output
v
e
ase, which
w
ill cause the
o
d. At the en
d
m
e t
OFF(min)
is
c
k voltage is
i
od is trigger
e
r
e, the swit
c
a
nsient, but
r
h
e output ha
s
h the varyin
g
t
put recover
y
is small in MI
IC28513 Loa
d
o
ntrol Loop Ti
of the MIC2
8
v
oltage drop
s
causes the
V
error compa
r
d
of the ON-
t
generated t
o
still below V
e
d due to the
c
hing frequ
e
r
eturns to the
s
stabilized a
t
g
duty cycle
y
time is fast
a
C28513 con
v
Transient R
e
ming
8
513 during
s
due to th
V
FB
to be le
s
r
ator to trigg
e
t
ime period,
o
charge C
B
S
REF
. Then, th
low feedba
c
e
ncy chang
e
nominal fixe
t
the new loa
and switchin
a
nd the outp
u
v
erter.
e
sponse
16
a
e
s
s
e
r
a
S
T
e
c
k
e
s
d
d
g
u
t
Unlik
e
outp
u
outp
u
curre
enou
g
of eli
m
In or
feed
b
indu
c
the
reco
m
If a
feed
b
the
g
ESR
volta
g
nece
s
thes
e
oper
a
A
ppli
c
injec
t
Disc
o
In c
o
great
1 is
disc
o
indu
c
sho
w
opti
m
and
m
up
a
feed
b
The
moni
t
acro
s
V
FB
nega
t
dow
n
mod
e
Onc
e
both
and l
the o
caus
e
wak
e
curre
disc
o
trigg
e
possi
on.
disc
o
e true curren
u
t voltage ri
p
u
t voltage r
i
nt ripple if t
h
gh. The MI
C
m
inating the
n
r
der to meet
b
ack voltage
c
tor current ri
p
g
m
amplifie
m
mended fe
e
low-ESR o
u
b
ack voltage
r
g
m
amplifier
a
of the out
p
g
e ripple an
d
s
sarily in ph
a
e
cases, rippl
a
tion. Please
cation Infor
m
t
ion techniqu
e
o
ntinuous
M
o
ntinuous m
t
er than zero;
able to for
c
o
ntinuous m
o
c
tor current f
a
w
n in Figure
m
ized by shu
t
m
inimizing th
e
a
nd turns o
n
b
ack voltage
V
MIC28513-1
t
ors the indu
c
s
s the low-si
d
> 0.8V an
d
t
ive, then t
h
n
most of the
e
.
e
the MIC28
5
DH and DL
ow-side MO
S
o
utput capaci
t
e
s V
FB
to g
o
e
up into no
r
nts of m
o
ntinuous m
o
e
red before
t
i
ble glitches.
Figure 4
s
o
ntinuous mo
d
t-mode cont
r
p
ple to trigge
i
pple is pro
h
e ESR of th
e
C
28513 contr
o
n
eed for slop
e
stability re
q
ripple sho
u
pple and lar
g
r and the
e
dback voltag
u
tput capaci
t
r
ipple may b
e
a
nd the erro
p
ut capacito
r
d
the feedb
a
a
se with the
e injection is
refer to the
m
ation for m
o
e
.
M
ode (MIC28
5
ode, the in
d
however, at
c
e the indu
c
o
de. Disconti
n
f
alls to zero,
4. During th
i
t
ting down al
e
supply cur
r
n
the high-
s
V
FB
drops bel
has a zero
c
tor current
b
d
e MOSFET
d
the induc
t
h
e MIC2851
3
IC circuitry
a
513-1 goes
are low, wh
S
FETs. The
l
t
ors and V
OU
T
o
below V
RE
F
r
mal continu
o
ost circuit
s
o
de are rest
o
t
he drivers a
r
Finally, the
s
hows the
d
e.
r
ol, the MIC2
8
r an ON-tim
e
portional to
e
output cap
o
l loop has t
e
compensat
q
uirements, t
h
u
ld be in p
h
g
e enough to
error com
e ripple is 20
t
or is selec
t
e
too small to
o
r comparato
r
r
is very lo
w
a
ck voltage
r
inductor cu
r
required to
e
Ripple Injec
t
o
re details a
b
5
13-1 Only)
ductor curr
e
light loads t
h
c
tor current
t
n
uous mode
as indicate
d
i
s period, th
e
l the non-es
s
r
ent. The MI
C
s
ide MOSF
E
l
ow 0.8V.
crossing co
b
y sensing th
e
during its
O
t
or current
3
-1 automa
t
a
nd goes int
o
into discont
i
ich turns off
l
oad current
i
T
drops. If th
e
F
, then all t
h
o
us mode.
F
s
reduced
o
red, then
a
r
e turned on
high-side d
r
control lo
o
MIC2851
3
Revision 1.
2
8
513 uses th
e
e
period. Th
e
the induct
o
acitor is larg
e
he advantag
e
ion.
h
e MIC2851
3
h
ase with th
e
be sensed b
y
parator. Th
e
mV~100mV.
t
ed, then th
e
be sensed b
y
r
. Also, if th
e
w
, the outp
u
r
ipple are n
o
r
rent ripple. I
n
e
nsure prop
e
t
ion section i
n
b
out the rippl
e
e
nt is alway
h
e MIC2851
3
t
o operate i
n
is where th
e
d
by trace (I
L
e
efficiency i
s
s
ential circuit
C
28513 wake
E
T when th
e
mparator th
a
e
voltage dro
p
O
N-time. If th
e
goes slightl
y
t
ically power
o
a low-pow
e
i
nuous mod
e
the high-sid
e
i
s supplied b
y
e
drop of V
O
U
h
e circuits wi
F
irst, the bia
during th
e
a
t
ON
pulse i
to avoid an
y
r
iver is turne
d
o
p timing i
n
3
2
e
e
o
r
e
e
3
e
y
e
e
y
e
u
t
o
t
n
e
r
n
e
s
3
-
n
e
L
)
s
s
s
e
a
t
p
e
y
s
e
r
e
,
e
y
T
ll
s
e
s
y
d
n
Micr
e
Mar
c
Duri
n
circu
curr
e
allo
w
light
V
DD
The
inter
n
V
IN
i
s
to b
y
Soft
-
Soft-
start
u
the
o
The
M
ram
p
100
%
outp
u
curr
e
the
s
to re
d
e
l, Inc.
c
h 25, 2015
Figure 4.
n
g discontin
u
its are redu
c
e
nt during di
s
w
ing the MI
C
load applicat
i
Regulator
MIC28513
p
n
al circuitry f
o
s
less than 5
.
y
pass the inte
-
Start
start reduce
s
u
p by contro
o
utput capaci
t
MIC28513 i
m
p
ing up the
0
%
in about 5
m
u
t voltage ra
t
e
nt and elimi
s
oft-start cycl
d
uce current
MIC28513-1
C
(Discontinuo
u
ous mode,
c
ed. As a re
s
s
continuous
m
C
28513-1 to
i
ons.
p
rovides a 5
o
r V
IN
rangin
5V, VDD sh
o
rnal linear re
g
s
the powe
r
lling the out
p
t
or charges.
m
plements an
0
.8V referen
c
m
s with 9.7
m
t
e of rise at
nating outpu
t
e ends, the
r
consumption
C
ontrol Loop
M
us Mode)
the bias cu
s
ult, the total
m
ode is only
achieve hig
h
V regulated
g
from 5.5V
o
uld be tied t
o
g
ulator.
r
supply inru
p
ut voltage r
i
internal digit
a
c
e voltage (V
m
V steps. Thi
turn on, min
t
voltage ov
e
r
elated circui
t
.
M
ode
rrent of mo
s
power suppl
about 450
A
h
efficiency i
VDD to bi
a
to 45V. Whe
o
the VIN pin
sh current
a
i
se time whil
a
l soft-start
b
R
EF
) from 0 t
s controls th
imizing inrus
e
rshoot. Onc
t
ry is disable
17
s
t
y
A
,
n
a
s
n
s
a
t
e
y
o
e
h
e
d
Curr
e
The
M
pow
e
switc
h
moni
t
The
s
grou
n
volta
g
low-
s
trip l
e
PGN
D
allow
cons
t
be m
u
The
Equ
a
LI
M
RI
Whe
r
I
CLIM
=
R
DS(
O
V
CL
=
14m
V
I
CL
=
c
I
L(P
P
calcu
The
temp
e
R
DS(
O
calcu
In c
a
folde
d
outp
u
mak
e
outp
u
limit;
may
n
e
nt Limit
M
IC28513 u
s
e
r MOSFET t
o
hing cycle,
t
oring the lo
w
s
ensed volta
g
n
d (PGND)
g
e drop of t
h
s
ide MOSFE
T
e
vel. The sm
a
D
can be ad
d
w
ing a bette
r
t
ant created
uch less tha
n
over curren
t
a
tion 3.
CLIM
M
5
.0I
r
e
=
desired cur
O
N)
= on-resis
t
=
current-lim
V
)
current-limit
s
P
)
= inductor
c
u
late the indu
c
V
V
I
O
U
)PP(L
MOSFET
erature; the
r
O
N)
at max ju
n
u
late R
ILIM
in
E
a
se of a ha
r
d
down to
a
u
t without an
e
sure that t
h
u
t capacitor d
otherwise th
n
ot finish the
s
es the R
DS(
O
o
sense ove
r
the induct
o
w
-side MOS
F
g
e V(ILIM) is
after a blan
h
e resistor
R
T
voltage dr
o
a
ll capacitor
c
d
ed to filter
t
r
short limit
by R
ILIM
and
n
the minimu
m
t
limit can
b
CL
)PP(L
I
R
I5
rent limit
t
ance of the l
o
it threshold
s
ource curre
n
c
urrent peak-
t
c
tor ripple cu
r
f
V
V
S
W
)MAX(IN
)MAX(IN
U
T
R
DS(ON)
vari
r
efore, it is
r
n
ction tempe
E
quation 3.
r
d short, the
a
llow an ind
y destructiv
e
h
e inductor
c
uring soft-st
a
e supply will
soft-start su
c
O
N)
of the int
e
r
current cond
i
o
r current i
s
F
ET during i
t
compared
w
king time o
f
R
ILIM
is comp
o
p to set th
e
c
onnected fr
o
t
he switching
measurem
e
the filter ca
p
m
off time.
b
e program
m
C)ON(DS V
R
o
w-side MO
S
(typical abs
o
n
t (typical val
u
t
o-peak. Use
r
rent.
L
V
W
OUT
es 30% t
o
r
ecommende
rature with 2
current limi
t
efinite hard
e
effect. It is
c
urrent used
a
rt is under t
h
go into hic
c
c
cessfully.
MIC2851
3
Revision 1.
2
e
rnal low-sid
e
i
tions. In eac
h
s
sensed b
y
t
s ON perio
d
w
ith the pow
e
f
150ns. Th
e
ared with th
e
e
over-curre
n
o
m ILIM pin t
o
node ringin
g
e
nt. The tim
e
p
acitor shoul
d
m
ed by usin
g
L
Eq.
S
FET
o
lute value i
u
e is 80µA)
Equation 4 t
o
Eq.
4
o
40% wit
h
d to use th
e
0% margin t
o
t
threshold i
s
short on th
e
mandatory t
o
to charge th
e
h
e folded sho
r
c
up mode an
d
3
2
e
h
y
d
.
e
r
e
e
n
t
o
g
,
e
d
g
3
s
o
4
h
e
o
s
e
o
e
r
t
d
Micrel, Inc. MIC28513
March 25, 2015 18 Revision 1.2
Power Good (PG)
The Power Good (PG) pin is an open drain output which
indicates logic high when the output is nominally 90% of
its steady state voltage.
MOSFET Gate Drive
The Functional Diagram shows a bootstrap circuit,
consisting of DBST, CBST and RBST. This circuit supplies
energy to the high-side drive circuit. Capacitor CBST is
charged, while the low-side MOSFET is on, and the
voltage on the SW pin is approximately 0V. When the
high-side MOSFET driver is turned on, energy from CBST
is used to turn the MOSFET on. As the high-side
MOSFET turns on, the voltage on the SW pin increases
to approximately VIN. Diode DBST is reverse-biased and
CBST floats high while continuing to bias the high-side
gate driver. The bias current of the high-side driver is less
than 10mA so a 0.1F to 1F is sufficient to hold the gate
voltage with minimal droop for the power stroke (high-
side switching) cycle, i.e. BST = 10mA × 1.25s/0.1F =
125mV. When the low-side MOSFET is turned back on,
CBST is then recharged through the boost diode. A 30
resistor RBST, which is in series with the BST pin, is
required to slow down the turn-on time of the high-side N-
channel MOSFET.
Micr
e
Mar
c
Ap
p
Out
p
The
volta
The
o
V
Whe
V
FB
=
A
ty
p
boar
d
intro
d
smal
esp
e
calc
u
R
Setti
The
chan
e
l, Inc.
c
h 25, 2015
p
lication I
p
ut Voltage
S
MIC28513 r
e
ge as shown
Figure
5
o
utput voltag
e
V
V
FBOUT
re:
=
0.8V.
p
ical value
o
d
is 10k. If
d
uced into t
h
l, it will decr
e
e
cially at light
u
lated using
E
OUT
FB
V
V
R
V
2
R
ng the Swit
c
MIC28513 s
w
ging the resi
s
nformati
o
S
etting Com
p
e
quires two
r
in Figure 5.
5
. Voltage Divi
e
is determin
e
2R
1R
1
o
f R1 used
o
R1 is too lar
g
h
e voltage f
e
e
ase the effi
c
loads. Once
E
quation 6.
FB
V
1
R
c
hing Frequ
e
w
itching freq
s
tor divider n
e
o
n
p
onents
r
esistors to
s
der Configur
a
e
d by Equati
o
o
n the stand
a
g
e, it may all
o
e
edback loo
p
c
iency of the
R1 is select
e
e
ncy
uency can b
e
twork from
V
s
et the outp
u
a
tion
o
n 5.
Eq.
a
rd evaluatio
o
w noise to b
p
. If R1 is to
power suppl
y
e
d, R2 can b
Eq.
e adjusted
b
V
IN.
19
u
t
5
n
e
o
y
,
e
6
b
y
Equ
a
fSW
Whe
r
f
0
=
typic
a
Figu
r
R17
w
R1
7
R1
9
Figure 6.
S
a
tion 7 gives t
17R
1
7
R
f0
r
e
switching fr
e
a
lly.
r
e 7 shows t
h
w
hen R19 =
1
Figure
7
VI
N
F
R
7
9
S
witching Fre
q
he estimated
19R
7
e
quency wh
e
h
e switch fre
q
1
00k.
7
. Switching F
r
GND
MIC28513
N
R
E
Q
q
uency Adju
s
switching fr
e
e
n R17 is
o
q
uency vers
u
requency vs.
MIC2851
3
Revision 1.
2
s
tment
e
quency.
Eq.
7
o
pen, 600kH
z
u
s the resist
o
R17
3
2
7
z
o
r
Micrel, Inc. MIC28513
March 25, 2015 20 Revision 1.2
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by:
SW)PP(L)MAX(IN
OUT)MAX(INOUT
fIV
VVV
L
Eq. 8
Where:
fSW = switching frequency
L(PP) = The peak-to-peak inductor current ripple,
Typically 20% of the maximum output current.
In the continuous conduction mode, the peak inductor
current is equal to the average output current plus one
half of the peak-to-peak inductor current ripple.
)PP(LOUT)PK(L I5.0II Eq. 9
The RMS inductor current is used to calculate the I2R
losses in the inductor.
2
)PP(L
2
)MAX(OUT
2
)RMS(L I
I
II
Eq. 10
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance. The
high frequency operation of the MIC28513 requires the
use of ferrite materials for all but the most cost sensitive
applications. Lower cost iron powder cores may be used,
but the increase in core loss will reduce the efficiency of
the power supply. This is especially noticeable at low
output power. The winding resistance decreases
efficiency at the higher output current levels.
The winding resistance must be minimized, although this
usually comes at the expense of a larger inductor. The
power dissipated in the inductor is equal to the sum of the
core and copper losses. At higher output loads, the core
losses are usually insignificant and can be ignored. At
lower output currents, the core losses can be a significant
contributor. Core loss information is usually available
from the magnetics vendor. Copper loss in the inductor is
calculated by using Equation 11.
PL(Cu) = IL(RMS)
2 × DCR Eq. 11
The resistance of the copper wire, DCR, increases with
the temperature. The value of the winding resistance
used should be at the operating temperature.
DCR(HT) = DCR20C × (1 + 0.0042 × (TH T20C)) Eq. 12
Where:
TH = temperature of the wire under full load
T20C = ambient temperature
DCR(20C) = room temperature winding resistance (usually
specified by the manufacturer).
Output Capacitor Selection
The type of the output capacitor is usually determined by
its equivalent series resistance (ESR). Voltage and RMS
current capability are also important factors in selecting
an output capacitor. Recommended capacitor types are
ceramic, tantalum, low-ESR aluminum electrolytic, OS-
CON and POSCAP. For high ESR electrolytic capacitors,
ESR is the main cause of the output ripple. The output
capacitor ESR also affects the control loop from a
stability point of view. For a low ESR ceramic output
capacitor, ripple is dominated by the reactive impedance.
The maximum value of ESR is calculated with Equation
13.
)PP(L
)PP(OUT
COUT I
V
ESR
Eq. 13
Where:
ΔVOUT(pp) = peak-to-peak output voltage ripple
IL(PP) = peak-to-peak inductor current ripple
Micrel, Inc. MIC28513
March 25, 2015 21 Revision 1.2
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated by
Equation 14.

2
COUT)PP(L
SWOUT
)PP(L
)PP(OUT ESRI
8fC
I2
V
Eq. 14
Where
D = duty cycle
COUT = output capacitance value
fSW = switching frequency.
As described in the “Theory of Operation” subsection in
the Functional Description section, the MIC28513
requires at least 20mV peak-to-peak ripple at the FB pin
for the gm amplifier and the error comparator to operate
properly. Also, the ripple on FB pin should be in phase
with the inductor current. Therefore, the output voltage
ripple caused by the output capacitors value should be
much smaller than the ripple caused by the output
capacitor ESR. If low-ESR capacitors, such as ceramic
capacitors, are selected as the output capacitors, a ripple
injection method should be applied to provide the enough
feedback voltage ripple. Please refer to the “Ripple
Injection” sub-section for more details.
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated by Equation 15.
12
I
I)PP(L
)RMS(COUT
Eq. 15
The power dissipated in the output capacitor is calculated
using Equation 16.
COUT
)RMS(COUT
2
)COUT(DISS ESRIP Eq. 16
Input Capacitor Selection
The input capacitor for the power stage input VIN should
be selected for ripple current rating and voltage rating.
Tantalum input capacitors may fail when subjected to
high inrush currents, caused by turning the input supply
on. A tantalum input capacitor’s voltage rating should be
at least two times the maximum input voltage to
maximize reliability. Aluminum electrolytic, OS-CON, and
multilayer polymer film capacitors can handle the higher
inrush currents without voltage de-rating. The input
voltage ripple will primarily depend on the input
capacitor’s ESR. The peak input current is equal to the
peak inductor current, so:
CIN)PK(LIN ESRIV Eq. 17
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming the
peak-to-peak inductor current ripple is low:

D1DII )MAX(OUT)RMS(CIN Eq. 18
The power dissipated in the input capacitor is:
CIN
)RMS(CIN
2
)CIN(DISS ESRIP Eq. 19
Micr
e
Mar
c
Rip
p
The
MIC
2
100
m
desi
g
feed
b
and
will l
o
orde
r
injec
t
appli
The
acco
1.
E
l
a
A
a
2.
W
c
3. I
s
T
t
a
d
R
W
r
4.
V
v
e
l, Inc.
c
h 25, 2015
p
le Injection
V
FB
ripple
2
8513’s g
m
a
m
m
V. Howeve
r
g
ned as 1%
b
ack voltage
error compa
r
o
se control a
n
r
to have
s
t
ion method
cations.
application
s
rding to the
a
E
nough rippl
e
a
rge ESR of
t
A
s shown in
F
a
ny ripple inj
e
)PP(FB
R
V
W
here:
I
L(pp)
is the
c
urrent ripple
.
nadequate ri
p
s
mall ESR of
T
he output
v
hrough a fee
a
s shown i
n
d
etermined b
y
S
W
FF
f
1
0
C1
R
W
ith the feed
-
r
ipple is very
c
)PP(FB
E
S
V
V
irtually no r
i
v
ery low ESR
required for
m
plifier and
e
r
, the output
to 2% of
t
ripple is so
r
ator can’t s
e
n
d the output
s
ome amou
n
is applied fo
s
are divid
e
a
mount of the
e
at the feedb
t
he output ca
F
igure 8, the
c
e
ction. The fe
e
C
ESR
2R1
2R
peak-to-pe
a
p
ple at the f
e
the output c
a
v
oltage rippl
e
d-forward ca
p
n
Figure 9.
y
the followin
g
W
0
-
forward cap
a
c
lose to the
o
L
COUT
I
S
R
i
pple at the
of the outpu
t
proper op
e
e
rror compar
a
voltage rippl
t
he output
v
small that th
e
nse it, then
t
voltage is n
o
n
t of V
FB
ri
p
r low output
e
d into thr
feedback vo
l
ack voltage
d
pacitors.
c
onverter is s
e
dback volta
g
P
P
(L
C
OUT
I
a
k value of
e
edback volt
a
a
pacitors.
e
is fed int
o
p
acitor, C
ff
in
The typical
g
equation.
a
citor, the fe
e
o
utput voltag
e
)PP(
F
B pin volta
g
t
capacitors.
e
ration of th
a
tor is 20mV t
e is generall
v
oltage. If th
e g
m
amplifi
e
t
he MIC2851
o
t regulated. I
p
ple, a rippl
voltage rippl
ee situation
l
tage ripple:
d
ue to the
table without
g
e ripple is:
)
P
Eq. 2
the induct
o
a
ge due to th
o
the FB pi
this situatio
n
C
ff
value i
Eq. 2
e
dback voltag
e
ripple.
Eq. 2
g
e due to th
22
e
o
y
e
e
r
3
n
e
e
s
0
o
r
e
n
n
,
s
1
e
2
e
Fig
u
Figur
e
Figu
r
u
re 8. Enough
e
9. Inadequa
t
r
e 10. Invisibl
e
Ripple at FB
t
e Ripple at F
B
e
Ripple at F
B
MIC2851
3
Revision 1.
2
B
B
3
2
Micrel, Inc. MIC28513
March 25, 2015 23 Revision 1.2
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor Rinj and a
capacitor Cinj, as shown in Figure 10. The injected ripple
is:
×f
1
×D)-(1×D×K×V=V
SW
divINFB(pp) Eq. 23
R1//R2R
R1//R2
K
inj
div
Eq. 24
Where:
VIN = power stage input voltage
D = duty cycle
fSW = switching frequency
τ = (R1//R2//RINJ) × CFF
It is assumed in Equation 23 and Equation 24 that the
time constant associated with Cff must be much greater
than the switching period.
1
T
f
1
SW

Eq. 25
If the voltage divider resistors R1 and R2 are in the k
range, a Cff of 1nF to 100nF can easily satisfy the large
time constant requirements. Also, a 100nF injection
capacitor Cinj is used in order to be considered as short
for a wide range of the frequencies.
The process of sizing the ripple injection resistor and
capacitors is as follows.
1. Select Cff to feed all output ripples into the feedback
pin and make sure the large time constant
assumption is satisfied. Typical choice of Cff is 1nF to
100nF if R1 and R2 are in k range.
2. Select Rinj according to the expected feedback
voltage ripple using Equation 26.
D)(1D
f
V
V
KSW
IN
FB(pp)
div -
Eq. 26
Then the value of Rinj is obtained using:
1)
K
1
((R1//R2)R
div
inj Eq. 27
3. Select Cinj as 100nF, which can be considered a
short for a wide range of frequencies.
Micrel, Inc. MIC28513
March 25, 2015 24 Revision 1.2
PCB Layout Guidelines
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power, signal
and return paths.
The following figures optimized from small form factor
point of view shows top and bottom layer of a four layer
PCB. It is recommended to use mid layer 1 as a
continuous ground plane.
Figure 11. Top and Bottom Layer of a Four Layer Board
The following guidelines should be followed to ensure the
proper operation of the MIC28513 converter.
IC
The analog ground pin (AGND) must be connected
directly to the ground planes. Do not route the AGND
pin to the PGND pin on the top layer.
Place the IC close to the point of load (POL).
Use copper planes to route the input and output
power lines.
Analog and power grounds should be kept separate
and connected at only one location.
Input Capacitor
Place the input capacitors on the same side of the
board and as close to the PVIN and PGND pins as
possible.
Place several vias to the ground plane close to the
input capacitor ground terminal.
Use either X7R or X5R dielectric input capacitors. Do
not use Y5V or Z5U type capacitors.
Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
If a Tantalum input capacitor is placed in parallel with
the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over-
voltage spike seen on the input supply with power is
suddenly applied.
SW Node
Do not route any digital lines underneath or close to
the SW node.
Keep the switch node (SW) away from the feedback
(FB) pin.
Output Capacitor
Use a copper island to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in the
BOM.
The feedback trace should be separate from the power
trace and connected as close as possible to the output
capacitor. Sensing a long high-current load trace can
degrade the DC load regulation.
Thermal Measurements
Measuring the IC’s case temperature is recommended to
insure it is within its operating limits. Although this might
seem like a very elementary task, it is easy to get
erroneous results. The most common mistake is to use
the standard thermal couple that comes with a thermal
meter. This thermal couple wire gauge is large, typically
22 gauge, and behaves like a heatsink, resulting in a
lower case measurement.
Two methods of temperature measurement are using a
smaller thermal couple wire or an infrared thermometer. If
a thermal couple wire is used, it must be constructed of
36 gauge wire or higher than (smaller wire size) to
minimize the wire heat-sinking effect. In addition, the
thermal couple tip must be covered in either thermal
grease or thermal glue to make sure that the thermal
couple junction is making good contact with the case of
the IC. Omega brand thermal couple (5SC-TT-K-36-36) is
adequate for most applications.
Wherever possible, an infrared thermometer is
recommended. The measurement spot size of most
infrared thermometers is too large for an accurate
reading on a small form factor ICs. However, a IR
thermometer from Optris has a 1mm spot size, which
makes it a good choice for measuring the hottest point on
the case. An optional stand makes it easy to hold the
beam on the IC for long periods of time.
Micr
e
Mar
c
MI
C
Bill
Ite
m
C1
C2,
C4,
C5,
C6,
C9
C1
0
C11
C1
2
C1
4
C1
8
C1
9
C2
0
C21
Note
s
6. N
i
7. A
V
8. T
D
9. K
e
10. M
e
l, Inc.
c
h 25, 2015
C
28513 E
v
of Materi
m
C3
C7
C13
C16
0
, C17
2
4
, C15
8
9
0
s
:
i
chicon: www.ni
c
V
X: www.avx.co
m
D
K: www.tdk.co
m
e
met: www.kem
e
urata: www.mur
a
v
aluation
B
als
Part Nu
UVZ2A
3
12061Z
4
C1608
X
C0603
C
GRM21
B
08051C
4
GRM18
8
CGA3E
2
GRM32
E
c
hicon.co.jp/engl
i
m
.
m
.
e
t.com.
a
ta.com.
B
oard Sc
h
mbe
r
3
30MPD
4
75KAT2A
X
7R1A225K08
0
C
104K8RACT
U
B
R72A474KA
7
4
74KAT2A
8
R72A104KA
3
2
X7R1H471K
E
R71A476KE
1
i
sh.
h
ematic
Ma
n
N
i
0
AC
U
K
7
3
M
3
5D
1
5L
25
n
ufacture
r
D
i
chicon
(6)
3
AVX
(7)
4
TDK
(8)
2
O
K
emet
(9)
0
M
urata
(10)
0
AVX
Murata
0
O
TDK
4
Murata
4
O
O
O
O
D
escription
3
3µF/100V 20
%
4
.7µF/100V, X
7
2
.2µF/10V, X7
R
O
pen
0
.1µF/10V, X7
R
0
.47µF/100V,
X
0
.1µF/100V, X
7
O
pen
4
70pF/50V, X
7
4
7µF/10V, X7
R
O
pen
O
pen
O
pen
O
pen
%
Radial Alum
7
S, Size 1206
R
, Size 0603
C
R
, Size 0603
C
X
7R, Size 080
5
7
R, Size 0603
7
R, Size 0603
C
R
, Size 1210 C
inum Capacito
Ceramic Cap
a
C
eramic Capa
c
C
eramic Capa
c
5
Ceramic Ca
p
Ceramic Cap
a
C
eramic Capa
c
eramic Capaci
MIC2851
3
Revision 1.
2
Qty.
o
r 1
a
citor 2
c
itor 2
NA
c
itor 2
p
acitor 1
a
citor 2
NA
c
itor 1
tor 2
NA
NA
NA
1
3
2
Micrel, Inc. MIC28513
March 25, 2015 26 Revision 1.2
Bill of Materials (Continued)
Item Part Number Manufacturer Description Qty.
D1 BAT46W-TP MCC(11) 100V Small Signal Schottky Diode, SOD123 1
D3 MMSZ5231B-7-F Diode(12) 5.1V/500MW SOD123 Zener Diode NA
J1, J7, J8,
J10, J11, J12,
J16, J17, J18
77311-118-02LF FCI(13) CONN HEADER 2POS VERT T/H 9
L1 XAL7030-682MED Coilcraft(14) 6.8µH, 10.7A sat current 1
R1 CRCW060310K0FKEA Vishay Dale(15) 10.0k, Size 0603, 1% Resistor 1
R2 Open NA
R9 Open NA
R10 CRCW06033K24FKEA Vishay Dale 3.24k, Size 0603, 1% Resistor 1
R11 CRCW06031K91FKEA Vishay Dale 1.91k, Size 0603, 1% Resistor 1
R14, R15 CRCW06030000FKEA Vishay Dale 0.0 , Size 0603, Resistor Jumper 2
R26 CRCW06030000FKEA Vishay Dale 0, Size 0603, Resistor Jumper NA
R16, R19, R17,R3 CRCW0603100K0FKEA Vishay Dale 100k, Size 0603, 1% Resistor 4
R25 CRCW0603100K0FKEA Vishay Dale 100k, Size 0603, 1% Resistor NA
R18 CRCW06031K00JNEA Vishay Dale 1.0k, Size 0603, 5% Resistor 1
R20, R21 CRCW060349R9FKEA Vishay Dale 49.9, Size 0603, 1% Resistor 2
R22 CRCW06031K82FKEA Vishay Dale 1.82k, Size 0603, 1% Resistor 1
R23 CRCW08051R21FKEA Vishay Dale 1.21, Size 0805, 1% Resistor 1
R24 CRCW060310R0FKEA Vishay Dale 10.0, Size 0603, 1% Resistor 1
TP1 TP2 Open
TP7 TP14 77311-118-02LF FCI CONN HEADER 2POS VERT T/H 1
TP8 TP13 77311-118-02LF FCI CONN HEADER 2POS VERT T/H 1
TP17 TP18 77311-118-02LF FCI CONN HEADER 2POS VERT T/H 1
TP9, TP10,
TP11, TP12 1502 Keystone
Electronics(16) Testpoint Turret, .090 4
U1 MIC28513-1YFL Micrel Inc.(17) 45V 4A Synchronous Buck Regulator 1
Notes:
11. MCC: www.mccsemi.com.
12. Diode: www.diodes.com.
13. FCI: www.fciconnect.com.
14. Coilcraft: www.coilcraft.com.
15. Vishay Dale: www.vishay.com.
16. Keystone Electronics: www.keyelco.com.
17. Micrel Inc.: www.micrel.com.
Micrel, Inc. MIC28513
March 25, 2015 27 Revision 1.2
MIC28513 Evaluation Board Layout
Top Layer
Mid Layer 1
Micrel, Inc. MIC28513
March 25, 2015 28 Revision 1.2
MIC28513 Evaluation Board Layout (Continued)
Mid Layer 2
Bottom Layer
Micr
e
Mar
c
Pa
c
Note:
18. P
a
e
l, Inc.
c
h 25, 2015
c
kage Inf
o
a
ckage informati
o
rmation
a
on is correct as
o
a
nd Reco
m
o
f the publicatio
n
m
mende
d
24-Pin 3m
m
n
date. For upda
t
29
d
Land Pa
t
m
× 4mm FCQ
F
t
es and most cu
r
t
tern(18)
F
N (FL)
r
rent information, go to www.micrel.com.
MIC2851
3
Revision 1.
2
3
2
Micrel, Inc. MIC28513
March 25, 2015 30 Revision 1.2
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high-performance linear and power, LAN, and timing & communications
markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, cloc
k
management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company
customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products.
Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and
advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive networ
k
of distributors and reps worldwide.
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liabilit
y
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a produc
t
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user.
A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2014 Micrel, Incorporated.