7FN3179.6
September 14, 2011
drop can degrade operation at low voltages. Therefore, to
improve low voltage operation, the “LV” pin should be
connected to GND, thus disabling the regulator. For sup ply
voltages greater than 3.5V, the LV terminal must be left open
to ensure latchup-proof operation and to prevent device
damage.
Theoretical Power Efficiency
Considerations
In theory, a voltage converter can approach 100% efficiency
if certain conditions are met:
1. The drive circuitry consumes mi nimal power.
2. The output switch es have extremely low ON resistance
and virtually no offset.
3. The impedance of the pump and reservoir capacitors are
negligible at the pump frequency.
The ICL7660S approaches these conditions for negative
voltage conversion if large values of C1 and C2 are used.
ENERGY IS LOST ONLY IN THE TRANSFER OF CHARGE
BETWEEN CAPACITORS IF A CHANGE IN VOLTAGE
OCCURS. The energy lost is defined as shown in
Equation 1:
where V1 and V2 are the voltages on C1 during the pump
and transfer cycles. If the impedances of C1 and C2 are
relatively high at the pump frequency (see Figure 13)
compared to the value of RL, there will be a substantial
difference in the voltages, V1 and V2. The refo re it is no t onl y
desirable to make C2 as large as possible to eliminate output
voltage ripple, but also to employ a correspondingly large
value for C1 in order to achieve maximum efficiency of
operation.
Do’s and Don’ts
1. Do not exceed maximu m supply voltages.
2. Do not connect LV terminal to GND for supply voltage
greater than 3.5V.
3. Do not short circuit the output to V+ supply for supply
voltages above 5.5V for extended periods; however,
transient conditions including start-up are okay.
4. When using polarized capacitors, the + terminal of C1
must be connected to pin 2 of the ICL7660S, and the
+ terminal of C2 must be connected to GND.
5. If the vo ltage supply driving the ICL7660S has a large
source impedance (25Ω to 30Ω), then a 2.2µF capacitor
from pin 8 to ground may be required to limit the rate of
rise of input voltage to less than 2V/µs.
6. User should ensure that the output (pin 5) does not go
more positive than GND (pin 3). Device latch-up will
occur under these conditions. A 1N914 or similar diode
placed in parallel with C2 will prevent the device from
latching up under these conditions (anode pin 5, cathode
pin 3).
Typical Applications
Simple Negative Voltage Converter
The majority of applications will undoubtedly util ize the
ICL7660S for generation of negative supply voltages.
Figure 14 shows typical connecti ons to provide a negative
supply where a positive supply of +1.5V to +12V is available.
Keep in mind that pin 6 (LV) is tied to the supply negative
(GND) for supply voltage below 3.5V.
The output characteristics of the circuit in Figure 14 can be
approximated by an ideal voltage source in series with a
resistance as shown in Figure 14B. The voltage source has
a value of -(V+). The output impedance (RO) is a function of
the ON resistance of the internal MOS switches (shown in
Figure 13), the switching frequency, the value of C1 and C2,
and the ESR (equivalent series resistance) of C1 and C2. A
good first order approximation for RO is shown in
Equation 2:
Combining the four RSWX terms as RSW, we see in
Equation 3 that:
RSW, the total switch resistance, i s a function of supply
voltage and te mp erature (see the outpu t source resist a nce
graphs, Figures 2, 3, and 11), typically 23Ω at +25°C and 5V.
Careful selection of C1 and C2 will reduce the remain ing
terms, minimizing the outpu t impe dance. High va lue
capacitors will reduce the 1/(fPUMP x C1) component, and low
ESR capacito rs wil l lower the ESR term. Increasing th e
oscillator frequency will reduce the 1/(fPUMP x C1) term, but
may have the side effect of a net increase in output
impedance when C1 > 10µF and is not lon g enough to fu lly
E1
2
---C1V12V22
–()=(EQ. 1)
1
2
3
4
8
7
6
5
+
-
10µF
10µF
ICL7660S
VOUT = -V+ V+
+
-
ROVOUT
V+
+
-
14A. 14B.
FIGURE 14. SIMPLE NEGATIVE CONVERTER AND ITS
OUTPUT EQUIVALENT
R02R
SW1 RSW3 ESRC1
++()2R
SW2 RSW4 ESRC1
++()+()≅
(EQ. 2)
1
fPUMP C1
×
--------------------------------ESRC2
+
fPUMP fOSC
2
--------------
=RSWX MOSFET Switch Resistance=()
R02xRSW 1
fPUMP C1
×
--------------------------------4xESRC1 ESRC2
+++≅(EQ. 3)
ICL7660S