W83176R-705 DDR BUFFER FOR SIS CHIPSET W83176R-705 Data Sheet Revision History Pages Dates Version Version Main Contents On Web 1 n.a. 2 n.a. 02/Apr 1.0 n.a. All of the versions before 0.50 are for internal use. 1.0 Change version and version on web site to 1.0 3 4 5 6 7 8 9 10 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this data sheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. - 1 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 1.0 GENERAL DESCRIPTION The W83176R-705 is a 2.5V Zero-delay D.D.R. Clock buffer designed for SiS chipset. W83176R705 can support 3 D.D.R. DRAM DIMMs. W83176R-705 can be incorporated with W83194BR640/740 which is the step-less clock with free programmable CPU/AGP/PCI freq. outputs. The W83176R-705 provides I2C serial bus interface to program the registers to enable or disable each clock outputs. The W83176R-705 accepts a pair reference clock as its input and runs on 2.5V supply. 2.0 PRODUCT FEATURES * * * * * * * Zero-delay clock outputs Feedback pins for synchronous Supports up to 3 D.D.R. DIMMs One pairs of additional outputs for feedback Low Skew outputs (< 100ps) Supports 266MHz D.D.R. SDRAM I2C 2-Wire serial interface and I2C read back * 48-pin SSOP package - 2 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 3.0 PIN CONFIGURATION GND CLKC0 CLKT0 VDD CLKT1 CLKC1 GND GND CLKC2 CLKT2 VDD SDCLK Buffer_INT NC VDD AVDD AGND GND CLKC3 CLKT3 VDD CLKT4 CLKC4 GND 4.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 GND CLKC5 CLKT5 VDD CLKT6 CLKC6 GND GND CLKC7 CLKT7 VDD SDATA NC FB_INT VDD FB_OUTT NC GND CLKC8 CLKT8 VDD CLKT9 CLKC9 GND PIN DESCRIPTION IN - Input OUT - Output I/O - Bi-directional Pin - Internal 120k pull-up - 3 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 4.1 Clock Outputs SYMBOL PIN I/O CLKC[9:0] 26,30,40,43,47 ,23,19,9,6,2 OUT CLKT[9:0] 27,29,39,44,46 ,22,20,10,5,3 OUT SDATA 37 I/O Serial data of I2C 2-wire control interface SDCLK 12 IN Serial clock of I2C 2-wire control interface Buffer_INT 13 IN True reference clock input 14, 32,36 IN Not connected 33 OUT 35 IN NC FB_OUTT FB_INT FUNCTION Complementory Clocks of differential pair outputs True Clocks of differential pair outputs True Feedback output, dedicated for external feedback. It switches at the same frequency as the CLK. This output must be wired to FB_INT. True Feedback input, provides feedback signal to the internal PLL for synchronization with CLK_INT to eliminate phase error. 4.2 Power Pins SYMBOL PIN FUNCTION GND 1,7,8,18,24,25,31,41, Ground 42,48 VDD 4,11,21,28,34,38,45, Power Supply 2.5V 15 AVDD 16 Analog power supply, 2.5V AGND 17 Analog ground - 4 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 5.1 Register 0 : Control Register ( 1 = active, 0 = inactive ) Bit @PowerUp Pin Description 7 1 2,3 CLKC0,CLKT0(Active / Inactive) 6 1 6,5 CLKC1,CLKT1(Active / Inactive) 5 1 9,10 CLKC2,CLKT2(Active / Inactive) 4 1 19,20 CLKC3,CLKT3(Active / Inactive) 3 1 23,22 CLKC4,CLKT4(Active / Inactive) 2 1 47,46 CLKC5,CLKT5(Active / Inactive) 1 1 43,44 CLKC6,CLKT6(Active / Inactive) 0 1 40,39 CLKC7,CLKT7(Active / Inactive) 5.2 Register 1: Control Register ( 1 = active, 0 = inactive ) Bit @PowerUp Pin Description 7 1 30,29 CLKC8,CLKT8(Active / Inactive) 6 1 26,27 CLKC9,CLKT9(Active / Inactive) 5 1 - Reserved 4 1 - Reserved 3 1 - Reserved 2 1 - Reserved 1 1 - Reserved 0 1 - Reserved 5.3 Register 2: Reserved Register (default =1 ) Bit @PowerUp Pin Description 7 1 - Reserved 6 1 - Reserved 5 1 - Reserved 4 1 - Reserved 3 1 - Reserved 2 1 - Reserved 1 1 - Reserved 0 1 - Reserved - 5 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 5.4 Register 3: : Reserved Register (default =1 ) Bit @PowerUp Pin Description 7 1 - Reserved 6 1 - Reserved 5 1 - Reserved 4 1 - Reserved 3 1 - Reserved 2 1 - Reserved 1 1 - Reserved 0 1 - Reserved - 6 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 6.0 7.0 ORDERING INFORMATION Part Number Package Type Production Flow W83176R-705 48 PIN SSOP Commercial, 0C to +70C HOW TO READ THE TOP MARKING W83176R-705 28051234 814GAB 1st line: Winbond logo and the type number: W83176R-705 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 G B B 814: packages made in '98, week 14 G: assembly house ID; O means OSE, G means GR A: Internal use code B: IC revision All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. - 7 - Publication Release Date: April. 2002 Revision 1.0 W83176R-705 8.0 PACKAGE DRAWING AND DIMENSIONS Headquarters No. 4, Creation Rd. III Science-Based Industrial Park Hsinchu, Taiwan TEL: 886-35-770066 FAX: 886-35-789467 www: http://www.winbond.com.tw/ Winbond Electronics (H.K.) Ltd. Winbond Electronics Rm. 803, World Trade Square, Tower II (North America) Corp. 123 Hoi Bun Rd., Kwun Tong 2727 North First Street Kowloon, Hong Kong San Jose, California 95134 TEL: 852-27516023-7 TEL: 1-408-9436666 FAX: 852-27552064 FAX: 1-408-9436668 Taipei Office 9F, No. 480, Rueiguang Road, Neihu District, Taipei, 114, Taiwan TEL: 886-2-81777168 FAX: 886-2-87153579 Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sale. - 8 - Publication Release Date: April. 2002 Revision 1.0