TL/F/6534
5495A/DM7495 4-Bit Parallel Access Shift Registers
June 1989
5495A/DM7495
4-Bit Parallel Access Shift Registers
General Description
These 4-bit registers feature parallel and serial inputs, paral-
lel outputs, mode control, and two clock inputs. The regis-
ters have three modes of operation.
Parallel (broadside) load
Shift right (the direction QAtoward QD)
Shift left (the direction QDtoward QA)
Parallel loading is accomplished by applying the four bits of
data and taking the mode control input high. The data is
loaded into the associated flip-flops and appears at the out-
puts after the high-to-low transition of the clock-2 input. Dur-
ing loading, the entry of serial data is inhibited.
Shift right is accomplished on the high-to-low transition of
clock 1 when the mode control is low; shift left is accom-
plished on the high-to-low transition of clock 2 when the
mode control is high by connecting the output of each flip-
flop to the parallel input of the previous flip-flop (QDto input
C, etc.) and serial data is entered at input D. The clock input
may be applied simultaneously to clock 1 and clock 2 if both
modes can be clocked from the same source.
Changes at the mode control input should normally be
made while both clock inputs are low; however, conditions
described in the last three lines of the truth table will also
ensure that register contents are protected.
Features
YTypical maximum clock frequency 36 MHz
YTypical power dissipation 250 mW
Connection Diagram
Dual-In-Line Package
TL/F/6534–1
Order Number 5495ADMQB, 5495AFMQB or DM7495N
See NS Package Number J14A, N14A or W14B
C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
54A b55§Ctoa
125§C
DM74 0§Ctoa
70§C
Storage Temperature Range b65§Ctoa
150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter 5495A DM7495 Units
Min Nom Max Min Nom Max
VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 2 V
VIL Low Level Input Voltage 0.8 0.8 V
IOH High Level Output Current b0.8 b0.8 mA
IOL Low Level Output Current 16 16 mA
fCLK Clock Frequency (Note 4) 0 25 0 25 MHz
tWClock Pulse Width (Note 4) 15 11 15 ns
tSU Data Setup Time (Note 4) 20 10 20 10 ns
tEN Time to Enable Clock 1 20 20 ns
Clock (Note 4) Clock 2 15 15
tHData Hold Time (Note 4) 0 b10 0 b10 ns
tIN Time to Inhibit Clock 1 10 10 ns
or Clock 2 (Note 4)
TAFree Air Operating b55 125 0 70 §C
Temperature
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 1)
VIInput Clamp Voltage VCC eMin, IIeb
12 mA b1.5 V
VOH High Level Output VCC eMin, IOH eMax 2.4 3.4 V
Voltage VIL eMax, VIH eMin
VOL Low Level Output VCC eMin, IOL eMax 0.2 0.4 V
Voltage VIH eMin, VIL eMax
IIInput Current @Max VCC eMax, VIe5.5V 1mA
Input Voltage
IIH High Level Input VCC eMax Mode 80 mA
Current VIe2.4V Others 40
IIL Low Level Input VCC eMax Mode b3.2 mA
Current VIe0.4V Others b1.6
IOS Short Circuit VCC eMax DM54 b18 b57 mA
Output Current (Note 2) DM74 b18 b57
ICC Supply Current VCC eMax (Note 3) 50 75 mA
Note 1: All typicals are at VCC e5V, TAe25§C.
Note 2: Not more than one output should be shorted at a time.
Note 3: ICC is measured with all outputs and serial input open; A, B, C, and D inputs grounded: Mode Control at 4.5V: and a momentary 3V, then ground, applied to
both clock inputs.
Note 4: TAe25§C and VCC e5V.
2
Switching Characteristics at VCC e5V and TAe25§C (See Section 1 for Test Waveforms and Output Load)
Symbol Parameter From (Input) RLe400X,C
Le15 pF Units
To (Output) Min Max
fMAX Maximum Clock Frequency 25 MHz
tPHL Propagation Delay Time Clock to 35 ns
High to Low Level Output Output
tPLH Propagation Delay Time Clock to 35 ns
Low to High Level Output Output
Function Table
Inputs Outputs
Mode Clocks Serial Parallel QAQBQCQD
Control 2(L) 1(R) A B C D
HHXXXXXXQ
A0 QB0 QC0 QD0
H
v
XXabcdabcd
H
v
XXQ
B
²
Q
C
²
Q
D
²
dQ
Bn QCn QDn d
LLHXXXXXQ
A0 QB0 QC0 QD0
LX
v
HXXXXHQ
An QBn QCn
LX
v
LXXXXLQ
An QBn QCn
u
LL X XXXXQ
A0 QB0 QC0 QD0
v
LL X XXXXQ
A0 QB0 QC0 QD0
v
LH X XXXXQ
A0 QB0 QC0 QD0
u
HL X XXXXQ
A0 QB0 QC0 QD0
u
HH X XXXXQ
A0 QB0 QC0 QD0
²Shifting left requires external connection of QBto A, QCto B, QDto C. Serial data is entered at input D.
HeHigh Level (Steady State), L eLow Level (Steady State), X eDon’t Care (Any input, including transitions)
v
eTransition from high to low level,
u
eTransition from low to high level
a, b, c, d eThe level of steady, state input at inputs A, B, C, or D, respectively.
QA0,Q
B0,Q
C0,Q
D0 eThe level of QA,Q
B
,Q
C
,Q
D
, respectively, before the indicated steady state input conditions were established.
QAn,Q
Bn,Q
Cn,Q
Dn eThe level of QA,Q
B
,Q
C
,Q
D
, respectively, before the most recent
v
transition of the clock.
Logic Diagram
TL/F/6534–2
3
4
Physical Dimensions inches (millimeters)
14-Lead Ceramic Dual-In-Line Package (J)
Order Number 5495ADMQB
NS Package Number J14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM7495N
NS Package Number N14A
5
5495A/DM7495 4-Bit Parallel Access Shift Registers
Physical Dimensions inches (millimeters)
14-Lead Ceramic Flat Package (W)
Order Number 5495AFMQB
NS Package Number W14B
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