Semiconductor Components Industries, LLC, 2010
October, 2010 -- Rev. 8
1Publication Order Number:
NB2308A/D
NB2308A
3.3 V Zero Delay
Clock Buffer
The NB2308A is a versatile, 3.3 V zero delay buffer designed to
distribute high--speed clocks. It is available in a 16 pin package. The
part has an on--chip PLL which locks to an input clock presented on
the REF pin. The PLL feedback is required to be driven to FBK pin,
and can be obtained from one of the outputs. The input--to--output
propagation delay is guaranteed to be less than 250 ps, and the
output--to--output skew is guaranteed to be less than 200 ps.
The NB2308A has two banks of four outputs each, which can be
controlled by the select inputs as shown in the Select Input Decoding
Table. If all the output clocks are not required, Bank B can be
three--stated. The select input also allows the input clock to be directly
applied to the outputs for chip and system testing purposes.
Multiple NB2308A devices can accept the same input clock and
distribute it. In this case the skew between the outputs of the two
devices is guaranteed to be less than 700 ps.
The NB2308A is available in five different configurations (Refer to
NB2308A Configurations Table). The NB2308AI1 is the base part,
where the output frequencies equal the reference if there is no counter
in the feedback path. The NB2308AI1H is the high--drive version of
the --1 and the rise and fall times on this device are much faster.
The NB2308AI2 allows the user to obtain 2X and 1X frequencies on
each output bank. The exact configuration and output frequencies
depends on which output drives the feedback pin. The NB2308AI3
allows the user to obtain 4X and 2X frequencies on the outputs.
The NB2308AI4 enables the user to obtain 2X clocks on all outputs.
Thus, the part is extremely versatile, and can be used in a variety of
applications.
The NB2308AI5H is a high--drive version with REF/2 on both
banks.
Features
Zero Input -- Output Propagation Delay, Adjustable by Capacitive
Load on FBK Input
Multiple Configurations -- Refer to NB2308A Configurations Table
Input Frequency Range: 15 MHz to 133 MHz
Multiple Low--Skew Outputs
Output--Output Skew Less than 200 ps
Device--Device Skew Less than 700 ps
Two banks of four outputs, three--stateable by two select inputs
Less than 200 ps Cycle--to--Cycle Jitter
Available in 16--pin SOIC and TSSOP Packages
3.3 V Operation
Guaranteed Across Commercial and Industrial Temperature Ranges
Advanced 0.35 mCMOS Technology
These are Pb--Free Devices
MARKING
DIAGRAMS*
XXXX = Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
GorG= Pb--Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
SOIC--16
D SUFFIX
CASE 751B
1
16
1
16
1
16
1
16
XXXX
XXXX
ALYWG
G
XXXXXXXXXG
AWLYWW
TSSOP--16
DT SUFFIX
CASE 948F
NB2308A
http://onsemi.com
2
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL
MUX
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
Figure 1. Block Diagram
(see Figures 11, 12, 13, 14 and 15 for device specific Block Diagrams)
REF
S2
S1
Extra Divider (--2, --3)
Extra Divider (--5H)
Extra Divider (--3, --4)
÷2
÷2
÷2
Table 1. CONFIGURATIONS
Device Feedback From Bank A Frequency Bank B Frequency
NB2308AI1 Bank A or Bank B Reference Reference
NB2308AI1H Bank A or Bank B Reference Reference
NB2308AI2 Bank A Reference Reference ÷2
NB2308AI2 Bank B 2 X Reference Reference
NB2308AI3 Bank A 2 X Reference Reference or Reference (Note 1)
NB2308AI3 Bank B 4 X Reference 2 X Reference
NB2308AI4 Bank A or Bank B 2 X Reference 2 X Reference
NB2308AI5H Bank A or Bank B Reference ÷2Reference ÷2
1. Output phase is indeterminant (0or 180from input clock). If phase integrity is required, use the NB2308AI2.
Table 2. SELECT INPUT DECODING
S2 S1 Clock A1 -- A4 Clock B1 -- B4 Output Source PLL ShutDown
0 0 Three--state Three--state PLL Y
0 1 Driven Three--state PLL N
1 0 Driven (Note 2) Driven Reference Y
1 1 Driven Driven PLL N
2. Outputs inverted on 2308--2 and 2308--3 in bypass mode, S2 = 1 and S1 = 0.
NB2308A
http://onsemi.com
3
Figure 2. Pin Configuration
VDD
1
2
3
4
16
15
14
13
REF
CLKA1
CLKA2
GND
FBK
CLKA4
CLKA3
NB2308A
VDD
5
6
7
8
12
11
10
9
CLKB1
CLKB2
S2
CLKB4
CLKB3
S1
GND
Table 3. PIN DESCRIPTION
Pin # Pin Name Description
1REF (Note 3) Input reference frequency, 5 V tolerant input.
2CLKA1 (Note 4) Buffered clock output, Bank A.
3CLKA2 (Note 4) Buffered clock output, Bank A.
4 VDD 3.3 V supply.
5GND Ground.
6CLKB1 (Note 4) Buffered clock output, Bank B.
7CLKB2 (Note 4) Buffered clock output, Bank B.
8S2 (Note 5) Select input, bit 2.
9S1 (Note 5) Select input, bit 1.
10 CLKB3 (Note 4) Buffered clock output, Bank B.
11 CLKB4 (Note 4) Buffered clock output, Bank B.
12 GND Ground.
13 VDD 3.3 V supply.
14 CLKA3 (Note 4) Buffered clock output, Bank A.
15 CLKA4 (Note 4) Buffered clock output, Bank A.
16 FBK PLL feedback input.
3. Weak pulldown.
4. Weak pulldown on all outputs.
5. Weak pullup on these inputs.
NB2308A
http://onsemi.com
4
Table 4. MAXIMUM RATINGS
Parameter Min Max Unit
Supply Voltage to Ground Potential -- 0 . 5 +7.0 V
DC Input Voltage (Except REF) -- 0 . 5 VDD +0.5 V
DC Input Voltage (REF) -- 0 . 5 7 V
Storage Temperature -- 6 5 +150 C
Maximum Soldering Temperature (10 sec) 260 C
Junction Temperature 150 C
Static Discharge Voltage (per MIL--STD--883, Method 3015) >2000 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 5. OPERATING CONDITIONS
Parameter Description Min Max Unit
VDD Supply Voltage 3.0 3.6 V
TAOperating Temperature (Ambient Temperature) Industrial
Commercial
-- 4 0
0
85
70
C
CLLoad Capacitance, below 100 MHz 30 pF
CLLoad Capacitance, from 100 MHz to 133 MHz 15 pF
CIN Input Capacitance (Note 6) 7pF
6. Applies to both REF Clock and FBK.
Table 6. ELECTRICAL CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0 V, TA=--40Cto+85C
Parameter Description Test Conditions Min Max Unit
VIL Input LOW Voltage 0.8 V
VIH Input HIGH Voltage 2.0 V
IIL Input LOW Current VIN =0V 50.0 mA
IIH Input HIGH Current VIN =V
DD 100.0 mA
VOL Output LOW Voltage IOL = 8 mA (--1, --2, --3, --4)
IOL =12mA(--1H,--5H)
0.4 V
VOH Output HIGH Voltage IOH = --8 mA (--1, --2, --3, --4)
IOH = --12 mA (--1H, --5H)
2.4 V
IDD Supply Current (Note 7) Unloaded outputs 100 MHz REF -- 2 , -- 3 , -- 4 49 mA
Select inputs at VDD or GND -- 1 H , -- 5 H 60 mA
Unloaded outputs, 66 MHz REF
(--1, --2, --3, --4)
34 mA
Unloaded outputs, 33 MHz REF
(--1, --2, --3, --4)
18 mA
7. Supply currents are measured for PLL--Bypass Mode (S2 = 1, S1 = 0).
NB2308A
http://onsemi.com
5
Table 7. SWITCHING CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0 V, TA=--40Cto+85C
Parameter Description Test Conditions Min Typ Max Unit
t1Output Frequency 30 pF load (all devices)
15 pF load (--1H, --5H)
15 pF load (--1, --2, --3, --4)
15
15
15
100
133.3
133.3
MHz
t1Duty Cycle = (t2/t
1) * 100
(all devices)
Measured at 1.4 V, FOUT = < 66.66 MHz
30 pF load
40.0 50.0 60.0 %
Measured at 1.4 V, FOUT =<50MHz
15 pF load
45.0 50.0 55.0
t3Output Rise Time
(--1, --2, --3, --4)
Measured between 0.8 V and 2.0 V
30 pF load
2.20 ns
Measured between 0.8 V and 2.0 V
15 pF load
1.50
Output Rise Time
(--1H, --5H)
Measured between 0.8 V and 2.0 V
30 pF load
1.50
t4Output Fall Time
(--1, --2, --3, --4)
Measured between 2.0 V and 0.8 V
30 pF load
2.20 ns
Measured between 0.8 V and 2.0 V
15 pF load
1.50
Output Fall Time
(--1H, --5H)
Measured between 2.0 V and 0.8 V
30 pF load
1.25
t5Output--to--Output Skew on same Bank
(--1, --2, --3, --4)
All outputs equally loaded 200 ps
Output--to--Output Skew
(--1H, --5H)
All outputs equally loaded 200
Output Bank A--to--Output Bank B Skew
(--1, --4, --5H)
All outputs equally loaded 200
Output Bank A--to--Output Bank B Skew
(--2, --3)
All outputs equally loaded 400
t6Delay, REF Rising Edge to FBK
Rising Edge
Measured at VDD/2 0250 ps
t7Device--to--Device Skew Measured at VDD/2 on the FBK pins of the
device
0700 ps
tJCycle--to--Cycle Jitter
(--1, --1H, --4, --5H)
Measured at 66.67 MHz, loaded outputs,
15 pF load
200 ps
Measured at 66.67 MHz, loaded outputs,
30 pF load
200
Measured at 133.3 MHz, loaded outputs
15 pF load
100
Cycle--to--Cycle Jitter
(--2, --3)
Measured at 66.67 MHz, loaded outputs,
30 pF load
400
Measured at 66.67 MHz, loaded outputs,
15 pF load
400
tLOCK PLL Lock Time Stable power supply, valid clock presented
on REF and FBK pins
1.0 ms
NB2308A
http://onsemi.com
6
Zero Delay and Skew Control
All outputs should be uniformly loaded to achieve Zero
Delay between input and output.
Figure 3. REF Input to CLKA/CLKB Delay vs.
Difference in Loading between FBK Pin and
CLKA/CLKB Pins
1500
1000
500
0
--500
--1000
--1500
-- 3 0 -- 2 5 -- 2 0 -- 1 5 -- 1 0 -- 5 0 5 1 0 1 5 2 0 2 5 3 0
REF INPUT TO CLKA/CLKB DELA
Y
(ps)
OUTPUT LOAD DIFFERENCE: FBK LOAD -- CLKA/CLKB LOAD (pF)
To close the feedback loop of the NB2308A, the FBK pin
can be driven from any of the eight available output pins.
The output driving the FBK pin will be driving a total load
of 7 pF plus any additional load that it drives. The relative
loading of this output (with respect to the remaining outputs)
can adjust the input--output delay. This is shown in Figure 3.
For applications requiring zero input--output delay, all
outputs including the one providing feedback should be
equally loaded. If input--output delay adjustments are
required, use the above graph to calculate loading
differences between the feedback output and remaining
outputs. For zero output--output skew, be sure to load
outputs equally.
SWITCHING WAVEFORMS
Figure 4. Duty Cycle Timing
1.4 V 1.4 V 1.4 V
t1
t2
Figure 5. All Outputs Rise/Fall Time
t3
OUTPUT
2.0 V
0.8 V
t4
2.0 V
0.8 V
3.3 V
0V
1.4 V
1.4 V
t5
Figure 6. Output -- Output Skew
OUTPUT
OUTPUT
t6
INPUT
OUTPUT
Figure 7. Input -- Output Propagation Delay
VDD
2
VDD
2
Figure 8. Device -- Device Skew
t7
FBK_Device 1
VDD
2
VDD
2
FBK_Device 2
NB2308A
http://onsemi.com
7
TEST CIRCUITS
VDD
VDD
CLOAD
GND GND
OUTPUTS
Figure 9. Test Circuit #1
10 pF
0.1 mF
0.1 mF
VDD
VDD
GND GND
OUTPUTS
0.1 mF
0.1 mF
1kΩ
1kΩ
Figure 10. Test Circuit #2
For parameter t8(output slew rate) on --1H devices
VDD
CLKOUT
Figure 11. NB2308AI1 and NB2308AI1H Figure 12. NB2308AI2
BLOCK DIAGRAMS
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL MUX
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
R
EF
S2
S1
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
REF
S2
S1 ÷2
MUX
NB2308A
http://onsemi.com
8
Figure 13. NB2308AI3 Figure 14. NB2308AI4
Figure 15. NB2308AI5H
BLOCK DIAGRAMS
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
R
EF
S2
S1 ÷2
÷2
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
REF
S2
S1
÷2
FBK
CLKA1
CLKA2
CLKA3
CLKA4
PLL
CLKB1
CLKB2
CLKB3
CLKB4
SELECT INPUT
DECODING
REF
S2
S1
÷2
MUX
MUX
MUX
NB2308A
http://onsemi.com
9
ORDERING INFORMATION
Device Marking Operating Range Package ShippingAvailability
NB2308AI1DG 2308AI1G Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI1DR2G 2308AI1G Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI1HDG 2308AI1HG Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI1HDR2G 2308AI1HG Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI1DTG 2308
AI1
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI1DTR2G 2308
AI1
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI1HDTG 2308
AI1H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI1HDTR2G 2308
AI1H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI2DG 2308AI2G Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI2DR2G 2308AI2G Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI2DTG 2308
AI2
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI2DTR2G 2308
AI2
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI2HDG 2308AI2HG Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI2HDR2G 2308AI2HG Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI2HDTG 2308
AI2H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI2HDTR2G 2308
AI2H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI3DG 2308AI3G Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI3DR2G 2308AI3G Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI3DTG 2308
AI3
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI3DTR2G 2308
AI3
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI4DG 2308AI4G Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI4DR2G 2308AI4G Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI4DTG 2308
AI4
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI4DTR2G 2308
AI4
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
NB2308A
http://onsemi.com
10
ORDERING INFORMATION
Device AvailabilityShipping
PackageOperating RangeMarking
NB2308AI5HDG 2308AI5HG Industrial &
Commercial
SOIC--16
(Pb--Free)
48 Units / Rail Now
NB2308AI5HDR2G 2308AI5HG Industrial &
Commercial
SOIC--16
(Pb--Free)
2500 Tape & Reel Now
NB2308AI5HDTG 2308
AI5H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
96 Units / Rail Now
NB2308AI5HDTR2G 2308
AI5H
Industrial &
Commercial
TSSOP--16
(Pb--Free)
2500 Tape & Reel Now
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
NB2308A
http://onsemi.com
11
PACKAGE DIMENSIONS
TSSOP--16
CASE 948F--01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C-- -- -- 1 . 2 0 -- -- -- 0 . 0 4 7
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.18 0.28 0.007 0.011
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0808
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE --W--.
____
SECTION N--N
SEATING
PLANE
IDENT.
PIN 1
18
16 9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
-- U --
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
-- T --
-- V --
-- W --
0.25 (0.010)
16X REFK
N
N
7.06
16X
0.36 16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NB2308A
http://onsemi.com
12
PACKAGE DIMENSIONS
SOIC--16
CASE 751B--05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
RX45
_
G
8PLP
-- B --
-- A --
M
0.25 (0.010) B S
-- T --
D
K
C
16 PL
S
B
M
0.25 (0.010) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.80 10.00 0.386 0.393
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0707
P5.80 6.20 0.229 0.244
R0.25 0.50 0.010 0.019
____
6.40
16X
0.58
16X 1.12
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
16
89
8X
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an
Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800--282--9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81--3--5773--3850
NB2308A/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303--675--2175 or 800--344--3860 Toll Free USA/Canada
Fax: 303--675--2176 or 800--344--3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website:www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loca
l
Sales Representative