ADG811YRU-REEL - Analog Devices, Inc.

<0.5 Ω CMOS, 1.65 V to 3.6 V,

Quad SPST Switches

ADG811/ADG812/ADG813

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

0.5 Ω typical on resistance

0.8 Ω maximum on resistance at 125°C

1.65 V to 3.6 V operation

Automotive temperature range: −40°C to +125°C

High current carrying capability: 300 mA continuous

Rail-to-rail switching operation

Fast switching times: <25 ns

Typical power consumption <0.1 μW

APPLICATIONS

Cellular phones

MP3 players

Power routing

Battery-powered systems

PCMCIA cards

Modems

Audio and video signal routing

Communications systems

GENERAL DESCRIPTION

The ADG811/ADG812/ADG813 are low voltage CMOS devices

containing four independently selectable switches. These switches

offer ultralow on resistance of less than 0.8 Ω over the full

temperature range. The digital inputs can handle 1.8 V logic

with a 2.7 V to 3.6 V supply.

These devices contain four independent single-pole/single-

throw (SPST) switches. The ADG811 and ADG812 differ only

in that the digital control logic is inverted. The ADG811

switches are turned on with a logic low on the appropriate

control input, while a logic high is required to turn on the

switches of the ADG812. The ADG813 contains two switches

whose digital control logic is similar to the ADG811, while the

logic is inverted on the other two switches.

Each switch conducts equally well in both directions when on

and has an input signal range that extends to the supplies. The

ADG813 exhibits break-before-make switching action.

The ADG811/ADG812/ADG813 are fully specified for 3.3 V,

2.5 V, and 1.8 V supply operation. The ADG811 is available in a

16-lead TSSOP package and a 16-lead LFCSP package, and the

ADG812/ADG813 are available in a 16-lead TSSOP package.

FUNCTIONAL BLOCK DIAGRAMS

IN1

IN2

IN3

IN4

ADG811

SWITCHES SHOWN FOR A LOGIC 1 INPUT

IN1

IN2

IN3

IN4

ADG812

IN1

IN2

IN3

IN4

ADG813

04306-A-001

Figure 1.

PRODUCT HIGHLIGHTS

1. <0.8 Ω over full temperature range of −40°C to +125°C.

2. Single 1.65 V to 3.6 V operation.

3. Operational with 1.8 V CMOS logic.

4. High current handling capability (300 mA continuous

current at 3.3 V).

5. Low THD + N (0.02% typical).

6. Small 3 mm × 3 mm LFCSP package and 16-lead TSSOP

package.

ADG811/ADG812/ADG813

Rev. B | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3 

Absolute Maximum Ratings ............................................................ 6

ESD Caution .................................................................................. 6

Pin Configurations and Function Descriptions ............................7

Typical Performance Characteristics ..............................................8

Test Circuits ..................................................................................... 11

Terminology .................................................................................... 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 15

REVISION HISTORY

11/09—Rev. A to Rev. B

Added 16-Lead LFCSP ....................................................... Universal

Changes to Table 4 ............................................................................ 6

Changes to Pin Configurations and Function Description

Section ................................................................................................ 7

Moved Terminology Section ......................................................... 13

Updated Outline Dimensions ....................................................... 14

Changes to Ordering Guide .......................................................... 15

5/04—Rev. 0 to Rev. A

Updated Format .................................................................. Universal

Updated Package Choices ................................................. Universal

11/03—Revision 0: Initial Version

ADG811/ADG812/ADG813

Rev. B | Page 3 of 16

SPECIFICATIONS

VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Temperature range for the Y version is −40°C to +125°C.

Table 1.

Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V

On Resistance, RON 0.5 Ω typ

VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA;

see Figure 19

0.65 0.75 0.8 Ω max

On Resistance Match Between

Channels, ΔRON

0.04 Ω typ VDD = 2.7 V, VS = 0.5 V, IS = 10 mA

0.075 0.08 Ω max

On Resistance Flatness, RFLAT (ON) 0.1 Ω typ VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA

0.15 0.16 Ω max

LEAKAGE CURRENTS VDD = 3.6 V

Source Off Leakage, IS (Off) ±0.2 nA typ VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V;

see Figure 20

±1 ±8 ±80 nA max

Drain Off Leakage, ID (Off) ±0.2 nA typ VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V;

see Figure 20

±1 ±8 ±80 nA max

Channel On Leakage, ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 3.3 V; see Figure 21

±1 ±15 ±90 nA max

DIGITAL INPUTS

Input High Voltage, VINH 2 V min

Input Low Voltage, VINL 0.8 V max

Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH

±0.1 μA max

CIN, Digital Input Capacitance 6 pF typ

DYNAMIC CHARACTERISTICS1

tON 21 ns typ RL = 50 Ω, CL = 35 pF

25 26 28 ns max VS = 1.5 V/0 V; see Figure 22

tOFF 4 ns typ RL = 50 Ω, CL = 35 pF

5 6 7 ns max VS = 1.5 V; see Figure 22

Break-Before-Make Time Delay, tBBM

(ADG813 Only)

17 ns typ RL = 50 Ω, CL = 35 pF

5 ns min VS1 = VS2 = 1.5 V; see Figure 23

Charge Injection 30 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF;

see Figure 24

Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

see Figure 25

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

see Figure 27

Total Harmonic Distortion (THD + N) 0.02 % RL = 32 Ω, f = 20 Hz to 20 kHz,

VS = 2 V p-p

Insertion Loss −0.05 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz

−3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26

CS (Off) 30 pF typ

CD (Off) 35 pF typ

CD, CS (On) 60 pF typ

POWER REQUIREMENTS VDD = 3.6 V

IDD 0.003 μA typ Digital inputs = 0 V or 3.6 V

1.0 4 μA max

1 Guaranteed by design, but not subject to production test.

ADG811/ADG812/ADG813

Rev. B | Page 4 of 16

VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted. Temperature range for the Y version is −40°C to +125°C.

Table 2.

Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V

On Resistance, RON 0.65 Ω typ

VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA;

see Figure 19

0.72 0.8 0.88 Ω max

On Resistance Match Between

Channels, ΔRON

0.04 Ω typ VDD = 2.3 V, VS = 0.55 V, IS = 10 mA

0.08 0.085 Ω max

On Resistance Flatness, RFLAT (ON) 0.16 Ω typ VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA

0.23 0.24 Ω max

LEAKAGE CURRENTS VDD = 2.7 V

Source Off Leakage, IS (Off) ±0.2 nA typ VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V;

see Figure 20

±1 ±6 ±35 nA max

Drain Off Leakage, ID (Off) ±0.2 nA typ VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V;

see Figure 20

±1 ±6 ±35 nA max

Channel On Leakage, ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 2.4 V; see Figure 21

±1 ±11 ±70 nA max

DIGITAL INPUTS

Input High Voltage, VINH 1.7 V min

Input Low Voltage, VINL 0.7 V max

Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH

±0.1 μA max

CIN, Digital Input Capacitance 6 pF typ

DYNAMIC CHARACTERISTICS1

tON 22 ns typ RL = 50 Ω, CL = 35 pF

27 29 30 ns max VS = 1.5 V/ 0 V; see Figure 22

tOFF 4 ns typ RL = 50 Ω, CL = 35 pF

6 7 8 ns max VS = 1.5 V; see Figure 22

Break-Before-Make Time Delay, tBBM

(ADG813 Only)

18 ns typ RL = 50 Ω, CL = 35 pF

5 ns min VS1 = VS2 = 1.5 V; see Figure 23

Charge Injection 25 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF;

see Figure 24

Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

see Figure 25

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

see Figure 27

Total Harmonic Distortion (THD + N) 0.022 % RL = 32 Ω, f = 20 Hz to 20 kHz,

VS = 1.5 V p-p

Insertion Loss −0.06 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz

−3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26

CS (Off) 32 pF typ

CD (Off) 37 pF typ

CD, CS (On) 60 pF typ

POWER REQUIREMENTS VDD = 2.7 V

IDD 0.003 μA typ Digital inputs = 0 V or 2.7 V

1.0 4 μA max

1 Guaranteed by design, but not subject to production test.

ADG811/ADG812/ADG813

Rev. B | Page 5 of 16

VDD = 1.65 V to 1.95 V, GND = 0 V, unless otherwise noted. Temperature range for the Y version is −40°C to +125°C.

Table 3.

Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V

On Resistance, RON 1 Ω typ

VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA;

see Figure 19

1.4 2.2 2.2 Ω max

2.5 4 4 Ω max VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA

On Resistance Match Between

Channels, ΔRON

0.1 Ω typ VDD = 1.65 V, VS = 0.7 V, IS = 10 mA

LEAKAGE CURRENTS VDD = 1.95 V

Source Off Leakage IS (Off) ±0.2 nA typ VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V;

see Figure 20

±1 ±5 ±30 nA max

Drain Off Leakage ID (Off) ±0.2 nA typ VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V;

see Figure 20

±1 ±5 ±30 nA max

Channel On Leakage ID, IS (On) ±0.2 nA typ VS = VD = 0.6 V or 1.65 V; see Figure 21

±1 ±9 ±60 nA max

DIGITAL INPUTS

Input High Voltage, VINH 0.65VDD V min

Input Low Voltage, VINL 0.35VDD V max

Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH

±0.1 μA max

CIN, Digital Input Capacitance 6 pF typ

DYNAMIC CHARACTERISTICS1

tON 27 ns typ RL = 50 Ω, CL = 35 pF

35 36 37 ns max VS = 1.5 V/ 0 V; see Figure 22

tOFF 6 ns typ RL = 50 Ω, CL = 35 pF

8 9 10 ns max VS = 1.5 V; see Figure 22

Break-Before-Make Time Delay, tBBM

(ADG813 Only)

20 ns typ RL = 50 Ω, CL = 35 pF

5 ns min VS1 = VS2 = 1 V; see Figure 23

Charge Injection 15 pC typ VS = 1 V, RS = 0 Ω, CL = 1 nF;

see Figure 24

Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

Figure 25

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;

see Figure 27

Total Harmonic Distortion (THD + N) 0.14 % RL = 32 Ω, f = 20 Hz to 20 kHz,

VS = 1.2 V p-p

Insertion Loss −0.08 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz

–3 dB Bandwidth 90 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 26

CS (Off) 32 pF typ

CD (Off) 38 pF typ

CD, CS (On) 60 pF typ

POWER REQUIREMENTS VDD = 1.95 V

IDD 0.003 μA typ Digital inputs = 0 V or 1.95 V

1.0 4 μA max

1 Guaranteed by design, but not subject to production test.

ADG811/ADG812/ADG813

Rev. B | Page 6 of 16

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameter Rating

VDD to GND −0.3 V to +4.6 V

Analog Inputs1 −0.3 V to VDD + 0.3 V

Digital Inputs1 GND − 0.3 V to 4.6 V or

10 mA, whichever occurs first

Peak Current, S or D (Pulsed at 1 ms, 10%

duty-cycle maximum)

3.3 V Operation 500 mA

2.5 V Operation 460 mA

1.8 V Operation 420 mA

Continuous Current, S or D

3.3 V Operation 300 mA

2.5 V Operation 275 mA

1.8 V Operation 250 mA

Operating Temperature Range,

Automotive (Y Version)

−40°C to +125°C

Storage Temperature Range −65°C to +150°C

Junction Temperature 150°C

TSSOP Package

θJA Thermal Impedance 150°C/W

θJC Thermal Impedance 27°C/W

LFCSP Package

θJA Thermal Impedance 70°C/W

IR Reflow, Peak Temperature <20 sec 235°C

1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be

limited to the maximum ratings given.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Only one absolute maximum rating may be applied at any one

time.

Table 5. ADG811/ADG812 Truth Table

ADG811 IN ADG812 IN Switch Condition

0 1 On

1 0 Off

Table 6. ADG813 Truth Table

Logic Switch 1, Switch 4 Switch 2, Switch 3

0 Off On

1 On Off

ESD CAUTION

ADG811/ADG812/ADG813

Rev. B | Page 7 of 16

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

NC = NO CONNECT

IN1

IN4

GND

VDD

IN2

IN3

TOP VIEW

(Not to Scale)

ADG811/

ADG812/

ADG813

04306-A-002

Figure 2. ADG811/ADG812/ADG813 Pin Configuration (16-Lead TSSOP)

Table 7. ADG811/ADG812/ADG813 Pin Configuration

(16-Lead TSSOP)

Pin No. Mnemonic Definition

1 IN1 Logic control input.

2 D1 Drain Terminal. This pin may be an

input or output.

3 S1 Source Terminal. This pin may be an

input or output.

4 NC No Connect.

5 GND Ground (0 V) reference.

6 S4 Source Terminal. This pin may be an

input or output.

7 D4 Drain Terminal. This pin may be an

input or output.

8 IN4 Logic Control Input.

9 IN3 Logic Control Input.

10 D3 Drain Terminal. This pin may be an

input or output.

11 S3 Source Terminal. This pin may be an

input or output.

12 NC No Connect.

13 VDD Most Positive Power Supply Potential.

14 S2 Source Terminal. This pin may be an

input or output.

15 D2 Drain Terminal. This pin may be an

input or output.

16 IN2 Logic Control Input.

04306-027

PIN 1

INDICATOR

NOTES

1. NC = NO CONNE CT .

2. CONNECT EXPOSED PAD TO G ND.

1S1

2NC 3GND 4S4

11 VDD

12 S2

10 NC

9S3

IN4 7

IN3 8

15 IN1

16 D1

14 IN2

13 D2

ADG811

TOP VIEW

(No t to Scale)

Figure 3. ADG811 Pin Configuration (16-Lead LFCSP)

Table 8. ADG811 Pin Configuration

(16-Lead LFCSP)

Pin No. Mnemonic Definition

1 S1 Source Terminal. This pin may be an

input or output.

2 NC No Connect.

3 GND Ground (0 V) Reference.

4 S4 Source Terminal. This pin may be an

input or output.

5 D4 Drain Terminal. This pin may be an

input or output.

6 IN4 Logic Control Input.

7 IN3 Logic Control Input.

8 D3 Drain Terminal. This pin may be an

input or output.

9 S3 Source Terminal. This pin may be an

input or output.

10 NC No Connect.

11 VDD Most Positive Power Supply Potential.

12 S2 Source Terminal. This pin may be an

input or output.

13 D2 Drain Terminal. This pin may be an

input or output.

14 IN2 Logic Control Input.

15 IN1 Logic Control Input.

16 D1 Drain Terminal. This pin may be an

input or output.

EPAD Connect exposed pad to GND.

ADG811/ADG812/ADG813

Rev. B | Page 8 of 16

TYPICAL PERFORMANCE CHARACTERISTICS

0.60

0.55

0.50

0.45

ON RESISTANCE (Ω)

0.40

0.35

0.30

0.25

0.200 0.5 1.0 1.5 2.0 2.5 3.0 3.5

, V

(V)

= 2.7V

= 3V

= 25°C

= 3.6V V

= 3.3V

04306-A-003

Figure 4. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V

, V

(V)

ON RESISTANCE (Ω)

04306-A-004

0.8

0.3

0.4

0.5

0.6

0.7

0.20 0.5 2.52.01.51.0

= 25°C

= 2.3V

= 2.5V

= 2.7V

Figure 5. On Resistance vs. VD (VS), VDD = 2.5 V ± 0.2 V

, V

(V)

ON RESISTANCE (Ω)

04306-A-005

1.8

0.4

0.6

0.8

1.0

1.2

1.4

1.6

0.20 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

= 25°C

= 1.8V

= 1.65V

= 1.95V

Figure 6. On Resistance vs. VD (VS), VDD = 1.8 V ± 0.15 V

, V

(V)

ON RESISTANCE (Ω)

04306-A-006

1.2

0.2

0.4

0.6

0.8

1.0

00 3.02.52.01.51.00.5

+125°C

+85°C

+25°C

–40°C

= 3.3V

Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V

, V

(V)

ON RESISTANCE (Ω)

04306-A-007

1.2

0.2

0.4

0.6

0.8

1.0

00 2.52.01.51.00.5

+125°C

+25°C

= 2.5V

+85°C

–40°C

Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V

, V

(V)

ON RESISTANCE (Ω)

04306-A-008

1.4

0.2

0.4

0.6

0.8

1.0

1.2

00 1.80.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

+25°C

–40°C

+85°C

+125°C

= 1.8V

Figure 9. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V

ADG811/ADG812/ADG813

Rev. B | Page 9 of 16

TEMPERATURE (°C)

CURRENT (nA)

04306-A-009

–80

–70

–60

–50

–40

–30

–20

–10

120100806040200 140

ID (OFF)

ID, IS (ON)

VDD = 3.3V

IS (OFF)

Figure 10. Leakage Current vs. Temperature, VDD = 3.3 V

TEMPERATURE (°C)

CURRENT (nA)

04306-A-010

–60

–50

–40

–30

–20

–10

ID, IS (ON)

VDD = 2.5V

IS (OFF)

ID (OFF)

120100806040200 140

Figure 11. Leakage Current vs. Temperature, VDD = 2.5 V

TEMPERAT URE (°C)

CURRENT ( n A)

04306-A-011

–60

–50

–40

–30

–20

–10

, I

(ON)

(OFF)

(OFF )

= 1.8V

120100806040200 140

Figure 12. Leakage Current vs. Temperature, VDD = 1.8 V

(V)

INJ

(pC)

04306-A-012

100

120

2.52.01.0 1.50 0.5 3.0 3.5 4.0

= 25°C

= 2.5V

= 3.6V

= 1.8V

Figure 13. Charge Injection (QINJ) vs. Source Voltage (VS)

TEMPERATURE (°C)

TIME (ns)

04306-A-013

OFF

= 3V

= 2.5V V

= 1.8V

= 2.5V

= 1.8V

60 80 100 1204020–20–40 0

Figure 14. tON/tOFF Times vs. Temperature

FREQUENCY (MHz)

ATTENUATION (dB)

04306-A-014

–10

–8

–4

–2

–6

–9

–5

–3

–1

–7

0.01 0.1 1000100101

= 3.3V/2.5V/1.8V

= 25°C

Figure 15. On Response vs. Frequency

ADG811/ADG812/ADG813

Rev. B | Page 10 of 16

FREQUENCY (MHz)

ATTENUATION (dB)

04306-A-015

–90

–80

–70

–60

–50

–40

–30

–20

–10

0.01 0.1 1000100101

= 3.3V/2.5V/1.8V

= 25°C

Figure 16. Crosstalk vs. Frequency

FREQUENCY (MHz)

ATTENUATION (dB)

04306-A-016

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

0.01 0.1 1000100101

= 3.3V/2.5V/1.8V

= 25°C

Figure 17. Off Isolation vs. Frequency

FREQUENCY (Hz)

THD+N (%)

04306-A-017

0.02

0.04

0.05

0.06

0.08 V

= 2.5V

= 25°C

LOAD

1.5V p-p

20 50 100 200 500 1k 2k 5k 10k 20k

Figure 18. Total Harmonic Distortion + Noise (THD + N) vs. Frequency

ADG811/ADG812/ADG813

Rev. B | Page 11 of 16

TEST CIRCUITS

= V1/I

04306-A-018

Figure 19. On Resistance

(OFF) I

(OFF)

A A

04306-A-019

Figure 20. Off Leakage

(ON)

NC SD

04306-A-020

Figure 21. On Leakage

GND

50Ω

35pF

OUT

OFF

50% 50%

90% 90%

50% 50%

0.1μF

ADG811

ADG812

04306-A-021

Figure 22. Switching Times

IN1, IN2

S1 D1

0.1μF

GND

50Ω

S2 D2

OUT2

OUT1

35pF

OUT

tBBM tBBM

50% 50%

80%

04306-A-022

Figure 23. Break-Before-Make Time Delay, tBBM (ADG813 Only)

GND

1nF

OUT

SW ON

INJ

= C

×ΔV

OUT

SW OFF

ΔV

OUT

04306-A-023

Figure 24. Charge Injection

ADG811/ADG812/ADG813

Rev. B | Page 12 of 16

NETWORK

ANALYZER

GND

0.1μF

50Ω

OFF ISOLATION = 20 LOG V

OUT

04306-A-024

Figure 25. Off Isolation

NETWORK

ANALYZER

GND

0.1μF

50Ω

INSERTION LOSS = 20 LOG V

OUT

WITH SWITCH

OUT

WITHOUT SWITCH

04306-A-025

Figure 26. Bandwidth

GND

OUT

0.1μF

50Ω

CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG V

OUT

NETWORK

ANALYZER

04306-A-026

Figure 27. Channel-to-Channel Crosstalk

ADG811/ADG812/ADG813

Rev. B | Page 13 of 16

TERMINOLOGY

IDD

Positive supply current.

VD, VS

Analog voltage on Terminal D, Terminal S.

RON

Ohmic resistance between D and S.

RFLAT (ON)

Flatness is defined as the difference between the maximum and

minimum value of on resistance as measured over the specified

analog signal range.

ΔRON

On resistance match between any two channels, that is,

RON maximum − RON minimum.

IS (Off)

Source leakage current with the switch off.

ID (Off)

Drain leakage current with the switch off.

ID, IS (On)

Channel leakage current with the switch on.

VINL

Maximum input voltage for Logic 0.

VINH

Minimum input voltage for Logic 1.

IINL (IINH)

Input current of the digital input.

CS (Off)

Off switch source capacitance. Measured with reference to

ground.

CD (Off)

Off switch drain capacitance. Measured with reference to

ground.

CD, CS (On)

On switch capacitance. Measured with reference to ground.

CIN

Digital input capacitance.

tON

Delay time between the 50% and the 90% points of the digital

input and switch on condition.

tOFF

Delay time between the 50% and the 90% points of the digital

input and switch off condition.

tBBM

On or off time measured between the 80% points of both

switches, when switching from one to another.

Charge Injection

A measure of the glitch impulse transferred from the digital

input to the analog output during on-to-off switching.

Off Isolation

A measure of unwanted signal coupling through an off switch.

Crosstalk

A measure of unwanted signal that is coupled through from one

channel to another because of parasitic capacitance.

−3 dB Bandwidth

The frequency at which the output is attenuated by 3 dB.

On Response

The frequency response of the on switch.

Insertion Loss

The loss due to the on resistance of the switch.

THD + N

The ratio of the harmonic amplitudes plus noise of a signal to

the fundamental.

ADG811/ADG812/ADG813

Rev. B | Page 14 of 16

OUTLINE DIMENSIONS

16 9

PIN 1

SEATING

PLANE

8°

0°

4.50

4.40

4.30

6.40

BSC

5.10

5.00

4.90

0.65

BSC

0.15

0.05

1.20

MAX 0.20

0.09 0.75

0.60

0.45

0.30

0.19

COPLANARITY

0.10

COM PLI ANT T O JEDEC S TANDARDS MO-153-AB

Figure 28. 16-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-16)

Dimensions shown in millimeters

0.50

BSC

0.60 MA X PIN 1

INDICATOR

1.50 RE F

0.50

0.40

0.30

0.25 M IN

0.45

2.75

BSC SQ

TOP

VIEW

12° MAX 0.80 MA X

0.65 TYP

SEATING

PLANE

PIN 1

INDICATOR

1.00

0.85

0.80

0.30

0.23

0.18

0.05 M A X

0.02 NOM

0.20 RE F

3.00

BSC S Q

*1.45

1.30 SQ

1.15

EXPOSED

PAD

(BOTTOM VIEW)

*COMPLIANT

JEDEC STANDARDS MO-220- V E E D- 2

EXCEP T F O R EXP O S ED PAD DI ME NSIO N.

072208-A

FOR PRO PER CONNECTI ON OF

THE EXPOSED PAD, REFER TO

THE P IN CONFI GURATION AND

FUNCT ION DESCRIP TIONS

SECTION OF THIS DATA SHEET.

Figure 29. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

3 mm × 3 mm Body, Very Thin Quad

(CP-16-2)

Dimensions shown in millimeters

ADG811/ADG812/ADG813

Rev. B | Page 15 of 16

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADG811YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG811YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG811YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG811YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG811YCPZ-REEL1 –40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-2

ADG811YCPZ-REEL71 –40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-2

ADG812YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG812YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG812YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG812YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG812YRUZ-REEL71 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG813YRU –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG813YRU-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG813YRU-REEL7 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

ADG813YRUZ1 –40°C to +125°C 16-Lead Thin Shrink Small Outline [TSSOP] RU-16

1 Z = RoHS Compliant Part.

ADG811/ADG812/ADG813

Rev. B | Page 16 of 16

NOTES

registered trademarks are the property of their respective owners.

D04306-0-11/09(B)