REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADR420/ADR421/ADR423/ADR425
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Ultraprecision Low Noise, 2.048 V/2.500 V/
3.00 V/5.00 V XFET
®
Voltage References
PIN CONFIGURATION
Surface-Mount Packages
8-Lead SOIC
8-Lead Mini_SOIC
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
TP
VIN
NIC
GND
TP
NIC
VOUT
TRIM
ADR42x
FEATURES
Low Noise (0.1 Hz to 10 Hz)
ADR420: 1.75 V p-p
ADR421: 1.75 V p-p
ADR423: 2.0 V p-p
ADR425: 3.4 V p-p
Low Temperature Coefficient: 3 ppm/C
Long-Term Stability: 50 ppm/1000 Hours
Load Regulation: 70 ppm/mA
Line Regulation: 35 ppm/V
Low Hysteresis: 40 ppm Typical
Wide Operating Range
ADR420: 4 V to 18 V
ADR421: 4.5 V to 18 V
ADR423: 5 V to 18 V
ADR425: 7 V to 18 V
Quiescent Current: 0.5 mA Maximum
High Output Current: 10 mA
Wide Temperature Range: –40C to +125C
APPLICATIONS
Precision Data Acquisition Systems
High-Resolution Converters
Battery-Powered Instrumentation
Portable Medical Instruments
Industrial Process Control Systems
Precision Instruments
Optical Network Control Circuits
GENERAL DESCRIPTION
The ADR42x series are ultraprecision second-generation XFET
voltage references featuring low noise, high accuracy, and excellent
long-term stability in a SOIC and Mini_SOIC footprints. Patented
temperature drift curvature correction technique and XFET (eXtra
implanted junction FET) technology minimize nonlinearity of the
voltage change with temperature. The XFET architecture offers
superior accuracy and thermal hysteresis to the bandgap
references. It also operates at lower power and lower supply
headroom than the Buried Zener references.
The superb noise, stable, and accurate characteristics of ADR42x
make them ideal for precision conversion applications such as
optical network and medical equipment. The ADR42x trim
terminal can also be used to adjust the output voltage over a
±0.5% range without compromising any other performance. The
ADR42x series voltage references offer two electrical grades and
are specified over the extended industrial temperature range
of –40°C to +125°C. Devices are available in 8-lead SOIC-8 or
30% smaller 8-lead Mini_SOIC-8 packages.
XFET is a registered trademark of Analog Devices, Inc.
Table I. ADR42x Products
Output Initial
ADR420 Voltage Accuracy Tempco
Products V
O
mV % ppm/
°
C
ADR420 2.048 1, 3 0.05, 0.15 3, 10
ADR421 2.50 1, 3 0.04, 0.12 3, 10
ADR423 3.00 1.5, 4 0.04, 0.12 3, 10
ADR425 5.00 2, 6 0.04, 0.12 3, 10
REV. B
–2–
ADR42x–SPECIFICATIONS
ADR420 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.045 2.048 2.051 V
Initial Accuracy V
OERR
–3 +3 mV
–0.15 +0.15 %
Output Voltage B Grade V
O
2.047 2.048 2.049 V
Initial Accuracy V
OERR
–1 +1 mV
–0.05 +0.05 %
Temperature Coefficient A Grade TCV
O
–40°C < T
A
< +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
V
IN
= 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 1.75 µV p-p
Voltage Noise Density e
N
1 kHz 60 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
ADR421 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.497 2.500 2.503 V
Initial Accuracy V
OERR
–3 +3 mV
–0.12 +0.12 %
Output Voltage B Grade V
O
2.499 2.500 2.501 V
Initial Accuracy V
OERR
–1 +1 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < T
A
< +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
V
IN
= 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 1.75 µV p-p
Voltage Noise Density e
N
1 kHz 80 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
REV. B –3–
ADR420/ADR421/ADR423/ADR425
ADR423 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
2.996 3.000 3.004 V
Initial Accuracy V
OERR
–4 +4 mV
–0.13 +0.13 %
Output Voltage B Grade V
O
2.9985 3.000 3.0015 V
Initial Accuracy V
OERR
–1.5 +1.5 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < T
A
< +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
− V
O
2V
Line Regulation ∆V
O
/∆V
IN
V
IN
= 5 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density e
N
1 kHz 90 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
ADR425 ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage A Grade V
O
4.994 5.000 5.006 V
Initial Accuracy V
OERR
–6 +6 mV
–0.12 +0.12 %
Output Voltage B Grade V
O
4.998 5.000 5.002 V
Initial Accuracy V
OERR
–2 +2 mV
–0.04 +0.04 %
Temperature Coefficient A Grade TCV
O
–40°C < T
A
< +125°C 2 10 ppm/°C
B Grade 1 3 ppm/°C
Supply Voltage Headroom V
IN
– V
O
2V
Line Regulation ∆V
O
/∆V
IN
V
IN
= 7 V to 18 V 10 35 ppm/V
–40°C < T
A
< +125°C
Load Regulation ∆V
O
/∆I
LOAD
I
LOAD
= 0 mA to 10 mA 70 ppm/mA
–40°C < T
A
< +125°C
Quiescent Current I
IN
No Load 390 500 µA
–40°C < T
A
< +125°C 600 µA
Voltage Noise e
N
p-p 0.1 Hz to 10 Hz 3.4 µV p-p
Voltage Noise Density e
N
1 kHz 110 nV/√Hz
Turn-On Settling Time t
R
10 µs
Long-Term Stability ∆V
O
1,000 Hours 50 ppm
Output Voltage Hysteresis V
O_HYS
40 ppm
Ripple Rejection Ratio RRR f
IN
= 10 kHz 75 dB
Short Circuit to GND I
SC
27 mA
Specifications subject to change without notice.
(@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
(@ VIN = 7.0 V to 15.0 V, TA = 25C, unless otherwise noted.)
REV. B
–4–
A
DR420/ADR421/ADR423/ADR425
Package Type θ
JA
*
Unit
8-Lead Mini_SOIC (RM) 190 °C/W
8-Lead SOIC (R) 130 °C/W
*θ
JA
is specified for the worst-case conditions, i.e., θ
JA
is specified for device soldered
in circuit board for surface-mount packages.
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
ADR42x . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C
*Absolute maximum ratings apply at 25°C, unless otherwise noted.
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Description
1, 8 TP Test Pin. There are actual connections in TP
pins but they are reserved for factory testing
purposes. Users should not connect any-
thing to TP pins, otherwise the device may
not function properly.
2V
IN
Input Voltage
3, 7 NIC No Internal Connect. NICs have no internal
connections.
4 GND Ground Pin = 0 V
5 TRIM Trim Terminal. It can be used to adjust the
output voltage over a ±0.5% range without
affecting the temperature coefficient.
6V
OUT
Output Voltage
PIN CONFIGURATIONS
Mini_SOIC-8
ADR42x
8
7
6
5
1
2
3
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
TP
V
IN
NIC
GND
TP
NIC
V
OUT
TRIM
SOIC-8
8
7
6
5
TP
NIC
V
OUT
TRIM
ADR42x
1
2
3
4
TP
V
IN
NIC
GND
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
Output Initial Temperature Number of
Temperature
Voltage Accuracy Coefficient Package Package Top Parts per Range
Model V
O
mV % ppm/°C Description Option Mark Reel °C
ADR420AR 2.048 3 0.15 10 SOIC SO-8 ADR420 98 –40 to +125
ADR420AR-Reel7 2.048 3 0.15 10 SOIC SO-8 ADR420 3,000 –40 to +125
ADR420BR 2.048 1 0.05 3 SOIC SO-8 ADR420 98 –40 to +125
ADR420BR-Reel7 2.048 1 0.05 3 SOIC SO-8 ADR420 3,000 –40 to +125
ADR420ARM-Reel7 2.048 3 0.15 10 Mini_SOIC RM-8 R4A 1,000 –40 to +125
ADR421AR 2.50 3 0.12 10 SOIC SO-8 ADR421 98 –40 to +125
ADR421AR-Reel7 2.50 3 0.12 10 SOIC SO-8 ADR421 3,000 –40 to +125
ADR421BR 2.50 1 0.04 3 SOIC SO-8 ADR421 98 –40 to +125
ADR421BR-Reel7 2.50 1 0.04 3 SOIC SO-8 ADR421 3,000 –40 to +125
ADR421ARM-Reel7 2.50 3 0.12 10 Mini_SOIC RM-8 R5A 1,000 –40 to +125
ADR423AR 3.00 4 0.13 10 SOIC SO-8 ADR423 98 –40 to +125
ADR423AR-Reel7 3.00 4 0.13 10 SOIC SO-8 ADR423 3,000 –40 to +125
ADR423BR 3.00 1.5 0.04 3 SOIC SO-8 ADR423 98 –40 to +125
ADR423BR-Reel7 3.00 1.5 0.04 3 SOIC SO-8 ADR423 3,000 –40 to +125
ADR423ARM-Reel7 3.00 4 0.13 10 Mini_SOIC RM-8 1,000 –40 to +125
ADR425AR 5.00 6 0.12 10 SOIC SO-8 ADR425 98 –40 to +125
ADR425AR-Reel7 5.00 6 0.12 10 SOIC SO-8 ADR425 3,000 –40 to +125
ADR425BR 5.00 2 0.04 3 SOIC SO-8 ADR425 98 –40 to +125
ADR425BR-Reel7 5.00 2 0.04 3 SOIC SO-8 ADR425 3,000 –40 to +125
ADR425ARM-Reel7 5.00 6 0.12 10 Mini_SOIC RM-8 R7A 1,000 –40 to +125
ORDERING GUIDE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD42x features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
ADR420/ADR421/ADR423/ADR425
–5–
PARAMETER DEFINITIONS
Temperature Coefficient
The change of output voltage over the operating temperature
range and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:
TCV ppm C VT VT
VCTT
O
OO
O
/()–()
()(–)
°
()
=°× ×
21
21
6
25 10
where
V
O
(25°C) = V
O
at 25°C
V
O
(T
1
) = V
O
at Temperature 1
V
O
(T
2
) = V
O
at Temperature 2.
Line Regulation
The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage
Load Regulation
The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load regulation is
expressed in either microvolts per milliampere, parts-per-million
per milliampere, or ohms of dc output resistance.
Long-Term Stability
Typical shift of output voltage at 25°C on a sample of parts
subjected to operation life test of 1000 hours at 125°C:
∆
∆
VVt Vt
V ppm Vt Vt
Vt
OO O
O
OO
O
=
=×
()– ()
() ()– ()
()
01
01
0
6
10
where
V
O
(t
0
) = V
O
at 25°C at Time 0
V
O
(t
1
) = V
O
at 25°C after 1,000 hours operation at 125°C.
Thermal Hysteresis
Thermal hysteresis is defined as the change of output voltage
after the device is cycled through temperature from +25°C to
–40°C to +125°C and back to +25°C. This is a typical value
from a sample of parts put through such a cycle.
VVCV
V ppm VCV
VC
O HYS O O TC
O HYS
OOTC
O
__
_
_
()–
() ()–
()
=°
=°
°×
25
25
25 106
where
V
O
(25°C) = V
O
at 25°C
V
O_TC
= V
O
at 25°C after temperature cycle at +25°C to –40°C
to +125°C and back to +25°C.
Input Capacitor
Input capacitors are not required on the ADR42x. There is no
limit for the value of the capacitor used on the input, but a 1 µF to
10 µF capacitor on the input will improve transient response in
applications where the supply suddenly changes. An additional
0.1 µF in parallel will also help to reduce noise from the supply.
Output Capacitor
The ADR42x does not need output capacitors for stability
under any load condition. An output capacitor, typically 0.1 µF,
will filter out any low-level noise voltage and will not affect
the operation of the part. On the other hand, the load transient
response can be improved with an additional 1 µF to 10 µF
output capacitor in parallel. A capacitor here will act as a source
of stored energy for sudden increase in load current. The only
parameter that will degrade, by adding an output capacitor, is
turn-on time and it depends on the size of the capacitor chosen.
REV. B
–6–
A
DR420/ADR421/ADR423/ADR425
A
DR42x Series
–Typical Performance Characteristics
2.0495
2.0493
2.0491
2.0489
2.0487
2.0485
2.0483
2.0481
2.0479
2.0477
2.0475
–40 –10 20 50 80 110 125
TEMPERATURE – C
V
OUT
– V
TPC 1. ADR420 Typical Output Voltage vs. Temperature
2.4995
2.4997
2.4999
2.5001
2.5003
2.5005
2.5007
2.5009
2.5011
2.5013
2.5015
–40 –10 20 50 80 110 125
TEMPERATURE – C
V
OUT
– V
TPC 2. ADR421 Typical Output Voltage vs. Temperature
TEMPERATURE – C
–40
V
OUT
– V
3.0010
3.0008
3.0006
3.0004
3.0002
3.0000
2.9998
2.9996
2.9994
2.9992
2.9990 –10 20 40 80 110 125
TPC 3. ADR423 Typical Output Voltage vs. Temperature
TEMPERATURE – C
–40
VOUT – V
5.0025
5.0023
5.0021
5.0019
5.0017
5.0015
5.0013
5.0011
5.0009
5.0007
5.0005 –10 20 40 80 110 125
TPC 4. ADR425 Typical Output Voltage vs. Temperature
INPUT VOLTAGE – V
0.25 4
SUPPLY CURRENT – mA
6 8 10 12 14 15
0.30
0.35
0.40
0.45
0.50
0.55
+125C
+25C
–40C
TPC 5. ADR420 Supply Current vs. Input Voltage
INPUT VOLTAGE – V
0.25 4
SUPPLY CURRENT – mA
6 8 10 12 14 15
0.30
0.35
0.40
0.45
0.50
0.55
+125C
+25C
–40C
TPC 6. ADR421 Supply Current vs. Input Voltage
REV. B
ADR420/ADR421/ADR423/ADR425
–7–
INPUT VOLTAGE – V
4
SUPPLY CURRENT – mA
6 8 10 12 15
0.55
–40C
+25C
+125C
0.50
0.45
0.40
0.35
0.30
0.25 14
TPC 7. ADR423 Supply Current vs. Input Voltage
INPUT VOLTAGE – V
6
SUPPLY CURRENT – mA
81012 15
0.55
–40C
+25C
+125C
0.50
0.45
0.40
0.35
0.30
0.25 14
TPC 8. ADR425 Supply Current vs. Input Voltage
TEMPERATURE – C
0
–40
LOAD REGULATION – ppm/mA
–10 20 50 80 110 125
10
20
30
40
50
60
70
IL = 0mA TO 5mA
VIN = 4.5V
VIN = 6V
TPC 9. ADR420 Load Regulation vs. Temperature
TEMPERATURE – C
0
–40
LOAD REGULATION – ppm/mA
–10 20 50 80 110 125
10
20
30
40
50
60
70
I
L
= 0mA TO 5mA
V
IN
= 5V
V
IN
= 6.5V
TPC 10. ADR421 Load Regulation vs. Temperature
TEMPERATURE – C
–40
LOAD REGULATION – ppm/mA
70
60
50
40
30
20
10
0–10 20 40 80 110 125
IL = 0mA TO 10mA
VIN = 7V
VIN = 15V
TPC 11. ADR423 Load Regulation vs. Temperature
TEMPERATURE – C
–40
LOAD REGULATION – ppm/mA
35
30
25
20
15
10
5
0–10 20 40 80 110 125
V
IN
= 15V
I
L
= 0mA TO 10mA
TPC 12. ADR425 Load Regulation vs. Temperature
REV. B
–8–
A
DR420/ADR421/ADR423/ADR425
0
1
2
3
4
5
6
–40 –10 20 50 80 110
TEMPERATURE – C
125
LINE REGULATION –ppm/V
VIN = 4.5V TO 15V
TPC 13. ADR420 Line Regulation vs. Temperature
0
1
2
3
4
5
6
–40 –10 20 50 80 110
TEMPERATURE – C
LINE REGULATION – ppm/V
125
V
IN
= 5V TO 15V
TPC 14. ADR421 Line Regulation vs. Temperature
TEMPERATURE – C
–40
LINE REGULATION – ppm/V
9
7
5
4
3
2
1
0–10 20 50 80 110
V
IN
= 5V TO 15V
8
6
TPC 15. ADR423 Line Regulation vs. Temperature
TEMPERATURE – C
–40
LINE REGULATION – ppm/V
14
10
8
6
4
2
0–10 20 50 80 110
VIN = 7.5V TO 15V
12
125
TPC 16. ADR425 Line Regulation vs. Temperature
LOAD CURRENT – mA
00
DIFFERENTIAL VOLTAGE – V
12345
0.5
1.0
1.5
2.0
2.5
–40C
+25C
+85C
TPC 17. ADR420 Minimum Input-Output Voltage
Differential vs. Load Current
LOAD CURRENT – mA
00
DIFFERENTIAL VOLTAGE – V
12345
0.5
1.0
1.5
2.0
2.5
–40C
+25C
+125C
TPC 18. ADR421 Minimum Input-Output Voltage
Differential vs. Load Current
REV. B
ADR420/ADR421/ADR423/ADR425
–9–
LOAD CURRENT – mA
00
DIFFERENTIAL VOLTAGE – V
12345
0.5
1.0
1.5
2.0
2.5
–40C
+25C
+125C
TPC 19. ADR423 Minimum Input-Output Voltage
Differential vs. Load Current
LOAD CURRENT – mA
0
DIFFERENTIAL VOLTAGE – V
12345
2.5
–40C
+25C
+125C
2.0
1.5
1.0
0.5
0
TPC 20. ADR425 Minimum Input-Output Voltage
Differential vs. Load Current
DEVIATION – ppm
0
–100
MORE
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
FREQUENCY
5
10
15
20
25
30
SAMPLE SIZE – 160
TEMPERATURE
+25C –40C
+125C +25C
TPC 21. ADR421 Typical Hysteresis
1V/DIV
TIME – 1s/DIV
TPC 22. ADR421 Typical Noise Voltage
0.1 Hz to 10 Hz
50V/DIV
TIME – 1s/DIV
TPC 23. Typical Noise Voltage 10 Hz to 10 kHz
FREQUENCY – Hz
10
VOLTAGE NOISE DENSITY
100 1k 10k
1k
100
10
ADR423
ADR421
ADR420
ADR425
TPC 24. Voltage Noise Density vs. Frequency
REV. B
–10–
A
DR420/ADR421/ADR423/ADR425
TIME – 100s/DIV
C
BYPASS
= 0F
LINE INTERRUPTION
500mV/DIV
500mV/DIV
V
OUT
V
IN
TPC 25. ADR421 Line Transient Response
TIME – 100s/DIV
CBYPASS = 0.1F
LINE INTERRUPTION
500mV/DIV
500mV/DIV
VOUT
VIN
TPC 26. ADR421 Line Transient Response
TIME – 100s/DIV
C
L
= 0F1mA LOAD
2V/DIV
1V/DIV
V
OUT
LOAD ON
LOAD OFF
TPC 27. ADR421 Load Transient Response
TIME – 100s/DIV
C
L
= 100nF
1mA LOAD
2V/DIV
1V/DIV
V
OUT
LOAD ON
LOAD OFF
TPC 28. ADR421 Load Transient Response
TIME – 4s/DIV
CIN = 0.01F
NO LOAD
VOUT 2V/DIV
VIN 2V/DIV
TPC 29. ADR421 Turn-Off Response
TIME – 4s/DIV
C
IN
= 0.01F
NO LOAD
V
OUT
2V/DIV
V
IN
2V/DIV
TPC 30. ADR421 Turn-On Response
REV. B
ADR420/ADR421/ADR423/ADR425
–11–
TIME – 4s/DIV
C
LOAD
= 0.01F
NO INPUT CAP
V
OUT
2V/DIV
V
IN
2V/DIV
TPC 31. ADR421 Turn-Off Response
TIME – 4s/DIV
C
LOAD
= 0.01F
NO INPUT CAP
V
OUT
2V/DIV
V
IN
2V/DIV
TPC 32. ADR421 Turn-On Response
C
L
= 0
TIME – 100s/DIV
C
BYPASS
= 0.1F
R
L
= 500
2V/DIV
5V/DIV
V
IN
V
OUT
TPC 33. ADR421 Turn-On/Turn-Off Response
FREQUENCY – Hz
10 100k
100
OUTPUT IMPEDANCE –
1k 10k
10
5
15
20
25
30
35
40
45
50
ADR425
ADR420
ADR421
ADR423
TPC 34. Output Impedance vs. Frequency
FREQUENCY – Hz
–20
10 1M100
RIPPLE REJECTION – dB
1k 10k 100k
–40
–60
–80
–10
–90
–30
–50
–70
TPC 35. Ripple Rejection vs. Frequency
REV. B
–12–
A
DR420/ADR421/ADR423/ADR425
THEORY OF OPERATION
The ADR42x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFET), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate bandgap references. The big advantage
over a bandgap reference is that the intrinsic temperature
coefficient is some thirty times lower (therefore requiring less
correction), resulting in much lower noise since most of the
noise of a bandgap reference comes from the temperature
compensation circuitry.
Figure 1 shows the basic topology of the ADR42x series. The
temperature correction term is provided by a current source with a
value designed to be proportional to absolute temperature. The
general equation is:
VGVRI
OUT P PTAT
=× − ×()∆1
(1)
where G is the gain of the reciprocal of the divider ratio, ∆V
P
is
the difference in pinch-off voltage between the two JFETs, and
I
PTAT
is the positive temperature coefficient correction current.
ADR42x are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V at the reference output respectively.
VIN
*
GND
VOUT
ADR42x
IPTAT
VOUT = G(VP – R1 IPTAT)
*EXTRA CHANNEL IMPLANT
VPR1 R3
R2
I1
I1
Figure 1. Simplified Schematic
Device Power Dissipation Considerations
The ADR42x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
current, users should account for the temperature effects due to
the power dissipation increases with the following equation:
TP T
DAAJJ
=× +θ
(2)
where T
J
and T
A
are the junction and ambient temperatures,
respectively, P
D
is the device power dissipation, and θ
JA
is the
device package thermal resistance.
Basic Voltage Reference Connections
Voltage references, in general, require a bypass capacitor
connected from V
OUT
to GND. The circuit in Figure 2
illustrates the basic configuration for the ADR42x family of
references. Other than a 0.1 µF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
10FTOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN
(DO NOT CONNECT)
TP
NIC
TP
NIC
OUTPUT
ADR42x
0.1F
TRIM 0.1F
+
VIN
Figure 2. Basic Voltage Reference Configuration
Noise Performance
The noise generated by the ADR42x family of references is
typi
cally less than 2 µV p-p over the 0.1 Hz to 10 Hz band
for
ADR420, ADR421, and ADR423. TPC 22 shows the 0.1
Hz to
10 Hz noise of the ADR421, which is only 1.75 µV p-p.
The noise
measurement is made with a bandpass filter made of
a
2-pole high-pass filter with a corner frequency at 0.1 Hz and
a 2-pole low-pass filter with a corner frequency at 10 Hz.
Turn-On Time
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. TPC 29 through TPC 33, inclusive, show the turn-on
settling time for the ADR421.
APPLICATIONS SECTION
OUTPUT ADJUSTMENT
The ADR42x trim terminal can be used to adjust the output voltage
over a ±0.5% range. This feature allows the system designer to
trim system errors out by setting the reference to a voltage other
than the nominal. This is also helpful if the part is used in a system
at temperature to trim out any error. Adjustment of the output has
negligible effect on the temperature performance of the device.
To avoid degrading temperature coefficient, both the
trimming
potentiometer and the two resistors need to be low
temperature
coefficient types, preferably <100 ppm/°C.
OUTPUT
10k (ADR420)
15k (ADR421)
V
O
= 0.5%
R1
470k
R2
V
IN
GND
V
O
TRIM
ADR42x
INPUT
Rp
10k
Figure 3. Output Trim Adjustment
REV. B
ADR420/ADR421/ADR423/ADR425
–13–
Reference for Converters in Optical Network Control Circuits
In the upcoming high-capacity, all-optical router network, Figure 4
employs arrays of micromirrors to direct and route optical
signals from fiber to fiber, without first converting them to
electrical form, which reduces the communication speed. The tiny
micromechanical mirrors are positioned so that each is illuminated
by a single wavelength that carries unique information and can be
passed to any desired input and output fiber. The mirrors are tilted
by the dual-axis actuators controlled by precision ADCs and
DACs within the system. Due to the microscopic movement of
the mirrors, not only is the precision of the converters important,
but the noise associated with these controlling converters is also
extremely critical, because total noise within the system can
be multiplied by the numbers of converters employed. As a result,
the ADR42x is necessary for this application for its exceptional
low noise to maintain the stability of the control loop.
CONTROL
ELECTRONICS
PREAMPAMPL AMPL
ADR421
ADR421
ADR421
DAC DACADC
DSP
MEMS MIRROR ACTIVATOR
RIGHT
ACTIVATOR
LEFT
GIMBAL + SENSOR
SOURCE FIBER
LASER BEAM
DESTINATION
FIBER
Figure 4. All-Optical Router Network
A Negative Precision Reference without Precision Resistors
In many current-output CMOS DAC applications, where the
output signal voltage must be of the same polarity as the reference
voltage, it is often required to reconfigure a current-switching
DAC into a voltage-switching DAC through the use of a 1.25 V
reference, an op amp, and a pair of resistors. Using a current-
switching DAC directly requires the need for an additional
operational amplifier at the output to reinvert the signal. A
negative voltage reference is then desirable from the point that
an additional operational amplifier is not required for either
reinversion (current-switching mode) or amplification (voltage-
switching mode) of the DAC output voltage. In general, any
positive voltage reference can be converted into a negative voltage
reference through the use of an operational amplifier and a pair of
matched resistors in an inverting configuration. The disadvantage
to that approach is that the largest single source of error in the
circuit is the relative matching of the resistors used.
A negative reference can easily be generated by adding a precision
op amp and configuring as in Figure 5. V
OUT
is at virtual ground
and, therefore, the negative reference can be taken directly from
the output of the op amp. The op amp must be dual supply, low
offset, and have rail-to-rail capability if negative supply voltage
is close to the reference output.
+VDD
–VDD
–VREF
VOUT
VIN
GND
ADR42x
A1 = OP777, OP193
A1
4
6
2
Figure 5. Negative Reference
High-Voltage Floating Current Source
The circuit of Figure 6 can be used to generate a floating current
source with minimal self-heating. This particular configuration
can operate on high supply voltages determined by the breakdown
voltage of the N-channel JFET.
VIN
GND
+VS
ADR42x
RL
2.10k
–VS
2N3904
VOUT
SST111
VISHAY
OP90
Figure 6. High-Voltage Floating Current Source
Kelvin Connections
In many portable instrumentation applications, where PC board
cost and area go hand-in-hand, circuit interconnects are very
often of dimensionally minimum width. These narrow lines can
cause large voltage drops if the voltage reference is required to
provide load currents to various functions. In fact, a circuit’s
interconnects can exhibit a typical line resistance of 0.45 mΩ/
square (1 oz. Cu, for example). Force and sense connections,
also referred to as Kelvin connections, offer a convenient method
of eliminating the effects of voltage drops in circuit wires. Load
currents flowing through wiring resistance produce an error
(V
ERROR
= R × I
L
) at the load. However, the Kelvin connection
of Figure 7 overcomes the problem by including the wiring
resistance within the forcing loop of the op amp. Since the op
amp senses the load voltage, op amp loop control forces the
output to compensate for the wiring error and to produce the
correct voltage at the load.
V
IN
GND
R
LW
ADR42x
V
OUT
FORCE
A1
V
IN
V
OUT
R
LW
R
L
V
OUT
SENSE
A1 = OP191
2
6
4
Figure 7. Advantage of Kelvin Connection
REV. B
–14–
A
DR420/ADR421/ADR423/ADR425
Dual Polarity References
V
IN
V
OUT
GND
6
2
4
ADR425
U1
5
TRIM
V
IN
1F 0.1F
R1
10k
+10V
–10V
OP1177
U2
V+
V–
–5V
R2
10k
+5V
R3
5k
Figure 8. +5 V and –5 V Reference Using ADR425
VIN VOUT
GND
6
2
4
ADR425
U1
5
TRIM
+10V
R1
5.6k
+2.5V
R2
5.6k
–2.5V
–10V
OP1177
U2
V+
V–
Figure 9. +2.5 V and
–
2.5 V Reference Using ADR425
Dual polarity references can easily be made with an op amp and
a pair of resistors. In order not to defeat the accuracy obtained
by ADR42x, it is imperative to match the resistance tolerance as
well as the temperature coefficient of all the components.
Programmable Current Source
AD5232
U2
DIGITAL POT
A
BW
U2
R1
50k
C2
10pF
R2
A
1k
R2
B
10
R2’
1k
C1
10pF
R1’
50k
V
IN
GND
2
4
V
DD
V
OUT 6
ADR425
U1
5
TRIM
LOAD
IL
VL
V
SS
V
DD
OP2177
A1
V+
V–
V
SS
V
DD
OP2177
A2
V+
V–
Figure 10. Programmable Current Source
Together with a digital potentiometer and a Howland current
pump, ADR425 forms the reference source for a programmable
current as
I
RR
R
RV
L
AB
B
W=
+
×
22
1
2
(3)
and
VDV
WNREF
=×
2
(4)
where
D = Decimal Equivalent of the Input Code
N = Number of Bits
In addition, R1' and R2' must be equal to R1 and R2
A
+ R2
B
,
respectively. R2
B
in theory can be made as small as needed to
achieve the current needed within A
2
output current
driving
capability. In this example, OP2177 is able to deliver a maxi-
mum of 10 mA. Since the current pump employs both
positive
and
negative feedback, capacitors C1 and C2 are needed to
ensure the
negative feedback prevails and, therefore, avoids oscillation.
This circuit also allows bidirectional current flow if the inputs
V
A
and V
B
of the digital potentiometer are supplied with the
dual polarity references as shown previously.
Programmable DAC Reference Voltage
With a multichannel DAC such as a Quad 12-bit voltage output
DAC AD7398, one of its internal DACs and an ADR42x voltage
reference can be served as a common programmable V
REFX
for the
rest of the DACs. The circuit configuration is shown in Figure 11.
The relationship of V
REFX
to V
REF
depends upon the digital code
and the ratio of R1 and R2 and is given by:
V
VR
R
DR
R
REFX
REF
N
=
×+
+×
12
1
12
2
1
where
D = Decimal Equivalent of Input Code and
N = Number of Bits
V
REF
= Applied External Reference
V
REFX
= Reference Voltage for DAC A to D
(5)
REV. B
ADR420/ADR421/ADR423/ADR425
–15–
Table III. V
REFX
vs. R1 and R2
VIN
DACA
VREFA VOUTA
DACB
VREFB VOUTB
DACC
VREFC VOUTC
DACD
VREFD VOUTD
AD7398
ADR425
R1
0.1%
R2
0.1%
VREF
VOB = V REFX (DB)
VOC = V REFX (DC)
VOD = V REFX (DD)
Figure 11. Programmable DAC Reference
Precision Voltage Reference for Data Converters
The ADR42x family has a number of features that make it ideal
for use with A/D and D/A converters. The exceptional low noise,
tight temperature coefficient, and high accuracy characteristics
make the ADR42x ideal for low noise applications such as cellular
base station applications.
Another example of ADC for which the ADR421 is also well-suited
is the AD7701. Figure 12 shows the ADR421 used as the precision
reference for this converter. The AD7701 is a 16-bit A/D converter
with on-chip digital filtering intended for the measurement of wide
dynamic range and low frequency signals such as those representing
chemical, physical, or biological processes. It contains a charge-
balancing (sigma-delta) ADC, calibration microcontroller with on-chip
static RAM, a clock oscillator, and a serial communications port.
VIN
GND
ADR42x
0.1F
SC1
VOUT
MODE
CLKOUT
0.1F10F
0.1F
0.1F
0.1F
0.1F10F
AD7701
–5V
ANALOG
SUPPLY
AGND
AIN
AV SS
CAL
BP/UP
VREF
AV DD
DVSS
DGND
SC2
CLKIN
SCLK
SDATA
DRDV
CS
SLEEP
DVDD
DATA READY
READ (TRANSMIT)
SERIAL CLOCK
SERIAL CLOCK
+5V
ANALOG
SUPPLY
ANALOG
GROUND
ANALOG
INPUT
CALIBRATE
RANGES
SELECT
Figure 12. Voltage Reference for 16-Bit A/D Converter
AD7701
Precision Boosted Output Regulator
A precision voltage output with boosted current capability can
be realized with the circuit shown in Figure 13. In this circuit,
U
2
forces V
O
to be equal to V
REF
by regulating the turn on of
N
1
, therefore, the load current will be furnished by V
IN
. In this
configuration, a 50 mA load is achievable at V
IN
of 5 V. Moder-
ate heat will be generated on the MOSFET and higher current
can be achieved with a replacement of the larger device. In
addition, for heavy capacitive load with step input, a buffer may
be added at the output to enhance the transient response.
AD8601
VIN V
O
RL25
N1
2U1
VIN
GND
4
5
6
U2
2N7002
5V
V+
V–
ADR421
VOUT
TRIM
Figure 13. Precision Boosted Output Regulator
R1, R2 Digital Code V
REF
R1 = R2 0000 0000 0000 2 V
REF
R1 = R2 1000 0000 0000 1.3 V
REF
R1 = R2 1111 1111 1111 V
REF
R1 = 3R2 0000 0000 0000 4 V
REF
R1 = 3R2 1000 0000 0000 1.6 V
REF
R1 = 3R2 1111 1111 1111 V
REF
REV. B
–16–
C02432–0–3/02(B)
PRINTED IN U.S.A.
ADR420/ADR421/ADR423/ADR425
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Narrow Body SOIC
(R-8)
0.0098 (0.25)
0.0075 (0.19)
0.050 (1.27)
0.016 (0.40)
8
0
0.0196 (0.50)
0.0099 (0.25) 45
85
1
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.020 (0.51)
0.013 (0.33)
4
NOTES
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS
2. ALL DIMENSIONS PER JEDEC STANDARDS MS-012 AA
8-Lead Mini_SOIC
(RM-8)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
33
27
0.120 (3.05)
0.112 (2.84)
85
41
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.120 (3.05)
0.112 (2.84)
Revision History
Location Page
03/02—Data Sheet changed from REV. A to REV. B.
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Deletion of Precision Voltage Regulator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Addition of Precision Boosted Output Regulator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Addition of Figure 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Data Sheet changed from REV. 0 to REV. A.
Addition of ADR423 and ADR425 to ADR420/ADR421 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal
