Features
RoHS compliant products.
JEDEC standard 1.8V ± 0.1V Power supply
VDDQ=1.8V ± 0.1V
Clock Freq: 266MHZ for 533Mb/s/Pin.
333MHZ for 667Mb/s/Pin.
400MHZ for 800Mb/s/Pin.
Programmable CAS Latency: 3,4,5,6
Programmable Additive Latency : :0, 1, 2, 3, 4, 5
Write Latency (WL) = Read Latency (RL)-1
Burst Length: 4,8(Interleave/nibble sequential)
Programmable sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended
data-strobe is an optional feature)
Off-Chip Driver (OCD) Impedance Adjustment
MRS cycle with address key programs.
On Die Termination
Serial presence detect with EEPROM
Pin Identification
Symbol
Function
A0~A13, BA0~BA2
Address/Bank input
DQ0~DQ63
Bi-direction data bus.
DQS0~DQS7
Data strobes
/DQS0~/DQS7
Differential Data strobes
CK0, /CK0,CK1, /CK1
Clock Input. (Differential pair)
CKE0, CKE1
Clock Enable Input.
ODT0, ODT1
On-die termination control line
/S0, /S1
DIMM rank select lines.
/RAS
Row address strobe
/CAS
Column address strobe
/WE
Write Enable
DM0~DM7
Data masks/high data strobes
VDD
+1.8 Voltage power supply
VDDQ
+1.8 Voltage Power Supply for
DQS
VREF
Power Supply for Reference
VDDSPD
SPD EEPROM power supply
SA0~SA1
Address select for EEPROM
SCL
Clock for EEPROM
SDA
Data for EEPROM
VSS
Ground
NC
No Connection
DDR2 SO-DIMM is high-speed, low power memory module that use
DDR2 SDRAM in FBGA package and a 2048 bits serial EEPROM on a
200-pin printed circuit board. DDR2 SO-DIMM is a Dual In-Line Memory
Module and is intended for mounting into 200-pin edge connector
sockets.
Synchronous design allows precise cycle control with the use of system
clock. Data I/O transactions are possible on both edges of DQS. Range
of operation frequencies, programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance memory
system applications.
DDR2 SO-DIMM
Dimensions (Unit: millimeter)
Note:
1. Tolerances on all dimensions +/-0.15mm unless otherwise specified.
Pin Assignments
