MTC-20136 - AMI Semiconductor, Inc.

Product Brief

Rev. 1.0 - March 2000

MTK-20450

“DynaMiTe” Four Channel

Rate Adaptive Asymmetrical

Digital Subscriber Line

(ADSL) Modem Chipset

• ADSL Central Office

Equipment

• DSL Access Multiplexors

(DSLAM)

• Next Generation Digital

Loop Carrier

• ADSL line cards for ATM

switches and routers

• Manufacturing test

equipment

Applications

• Highly integrated architecture:

- 3 chips for four lines

plus line drivers

- Standard direct ATM

interface

• Complete Modem Package

- One processor for four

modems

- Only one SDRAM required

for all four

- Easy to use command

interface

- Full reference design kit

- Optimized for use in

Central Offices

• Lowest power dissipation

available (410 mW)

• Quad analog front end

with multiplexed interface

to quad digital component

Features

MTK-20450*2 080300 [1]

Management Entity

ATM

MTC-20455

DMT Modem

ATM Framer

MTC-20136

Transceiver

Controller

MTC-20454

Analog

Front End

SDRAM

Line 4

Line 3

Line 2

Line 1

flash

EPROM

Fig.1: Block Diagram of the MTK-20450

• Next generation ADSL

technology optimized for

the Central Office

• Highest performance

- Fully rate adaptive

• Operation up to 26 kft

(24 AWG), 18 kft (26AWG)

- More than 8 Mbps

downstream / 832 kbps

upstream up to 5 kft

(26AWG)

- More than 3 Mbps

downstream / 720 kbps

upstream up to 12 kft

(26 AWG)

• Support for multiple

standards:

- ANSI T1.413 Issue 2

- ITU G.992.1 (G.DMT)

- ITU G.992.2 (G.lite)

- ADSL over ISDN

MTK-20450

MTK-20450*2 080300 [2]

The MTK-20450 chip set represents

a large leap forward in Alcatel ADSL

technology. Extensive field experience

has lead to the development of a fully

optimized DMT core. This makes

possible a high density chip set which

consumes less power and is made

specifically for Central Office and

Remote Cabinet applications. The kit

is comprised of the MTC-20454 quad

analog front end, the MTC-20455

DMT Modem and ATM framer, and

the MTC-20136 ADSL Transceiver

Controller with Modem control

interface.

The chip set provides the line inter-

face for ADSL and an ATM UTOPIA

interface for the processed data.

A HW/FW command and control

interface (CTRLE), to communicate

with external management entities,

is directly provided, without need

for glue logic. Discrete multi-tone

modulation is used in the MTK-20450

to achieve the greatest bit rates and

the longest loop lengths. Like previous

generations of the DynaMiTe chip set,

it complies with existing standards for

ADSL, including ITU, ETSI, and ANSI.

Additional Reed Solomon forward

error correction with or without inter-

leaving provides maximum noise

immunity.

The MTK-20450 elements are further

detailed in the following documents:

MTC-20454 – Quad Analog Front-

End, MTC-20455 – Quad ADSL

Modem Transceiver and ATM Framer,

and MTC-20136 ADSL Transceiver

Controller.

General Description

MTK-20450 DynaMiTe™is a 2 chip

ADSL Modem Transceiver and a

transceiver controller. The kit also

includes the necessary modem firm-

ware running on the Transceiver

Controller. The chipset directly inter-

faces with ATM systems to allow ATM

traffic to be transported at high speed

on copper pairs with minimum over-

head.

The Alcatel ADSL Modem Chipset

The MTK-20450 is designed

specifically for the Central Office side

of an ADSL circuit. The transceiver

is optimised for transmitting at the

higher downstream speeds of ADSL

and receiving at the lower upstream

speeds and has reduced power

dissipation. An external ADSL-

compatible line driver is used to

drive the telephone twisted pair.

Finally, an analog POTS splitter

is needed to split the baseband

analog telephone signal from

the modulated ADSL signal. Brief

characteristics of the system are

given in table 1. Table 2 shows

speed versus distance in upstream

and down-stream directions.

The bit rate can be varied in steps

of 32 kbit/s.

The Modem Environment

MTK-20450

MTK-20450*2 080300 [3]

The chip functions are depicted in the block diagram of the ADSL modem presented in fig.2.

The Chipset Functions

MUX

DMT Symbol

Buffer

DMT Symbol

Buffer

Monitor

Demapper Mapper

IFFT

FFT

RS-Coder

RS-decoder

RS-Decoder

RS-Coder

PISO

SIPO

Interleaver

De-Interleaver

Tx Filter

TEQ

Interpolator

Decimator

Echo Filter

DAC

AGC &RX

Filter

AGC &TX

Filter

Hybrid POTS

Splitter

To PSTN

MUX

ATM

DMT Symbol

Buffer

DMT Symbol

Buffer

Monitor

Demapper Mapper

IFFT

FFT

RS-Coder

RS-decoder

RS-Decoder

RS-Coder

PISO

SIPO

Interleaver

De-Interleaver

Tx Filter

TEQ

Interpolator

Decimator

Echo Filter

MUX

DMT Symbol

Buffer

DMT Symbol

Buffer

Monitor

Demapper Mapper

IFFT

FFT

RS-Coder

RS-decoder

RS-Decoder

RS-Coder

PISO

SIPO

Interleaver

De-Interleaver

Tx Filter

TEQ

Interpolator

Decimator

Echo Filter

DAC

AGC &RX

Filter

AGC &TX

Filter

Hybrid

DAC

ADC

AGC &RX

Filter

AGC &TX

Filter

Hybrid

DAC

AGC &RX

Filter

AGC &TX

Filter

Hybrid

MUX

DMT Symbol

Buffer

DMT Symbol

Buffer

Monitor

Demapper Mapper

IFFT

FFT

RS-Coder

RS-decoder

RS-Decoder

CTRL/E

Controller

Cors

Conbol Interface

MTC-20136

Transciever Controller

MTC-20445

ADSL Modem/ATM Framer Clock

Interface

MTC-20454

Analog Front End

RS-Coder

PISO

SIPO

Interleaver

De-Interleaver

Tx Filter

TEQ

Interpolator

Decimator

Echo Filter

Multiplexed Analog

Front End Interface

ATM

UTOPIA II

SDRAM

ROM

POTS

Splitter

POTS

Splitter

POTS

Splitter

Fig.2: Quad ADSL Chipset Block Diagram

MTK-20450

The functions included in each IC are as follows:

MTK-20450*2 080300 [4]

An Analog Front-end Circuit

(MTC-20454)

This CMOS IC contains the analog

functions required in the transceiver

for four ADSL modems. In order to

cope with the high attenuation of the

line and in order to keep acceptable

noise level of the signal, automatic

gain control amplifiers have been

implemented at the analog front of

the transmission and reception paths.

Then, the signal is passed through low

pass filters to eliminate the echo

signal and out-of-band interference.

The DA converters provide 12 bit

resolution at 8.8 MHz sampling rate,

and the AD converters provide for

12 bit resolution at 8.8 MHz in the

receive path. Finally, for the

transmission part, the control of the

external hybrid drivers is done by an

integrated highly linear line pre-driver.

Like the MTC-20154, this device also

contains the analogue multiplexor and

LNA functions to produce a more

integrated solution.

Modem/Framer

(MTC-20455)

This CMOS IC contains all the digital

functional blocks required for the

following functions for four individual

ADSL modems.

1. Discrete Multi Tone (DMT)

Modulation and Demodulation

The MTC-20455 implements digitally

the Quadrature-Amplitude Modulation

(QAM) mapper/demapper which

allows up to 14 bits coding per tone

(a constellation of 16383 points).

The device implements the necessary

Inverse- and Fast Fourier Transform

(IFFT, FFT), the Time- and Frequency-

Domain Equaliser (TEQ, FEQ)

plus timing units and network

timing reference. These last blocks

implement efficient synchronisation

algorithms to improve the efficiency

of the recovery of data.

2. Framing Functions

The MTC-20455 implements framing

functions for the generic and ATM

Transmission Convergence (TC)

layers. The generic TC consists of

data scrambling and Reed-Solomon

error correction with and without

interleaving. The ATM TC includes

cell level functions (such as cell

delineation, insertion/ extraction of

idle cells, payload scrambling, HEC

check) and data frame generation.

Several framing variants are imple-

mented (such as interleaved and non

interleaved modes, full and reduced

overhead) to ensure compliance with

ANSI T1.413 Issue 2 and ITU G-dmt

and G-Lite.

3. Interface to UTOPIA Bus

The IC contains the ATM-related

functions to interface with the ATM

UTOPIA level 2 bus.

Transceiver Controller

(MTC-20136)

1. Control of Transceiver Chip

Operations

The MTC-20136 runs the firmware

controlling the operations of the

ADSL transceiver (AFE, DMT modem,

Framer). During modem initialisation,

the controller computes and sets up

parameters for all programmable DMT

functions, filters and equalisers. The

controller is able to run in different

rate-adaptive modes as defined by

the operator. The controller also

implements the EOC and AOC proto-

cols. ITU G-hs and G-PLOAM, are

implemented here as well. During

operation, the MTC-20136 performs

continuous line monitoring and initiates

consecutive actions as specified by

the operator (e.g. bit-swapping,

dynamic bit-rate adaptation, fast

retrain ...) and collects performance

and error information for use by

management entities.

2. Interface to Management

Entities

The MTC-20136 also runs the

communication protocol to interface

with external management entities.

A specific ADSL modem control

interface has been defined to ease

the integration with both systems

HW and FW. This so-called CTRLE

communication channel is used to

transfer information and commands

between modem and management

entities. These commands/responses

are fully described in the CTRLE

specification document and can be

categorised as follows:

- Configuration of a modem line

- De-allocation of a modem line

- Operational Data Retrieval

- Performance Data Retrieval

- Defect Retrieval

The MTC-20136 provides direct HW

connection to external components

(processors, SARs, Muxes, ...) through

an 8-bit parallel or serial bus.

MTK-20450

Table 1: Summary of Characteristics

MTK-20450*2 080300 [5]

MTC-20454

• Quad Analog Front End

• 4.3 kHz tone spacing

• ADC 12 bit resolution, 8.832 MHz sampling rate

• DAC 12 bit resolution, 8.832 MHz sampling rate

• Analog/tuneable low-pass filters

• Upstream channel fc 160 kHz, < 0,2 dB ripple

• Downstream channel fc 1550 kHz, < 1 dB ripple

• AGC range:

- 15..31 dB in steps of 1 dB (Rx)

- 9..6 dB in steps of 1 dB (Tx predriver)

• Package: TQFP 100 I

MTC-20455

• Quad ADSL Modem Transceiver

• DMT modulation

• Max. number of bit per tone: 14 bits (16383 constellation points)

• Max. number of tones: 256 tones

• Max. clock speed: 36 MHz

• Max. tone spacing: 4.325 kHz

• RS encoder: max codeword 256 bytes

• Network Timing Reference

• ATM Processor:

• ATM cell buffering

• Cell counting

• Insert/Extract, Idle/Unassigned ATM cells (rate adaptation)

• ATM HEC generation module (CCITT I.432)

• ATM payload scrambler: payload width: 48 bytes

• UTOPIA Level 2 Interface

• Packages: PQFP 160 I, MBGA 160 I

MTC-20136

• Embedded ARM microcore

• Modem Command interface

• Parallel 8bit bus

• Serial bus (SPI)

• Dual port RAM Mailbox

• Packages: PQFP 144 I, MBGA 160 I

MTK-20450

MTK-20450*2 080300 [6]

Building Systems with MTK-20450

Great care has been taken in defining

the MTK-20450 to ease its integration

into system designs. In particular, this

is achieved:

- at hardware level: by using

standard interfaces both for

data transfer (ATM Utopia) and

for control (8-bit parallel or serial)

- at firmware level: by clearly

separating the modem FW, run on

the embedded Transceiver Controller

from other systems related and

application-specific functions. The

boundary between the two domains

is provided by means of a simple

modem control protocol (CTRLE).

This “packaged modem” approach

provides a self-contained ADSL modem

solution, allowing system manufacturers

to concentrate on system issues. The

MTK-20450 comes in a full package

with full FW, schematics, Bill of

Material and layout information for

the ADSL modem part. It is further

supported by a full development

environment comprising:

- Evaluation boards

- DeTONEator S/W for CTRLE to

a PC (e.g. through RS232)

- PC firmware driver for CTRLE

- ADSL test and control FW running

on PC with GUI

Table 2: Summary of Characteristics

Distances Data rate at 6 dB margin

0.5 mm Upstream Downstream

24 AWG

0.9 km- 3 kft 820 kbit/s 8 Mbit/s

2.7 km- 9 kft 820 kbit/s 7 Mbit/s

3.6 km- 12 kft 820 kbit/s 5.2 Mbit/s

4.5 km- 15 kft 768 kbit/s 3.2 Mbit/s

6.3 km- 21 kft 640 kbit/s 800 kbit/s

MTK-20450

Notes

MTK-20450*2 080300 [7]

MTK-20450*2 080300 [8]

04/00-0279a

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This document contains information on a new product.

Alcatel Microelectronics

reserves the right to make

changes in specifications at any time and without notice.

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Alcatel Microelectronics

this document is believed to be accurate and reliable.

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Alcatel

Microelectronics

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patents or other rights of third parties resulting from its use.

No licence is granted under any patents or patent rights

Alcatel Microelectronics

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