TDA2522/TDA2523 @PLESSEY TDA 2522/3 COLOUR DEMODULATOR COMBINATION The TDA2522 and TDA2523 are integrated syn- chronous demodulators for colour television receivers. enh 161 KILLER DELAY CAPACITOR The devices incorporate an 8.8MHz oscillator followed DIFFERENCE | (G~) 1S] BURST GATING AND BLANKING PULSE I/P by a divider giving two 4.4MHz reference signals, a weygs ubyace novo capacrron keyed burst phase detector for optimum noise be- haviour, an ACC detector and amplifier, a colour killer, srouwo SS) Act oureuT two synchronous demodulators for the (B-Y) and a }) ACC REFERENCE VOLTAGE (R-Y) signals, a PAL switch and a PAL flip-flop with weurs t (R-vQe aw internal identification. The symmetrical demodulators include integrated He ne capacitors to reduce unwanted carrier signals at the outputs which are taken from temperature-compensated DP16 emitter followers. The outputs of the TDA2522 are Fig. 1 Pin connections suitable for use with the TDA2530. The TDA2523 outputs are inverted for use with a direct transistor drive. QUICK REFERENCE DATA M@ Supply Voltage (pin 11): 12V typ. M Chrominance Input Signal (Including M@ Supply Current: 40mA typ. Rue n6) 500m M@ Colour Difference Signals : Y (pin mV pp (RY) (pin 3): > 2.4V p-p BY (pin 5) 350mV p-p (G y} (pin } : >1.36V p-p @ Colour Difference Signal Output (B~Y) (pin 1): >3V p-p Impedance 250 -_ typ. CHROMINANCE INPUT (B-Y) CHROMINANCE INPUT ER-) (B-) DEMODUL ATOR BLANKING eurst gating AL AND E BLANKING PULSE AR-) DEMODYLATOR FLIP-FLOP BLANKING ES EMITTER FOLLOWER CURRENT SAMPLING KILLER Veet (BY) HZ DETECTOR? ACC AMPLIFIER PAL SWITCH TOA 2822 Veeg (R-} SOMA + 2s 90 PHASE SHIFT KILLER _ DETECTOR PHASE DETECTOR BURST GATE OSCILLATOR (0-6 Miz) COLOUR UNKILL DELAY Cg . Fig.2 Block diagram 179TDA2522/TDA2523. ELECTRICAL CHARACTERISTICS Supply voltage, pin 11 = +12V Test conditions unless (otherwise stated) : XK Tamb'= +25C Measurements referred to pin 4 a: falu Charateristic Pin (Min. Typ. Max. | Units Conditions Demodulator Ratio of demodulated signals: B-Y/RY 1/3 1.78 - G-Y/R-Y 2/3 0.85 - See note 1 G-Y/R-Y 2/3 0.17 - See note 2 Colour difference outputs: (RY) 3 2.4 Vp-p (GY) 2 1.35 Vp-p (BY) 1 3 Vp-p Chrominance input signal (including burst) : - 6 500 mVp- B-Y 5 350 mVp_p \ See note 3 Colour difference signal output impedances: (R 3 250 2 (GY) 2 250 Q (B-Y) 4 250 Q H/2 ripple at RY O/P 3 10 mVp-p Blanking and keying pulse ; Burst keying active for {15 | 7.5 Vp-p Burst keying inactive for | 15 6.5 Vp-p Blanking active for 15 | 2 Vp-p Blanking inactive for 15 1 Vp-p Reference section Phase difference between reference and burst +5 Deg. Crystal frequency deviation +400Hz Overall holding range +500 Hz Using typical crystal Burst signal input 5-6 0.25 Vp-p Keying pulse width = 4us, Oscillator input resistance | 10 270 Q Oscillator input capaci- tance 10 pF See note 5 Oscillator output resistance | 9 200 a ACC reference voltage 12 7 Vv ACC voltage at correct phase 14 5.5 Vv ACC voltage with zero q Burst = 0.25Vpp burst 14 7.0 Vv ACC amplifier output voltage range 13 | 05 5.0 Vv hig < +200pnA Colour killer Via pin 14: Colour off 14 16 Vv Colour on 14 5.6 Vv Via pin 16: Colour off 16 |7 Vv Colour on 16 5 Vv Colour unkill delay 20 ms/pF See note 6 NOTES 1. The demodulators are driven by a chrominance signal of equal amplitude for the (RY) and (BY) components. The phase of the (RY) chrominance signal equals the phase of the (RY) reference signal. The same holds for the (BY) signals. 2. As note 1, but with the phase cf the (R-Y) reference signal reversed. OnEnw . Colour bar with 75% saturation. . The burst amplitude is kept constant by ACC action, but-depends linearly on the keying pulse width. . To be established. . The delay depends on the value of Cd (see Fig. 2) 180FUNCTIONAL DESCRIPTION Functions listed by pin number. TDA2522 1. -(B-Y) signal output 2. -(G-Y) signal output (G-Y) signal output 3. -(R-Y) signal output (R-Y) signal output These outputs are of low impedance from tempera- ture compensated emitter follower stages that require external loads of 10kQ. Internal filtering of the colour difference output signals to give a 3dB bandwidth of 1MHz allows the three signals to be fed directly to the {uminance matrix. The TDA2522 may be AC coupled to the TDA2530, and the TDA2523 may be used with direct transistor drive. 4, Negative supply (Ground) 5. Chrominance B Y input signal An input signal of approximately 350mV p-p (colour bars) is required at this pin. The BY component of colour burst must be included with the input chromi- nance signal. 6. Chrominance R Y input signal An input signal of approximately 500mV p-p (colour bars) is required, including the RY colour burst component. 7. Reference oscillator APC loop filter 8. Reference oscillator APC loop filter Between pins 7 and 8 are connected the APC loop low pass filter components. The difference voltage between these pins is connected internally to the oscillator reactance stage. 9. Oscillator feedback 10. Oscillator feedback A series network consisting of the 8.8MHz crystal and an adjustable tuning capacitor is connected between pins 9 and 10. Division from the 8.8MHz oscillator within the IC produces the 4.4MHz quadrature reference carriers which are then applied to the colour demodulators. 11. Positive 12V supply The maximum voltage must not exceed 14V. 12. ACC hold capacitor The capacitor connected from this pin to ground is normally charged to a potential of about 7V. 13. ACC output potential An output potential varying inversely with the input colour burst amplitude is available at pin 13. Maximum ACC gain of the TDA2560 is provided when the ACC potential from, pin 13 of the device is greater than about 1.4V. 14. ACC hold capacitor The capacitor connected from this pin to ground is normally charged to a potential of 5.5V. On mono- chrome reception the potential will be 7.0V and while identing it may instantaneously increase to about 8V. A 1000 resistor may be connected in series with the capacitor from pin 14, see pin 15. 15. Burst gating and blanking pulse input. The two-level positive pulse required at this pin is used for burst gating and flip-flop triggering, at a sampled level of 7V. A negative going pulse of about 100mV p-p, derived from the colour burst, may be inspected across a 1000 resistor in series with the capacitor from pin 14 to ground, should the sandcastle pulse shape require some adjustment. Ata level of about 1.5V the pulse width should be suitable for chroma blanking. 16. Killer delay capacitor The value of a capacitor connected from pin 16 to ground determines the delay of un-killing. By this means the state of continuous switching of the killer with marginal signals, may be avoided. Connecting pin 16 to ground unkills the system. TDA2523 (B-Y) signal output TDA2522/TDA2523 ABSOLUTE MAXIMUM RATINGS Supply voltage (pin 1) 14V Total power dissipation 600mW Storage temperature 55C to +.125C Operating ambient temperature -10C to +60C 181