54ABT16244
16-Bit Buffer/Line Driver with TRI-STATE®Outputs
General Description
The ’ABT16244 contains sixteen non-inverting buffers with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble controlled. Individual
TRI-STATE control inputs can be shorted together for 8-bit or
16-bit operation.
Features
nSeparate control logic for each nibble
n16-bit version of the ’ABT244
nOutputs sink capability of 48 mA, source capability of
24 mA
nGuaranteed output skew
nGuaranteed multiple output switching specifications
nOutput switching specified for both 50 pF and 250 pF
loads
nGuaranteed simultaneous switching noise level and
dynamic threshold performance
nGuaranteed latchup protection
nHigh impedance glitch free bus loading during entire
power up and power down cycle
nNon-destructive hot insertion capability
nStandard Microcircuit Drawing (SMD) 5962-9317402
Ordering Code:
Military Package Package Description
Number
54ABT16244W-QML WA48A 48-Lead Cerpack
Logic Symbol
Pin Description
Pin Names Description
OE
n
Output Enable Inputs (Active Low)
I
0
–I
15
Inputs
O
0
–O
15
Outputs
Connection Diagram
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
DS100223-1
Pin Assignment for Cerpack
DS100223-2
July 1998
54ABT16244 16-Bit Buffer/Line Driver with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100223 www.national.com
Functional Description
The ’ABT16244 contains sixteen non-inverting buffers with TRI-STATE outputs. The device is nibble (4 bits) controlled with each
nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.
Truth Tables
Inputs Outputs
OE
1
I
0
–I
3
O
0
–O
3
LL L
LH H
HX Z
Inputs Outputs
OE
3
I
8
–I
11
O
8
–O
11
LL L
LH H
HX Z
H
=
High Voltage Level
L=Low Voltage Level
X=Immaterial
Z=High Impedance
Inputs Outputs
OE
2
I
4
–I
7
O
4
–O
7
LL L
LH H
HX Z
Inputs Outputs
OE
4
I
12
–I
15
O
12
–O
15
LL L
LH H
HX Z
Logic Diagram
DS100223-3
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Absolute Maximum Ratings (Note 1)
Storage Temperature −65˚C to +150˚C
Ambient Temperature under Bias −55˚C to +125˚C
Junction Temperature under Bias
Ceramic −55˚C to +175˚C
V
CC
Pin Potential to
Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-off State −0.5V to 5.5V
in the HIGH State −0.5V to V
CC
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
DC Latchup Source Current −500 mA
Over Voltage Latchup (I/O) 10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military −55˚C to +125˚C
Supply Voltage
Military +4.5V to +5.5V
Minimum Input Edge Rate (∆V/∆t)
Data Input 50 mV/ns
Enable Input 20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol Parameter ABT16244 Units V
CC
Conditions
Min Typ Max
V
IH
Input HIGH Voltage 2.0 V Recognized HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min I
IN
=−18 mA
V
OH
Output HIGH Voltage 54ABT 2.5 V Min I
OH
=−3 mA
54ABT 2.0 V Min I
OH
=−24 mA
V
OL
Output LOW Voltage 54ABT 0.55 V Min I
OL
=48 mA
I
IH
Input HIGH Current 5 µA Max V
IN
=2.7V (Note 3)
5V
IN
=V
CC
I
BVI
Input HIGH Current 7 µA Max V
IN
=7.0V
Breakdown Test
I
IL
Input LOW Current −5 µA Max V
IN
=0.5V (Note 3)
−5 V
IN
=0.0V
V
ID
Input Leakage Test 4.75 V 0.0 I
ID
=1.9 µA
All Other Pins Grounded
I
OZH
Output Leakage Current 50 µA 0 − 5.5V V
OUT
=2.7V; OE
n
=2.0V
I
OZL
Output Leakage Current −50 µA 0 − 5.5V V
OUT
=0.5V; OE
n
=2.0V
I
OS
Output Short-Circuit Current −100 −275 mA Max V
OUT
=0.0V
I
CEX
Output High Leakage Current 50 µA Max V
OUT
=V
CC
I
ZZ
Bus Drainage Test 100 µA 0.0 V
OUT
=5.5V
All Other Pins GND
I
CCH
Power Supply Current 2.0 mA Max All Outputs HIGH
I
CCL
Power Supply Current 60 mA Max All Outputs LOW
I
CCZ
Power Supply Current 2.0 mA Max OE
n
=V
CC
All Others at V
CC
or GND
I
CCT
Additional I
CC
/Input Outputs Enabled 2.5 mA V
I
=V
CC
− 2.1V
Outputs TRI-STATE 2.5 mA Max Enable Input V
I
=V
CC
− 2.1V
Outputs TRI-STATE 50 µA Data Input V
I
=V
CC
− 2.1V
All Others at V
CC
or GND
I
CCD
Dynamic I
CC
No Load mA/ Outputs Open, OE
n
=GND
(Note 3) 0.1 MHz Max One Bit Toggling,
50%Duty Cycle
Note 3: Guaranteed but not tested.
3 www.national.com
DC Electrical Characteristics
Conditions
Symbol Parameter Min Max Units V
CC
C
L
=50 pF,
R
L
=500Ω
V
OLP
Quiet Output Maximum Dynamic V
OL
1.1 V 5.0 T
A
=25˚C (Note 4)
V
OLV
Quiet Output Minimum Dynamic V
OL
-0.45 V 5.0 T
A
=25˚C(Note 4)
Note 4: Max number of outputs defined as (n).n−1data inputs are driven 0V to 3V. One output at LOW.
AC Electrical Characteristics
Symbol Parameter 54ABT Units
T
A
=−55˚C to +125˚C
V
CC
=4.5V–5.5V
C
L
=50 pF
Min Max
t
PLH
Propagation 0.5 5.3 ns
t
PHL
Delay Data 0.5 5.9
to Outputs
t
PZH
Output Enable 1.5 6.8 ns
t
PZL
Time 1.5 7.0
t
PHZ
Output Disable 1.5 7.7 ns
t
PLZ
Time 1.5 6.5
Capacitance
Symbol Parameter Typ Units Conditions
T
A
=25˚C
C
IN
Input Capacitance 5.0 pF V
CC
=5.0V
C
OUT
(Note 5) Output Capacitance 9.0 pF V
CC
=5.0V
Note 5: COUT is measured at frequency f =1 MHz; per MIL STD-883B, Method 3012.
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Capacitance (Continued)
t
PLH
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-12
t
PHL
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-13
t
PLH
vs Load Capacitance
1 Output Switching, T
A
=25˚C
DS100223-14
t
PHL
vs Load Capacitance
1 Output Switching, T
A
=25˚C
DS100223-15
t
PLH
vs Load Capacitance
16 Outputs Switching, T
A
=25˚C
DS100223-16
t
PHL
vs Load Capacitance
16 Outputs Switching, T
A
=25˚C
DS100223-17
t
PZL
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-18
t
PLZ
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-19
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Tables.
5 www.national.com
Capacitance (Continued)
t
PZH
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-20
t
PHZ
vs Temperature (T
A
)
C
L
=50 pF, 1 Output Switching
DS100223-21
t
PZH
vs Temperature (T
A
)
C
L
=50 pF, 16 Outputs Switching
DS100223-22
t
PHZ
vs Temperature (T
A
)
C
L
=50 pF, 16 Outputs Switching
DS100223-23
t
PZL
vs Temperature (T
A
)
C
L
=50 pF, 16 Outputs Switching
DS100223-24
t
PLZ
vs Temperature (T
A
)
C
L
=50 pF, 16 Outputs Switching
DS100223-25
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Tables.
www.national.com 6
Capacitance (Continued)
t
PZL
vs Load Capacitance
16 Outputs Switching, T
A
=25˚C
DS100223-26
t
PZH
vs Load Capacitance
16 Outputs Switching, T
A
=25˚C
DS100223-27
t
PLH
and t
PHL
vs Number Output Switching
V
CC
=5.0V, T
A
=25˚C, C
L
=50 pF
DS100223-28
I
CC
vs Frequency Average,
T
A
=25˚C, V
CC
=5.5V
DS100223-29
Dashed lines represent design characteristics; for specified guarantees, refer to AC Characteristics Tables.
7 www.national.com
AC Loading
DS100223-4
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100223-8
FIGURE 2. Propagation Delay Waveforms
for Inverting and Non-Inverting Functions
DS100223-6
FIGURE 3. Test Input Pulse Requirements
Amplitude Rep Rate t
W
t
r
t
f
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
FIGURE 4. Test Input Signal Requirements
DS100223-7
FIGURE 5. TRI-STATE Output HIGH
and LOW Enable and Disable Times
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9
Physical Dimensions inches (millimeters) unless otherwise noted
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tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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48-Lead Cerpack
NS Package Number WA48A
54ABT16244 16-Bit Buffer/Line Driver with TRI-STATE Outputs
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
