LMC6582 Dual/LMC6584 Quad Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier General Description Features The LMC6582/4 is a high performance operational amplifier which can operate over a wide range of supply voltages with guaranteed specifications at 1.8V, 2.2V, 3V, 5V, and 10V. (Typical unless otherwise noted) n Guaranteed Specs at 1.8V, 2.2V, 3V, 5V, 10V n Rail-to-Rail Input Common-Mode Voltage Range n Rail-to-Rail Output Swing (within 10 mV of supply rail, @ VS = 3V and RL = 10 k) n CMRR and PSRR: 82 dB n Ultra Low Input Current: 80 fA n High Voltage Gain (VS = 3V, RL = 10 k): 120 dB n Unity Gain Bandwidth: 1.2 MHz The LMC6582/4 provides an input common-mode voltage range that exceeds both supplies. The rail-to-rail output swing of the amplifier assures maximum dynamic signal range. This rail-to-rail performance of the amplifier, combined with its high open-loop voltage gain makes it unique among rail-to-rail CMOS amplifiers. The LMC6582/4 is an excellent choice for circuits where the input common-mode voltage range is a concern. The LMC6582/4 has been designed specifically to improve system performance in low voltage applications. Guaranteed operation down to 1.8V means that this family of amplifiers can operate at the end of discharge (EOD) voltages of several popular batteries. The amplifier's 80 fA input current, 0.5 mV offset voltage, and 82 dB CMRR maintain accuracy in battery-powered systems. For a single, dual or quad CMOS amplifier with similar specs and a powerdown mode, refer to the LMC6681/2/4 datasheet. Applications n n n n n n Battery Operated Systems Sensor Amplifiers Portable Communication Devices Medical Instrumentation Level Detectors, Sample-and-Hold Circuits Battery Monitoring Connection Diagrams 8-Pin DIP/SO 14-Pin DIP/SO DS012041-1 Top View DS012041-2 Top View (c) 1999 National Semiconductor Corporation DS012041 www.national.com LMC6582 Dual/LMC6584 Quad Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier May 1995 Ordering Information Package www.national.com Temperature Range NSC Transport Industrial, -40C to +85C Drawing Media Rails 8-pin Molded DIP LMC6582AIN, LMC6582BIN N08E 8-pin Small Outline LMC6582AIM, LMC6582BIM M08A Rails LMC6582AIMX, LMC6582BIMX M08A Tape and Reel Rails 14-pin Molded DIP LMC6584AIN, LMC6584BIN N14A 14-pin Small Outline LMC6584AIM, LMC6584BIM M14A Rails LMC6584AIMX, LMC6584BIMX M14A Tape and Reel 2 Absolute Maximum Ratings (Note 1) Junction Temperature (Note 4) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Differential Input Voltage Voltage at Input/Output Pin Supply Voltage (V+ - V-) Current at Input Pin (Note 11) Current at Output Pin (Note 3) Current at Power Supply Pin Lead Temp. (soldering, 10 sec.) Storage Temperature Range 150C Operating Ratings (Note 1) Supply Voltage Junction Temperature Range LMC6582AI, LMC6582BI LMC6584AI, LMC6584BI Thermal Resistance (JA) N Package, 8-pin Molded DIP M Package, 8-pin Surface Mount N Package, 14-pin Molded DIP M Package, 14-pin Surface Mount 2 kV Supply Voltage (V+) +0.3V, (V-) -0.3V 12V 5 mA 30 mA 35 mA 260C -65C to +150C 1.8V VS 10V -40C TJ +85C -40C TJ +85C 108C/W 172C/W 88C/W 126C/W 3V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 3.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS Parameter Conditions Input Offset Voltage LMC6582AI LMC6582BI Typ LMC6584AI LMC6584BI (Note 5) Limit Limit (Note 6) (Note 6) 0.5 Input Offset Voltage Units 1 3 mV 2.5 4.5 max 1.5 V/C Average Drift IB Input Current (Note 12) 0.08 20 20 pA max IOS Input Offset Current (Note 12) 0.04 10 10 pA max RIN Input Resistance CIN Input Capacitance CMRR Common Mode PSRR 3 82 70 Power Supply 1.5V VS 2.5V 82 Rejection Ratio VO = V+/2 = VCM 65 Input Common Mode CMRR > 50 dB 3.23 Voltage Range -0.3 AV VO pF (Note 13) Rejection Ratio VCM Tera >1 Large Signal Voltage Gain Output Swing RL = 600 (Notes 7, 12) RL = 10 k (Notes 7, 12) RL = 600 to V+/2 62 min 65 dB 62 min 3.18 3.18 V 3.00 3.00 min -0.18 -0.18 V 0.00 0.00 max 10 10 V/mV 12 12 V/mV 2.87 2.70 2.70 V 2.58 2.58 min 0.05 2.99 0.01 3 65 70 70 2.95 RL = 10 k to V+/2 dB 1000 0.15 RL = 2 k to V+/2 65 0.3 0.3 V 0.42 0.42 max 2.85 2.85 V 2.79 2.79 min 0.15 0.15 V 0.21 0.21 max 2.94 2.94 V 2.91 2.91 min 0.04 0.04 V 0.05 0.05 max www.national.com 3V DC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 3.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol ISC Parameter Output Short Circuit Conditions Sourcing, VO = 0V LMC6582AI LMC6582BI Typ LMC6584AI LMC6584BI (Note 5) Limit Limit (Note 6) (Note 6) 20 Current Sinking, VO = 3V IS Supply Current 12 Dual, LMC6582 VCM = 1.5V 1.4 Quad, LMC6584 VCM = 1.5V 2.8 Units 9.0 9.0 mA 6.7 6.7 min 6.0 6.0 mA 4.5 4.5 min 2.26 2.26 mA 2.75 2.75 max 4.52 4.52 mA 5.42 5.42 max 1.8V and 2.2V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 1.8V and 2.2V, V- = 0V, VCM = VO = V+/2 and RL > 1M . Boldface limits apply at the temperature extremes. Symbol VOS Parameter Input Offset Voltage Conditions V+ = 1.8V, VCM = 1.5V LMC6582AI LMC6582BI Typ LMC6584AI LMC6584BI (Note 5) Limit Limit (Note 6) (Note 6) 3 10 0.5 Units mV max V+ = 2.2V, VCM = 1.5V TCVos Input Offset Voltage 0.5 2 6 mV 3.8 7.8 max V+ = 2.2V 1.5 0.08 20 20 pA max 0.04 10 10 pA max 82 60 60 dB min dB min V/C Average Drift IB Input Current IOS Input Offset Current CMRR Common Mode V+ = 2.2V (Note 12) V+ = 2.2V (Note 12) V+ = 2.2V, (Note 13) Rejection Ratio V+ = 1.8V, (Note 13) 82 50 50 Power Supply 1.1V VS 5V, 82 70 65 dB Rejection Ratio VO = V+/2 = VCM V+ = 2.2V CMRR > 40 dB 65 62 min 2.38 2.2 2.2 V min -0.15 0.0 0.0 V max V+ = 1.8V CMRR > 40 dB 1.98 1.8 1.8 V min -0.10 0.0 0.0 V max PSRR VCM Input Common Mode Voltage Range VO Output Swing V+ = 2.2V RL = 2 k to V+/2 2.15 0.05 V+ = 1.8V RL = 2 k to V+/2 1.75 0.05 IS www.national.com Supply Current Dual, LMC6582 VCM = 1.5V 1.4 Quad, LMC6584 VCM = 1.5V 2.8 4 2.0 2.0 V 1.88 1.88 min 0.2 0.2 V 0.32 0.32 max 1.6 1.6 V 1.44 1.44 min 0.2 0.2 V 0.36 0.36 max 2.2 2.2 mA 2.7 2.7 max 4.4 4.4 mA 5.3 5.3 max 5V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 5.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS Parameter Input Offset Voltage Conditions VCM = 1.5V LMC6582AI LMC6582BI Typ LMC6584AI LMC6584BI (Note 5) Limit Limit (Note 6) (Note 6) 0.5 Input Offset Voltage Units 1 3 mV 2.5 4.5 max 1.5 V/C Average Drift IB Input Current (Note 12) 0.08 20 20 pA max IOS Input Offset Current (Note 12) 0.04 10 10 pA max RIN Input Resistance CIN Input Capacitance CMRR Common Mode 3 VCM 82 70 Power Supply 1.5V VS 2.5V, 82 Rejection Ratio VO = V+/2 = VCM Input Common Mode CMRR > 50 dB 5.3 Voltage Range -0.3 VO Output Swing RL = 2 k to V+/2 4.9 0.05 IS pF (Note 13) Rejection Ratio PSRR Tera >1 Supply Current Dual, LMC6582 VCM = 1.5V 1.5 Quad, LMC6584 VCM = 1.5V 3.0 5 65 dB 65 62 min 70 65 dB 65 62 min 5.18 5.18 V 5.00 5.00 min -0.18 -0.18 V 0.00 0.00 max 4.85 4.85 V 4.58 4.58 min 0.2 0.2 V 0.28 0.28 max 2.48 2.48 mA 3.00 3.00 max 4.96 4.96 mA 6.00 6.00 max www.national.com 10V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 10.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS Parameter Input Offset Voltage Conditions VCM = 1.5V LMC6582AI LMC6582BI Typ LMC6584AI LMC6584BI (Note 5) Limit Limit (Note 6) (Note 6) 0.5 Input Offset Voltage Units 1.5 3.5 mV 3.0 5.0 max 1.5 V/C Average Drift IB Input Current (Note 12) 0.08 20 20 pA max IOS Input Offset Current (Note 12) 0.04 10 10 pA max RIN Input Resistance CIN Input Capacitance CMRR Common Mode 3 VCM 82 65 Power Supply 1.1V V+ 5V, 82 Rejection Ratio VO = V+/2 = VCM Input Common Mode CMRR > 50 dB 10.30 Voltage Range -0.30 VO Output Swing RL = 2 k to V+/2 9.93 0.08 AV ISC 65 dB 62 62 min 70 65 dB 65 62 min 10.18 10.18 V 10.00 10.00 min -0.18 -0.18 V 0.00 0.00 max 9.7 9.7 V 9.58 9.58 min 0.3 0.3 V 0.42 0.42 max Large Signal RL = 2 k to V+/2 Sourcing 89 25 25 V/mV Voltage Gain (Note 12) Sinking 224 25 25 V/mV Output Short Circuit Sourcing, VO = 0V Current (Note 14) 65 Sinking, VO = 10V 70 (Note 14) IS pF (Note 13) Rejection Ratio PSRR Tera >1 Supply Current www.national.com Dual, LMC6582 VCM = 1.5V 1.6 Quad, LMC6584 VCM = 1.5V 3.2 6 30 30 mA 22 22 min 30 30 mA 22 22 min 3.0 3.0 mA 3.6 3.6 max 6.0 6.0 mA 7.2 7.2 max AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 3V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol SR Parameter Slew Rate Conditions (Note 8) Typ (Note 5) 1.2 V+ = 10V, (Note 10) 1.2 LMC6582AI LMC6582BI LMC6584AI LMC6584BI Limit Limit (Note 6) (Note 6) 0.7 0.7 0.55 0.55 0.7 0.7 0.55 0.55 Units V/s min GBW Gain-Bandwidth Product 1.2 MHz m Phase Margin 50 Deg Gm Gain Margin 12 dB 130 dB Input-Referred V+ = 10V (Note 9) f = 1 kHz Voltage Noise VCM = 0.5V Input-Referred f = 1 kHz 0.5 f = 1 kHz, AV = +1 RL = 10 k, VO = 2Vp-p 0.01 Amp-to-Amp Isolation en in 30 Current Noise T.H.D. Total Harmonic Distortion % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the electrical characteristics. Note 2: Human body model, 1.5 k in series with 100 pF. Note 3: Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output current in excess of 30 mA over long term may adversely affect reliability. Note 4: The maximum power dissipation is a function of TJ (max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/JA. All numbers apply for packages soldered directly into a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 3V, VCM = 0.5V. For sourcing and sinking, 0.5V VO 2.5V. Note 8: V+ = 3V. Connected as Voltage Follower with 2V step input, and output is measured from 0.8V to 2.2V. Number specified is the slower of the positive or negative slew rates. Note 9: Input referred, V+ = 10V, and RL = 100 k connected to 5V. Each amp excited in turn with 1 kHz to produce VO = 2 VPP. Note 10: V+ = 10V. Connected as voltage follower with 8V step Input, and output is measured from 2V to 8V. Number specified is the slower of the positive or negative slew rates. Note 11: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings. Note 12: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value. Note 13: CMRR+ and CMRR- are tested, and the number indicated is the lower of the two values. For CMRR+, V+/2 < VCM < V+ for 1.8V, 2.2V, 3V, 5V, and 10V. For CMRR-, 0 < VCM < V+/2 for 3V, 5V and 10V. For 1.8V and 2.2V, 0.25 < VCM < V+ -0.3. Note 14: V+ = 10V, VCM = 0.5V. For Sourcing tests, 1V VO 5V. For Sinking tests, 5V VO 9V. 7 www.national.com Typical Performance Characteristics Supply Current Per Amplifier vs Supply Voltage VS+ = 3V, Single Supply, TA = 25C unless otherwise specified. Sourcing Current vs Output Voltage Sinking Current vs Output Voltage DS012041-36 DS012041-37 DS012041-35 VOS vs VCM VOS vs VCM Input Voltage Noise vs Common-Mode Voltage DS012041-39 DS012041-40 DS012041-38 Frequency Response vs Temperature Frequency Response vs RL DS012041-41 www.national.com Input Voltage Noise vs Frequency DS012041-42 8 DS012041-43 Typical Performance Characteristics VS+ = 3V, Single Supply, TA = 25C unless otherwise specified. (Continued) Positive PSRR vs Frequency CMRR vs Frequency Negative PSRR vs Frequency DS012041-44 DS012041-45 Crosstalk Rejection vs Frequency Slew Rate vs Supply Voltage DS012041-46 Non-Inverting Large Signal Pulse Response DS012041-49 DS012041-47 Inverting Large Signal Pulse Response DS012041-48 Non-Inverting Small Signal Pulse Response DS012041-50 Inverting Small Signal Pulse Response DS012041-51 9 DS012041-52 www.national.com Typical Performance Characteristics VS+ = 3V, Single Supply, TA = 25C unless otherwise specified. (Continued) Stability vs Capacitive Load Stability vs Capacitive Load Stability vs Capacitive Load DS012041-53 DS012041-55 DS012041-54 Application Information 1.0 Input Common-Mode Voltage Range The LMC6582/4 has a rail-to-rail input common-mode voltage range. Figure 1 shows an input voltage exceeding both supplies with no resulting phase inversion on the output. DS012041-4 FIGURE 2. A 7.5V Input Signal Greatly Exceeds the 3V Supply, Causing No Phase Inversion Due to RI DS012041-3 FIGURE 1. An Input Signal Exceeds the LMC6582 Power Supply Voltages with No Output Phase Inversion The absolute maximum input voltage at V+ = 3V is 300 mV beyond either supply rail at room temperature. Voltages greatly exceeding this absolute maximum rating, as in Figure 2, can cause excessive current to flow in or out of the input pins, possibly affecting reliability. The input current can be externally limited to 5 mA, with an input resistor, as shown in Figure 3. DS012041-5 FIGURE 3. Input Current Protection for Voltages Exceeding the Supply Voltage 2.0 Rail-to-Rail Output The approximated output resistance of the LMC6582 is 50 sourcing, and 50 sinking at VS = 3V. The maximum output swing can be estimated as a function of load using the calculated output resistance. 3.0 Low Voltage Operation The LMC6582/4 operates at supply voltages of 2.2V and 1.8V. These voltages represent the End of Discharge voltages of several popular batteries. The amplifier can operate from 1 Lead-Acid or Lithium Ion battery, or 2NiMH, NiCd, or Carbon-Zinc batteries. Nominal and End of Discharge of Voltage of several batteries are listed below. www.national.com 10 3.0 Low Voltage Operation Battery Type Nominal Voltage (Continued) End of Discharge Voltage NiMH 1.2V NiCd 1.2V 1V 2V 1.8V Lead-Acid 1V Silver Oxide 1.6V 1.3V Carbon-Zinc 1.5V 1.1V 2.6V-3.6V 1.7V-2.4V Lithium At VS = 2.2V, the LMC6582/4 has a rail-to-rail input common-mode voltage range. Figure 4 shows an input voltage extending to both supplies and the resulting output. DS012041-8 FIGURE 6. An Input Voltage Signal Exceeds LMC6582/4 Power Supply Voltages of VS = 1.8V with No Output Phase Inversion 4.0 Capacitive Load Tolerance The LMC6582/4 can typically drive a 100 pF load with VS = 10V at unity gain without oscillating. The unity gain follower is the most sensitive configuration to capacitive load. Direct capacitive loading reduces the phase margin of op-amps. The combination of the op-amp's output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 7. If there is a resistive component of the load in parallel to the capacitive component, the isolation resistor and the resistive load create a voltage divider at the output. This introduces a DC error at the output. DS012041-6 FIGURE 4. The Input Common-Mode Voltage Range Extends to Both Supplies at VS = 2.2V The amplifier is operational at VS = 1.8V, with guaranteed input common-mode voltage range, output swing, and CMRR specs. Figure 5 shows the response of the LMC6582/4 at VS = 1.8V. DS012041-9 FIGURE 7. Resistive Isolation of a 350 pF Capacitive Load Figure 8 displays the pulse response of the LMC6582 circuit in Figure 7. DS012041-7 FIGURE 5. Response of the LMC6582/4 at VS = 1.8V Figure 6 shows an input voltage exceeding both supplies with no resulting phase inversion on the output. DS012041-10 FIGURE 8. Pulse Response of the LMC6582 Circuit in Figure 7 11 www.national.com 4.0 Capacitive Load Tolerance lay terminals, etc. connected to the op-amp's inputs, as in Figure 11. To have a significant effect, guard rings should be placed in both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 60 times degradation from the LMC6582/4's actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 would cause only 0.05 pA of leakage current. See Figure 12 for typical connections of guard rings for standard op-amp configurations. (Continued) Another circuit, shown in Figure 9, is also used to indirectly drive capacitive loads. This circuit is an improvement to the circuit shown Figure 7 because it provides DC accuracy as well as AC stability. R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifiers inverting input, thereby preserving phase margin in the overall feedback loop. The values of R1 and C1 should be experimentally determined by the system designer for the desired pulse response. Increased capacitive drive is possible by increasing the value of the capacitor in the feedback loop. DS012041-11 FIGURE 9. The LMC6582 Compensated to Ensure DC Accuracy and AC Stability The pulse response of the circuit shown in Figure 9 is shown in Figure 10. DS012041-14 FIGURE 11. Example of Guard Ring in PC Board Layout DS012041-12 FIGURE 10. Pulse Response of the LMC6582 Circuit Shown in Figure 9 5.0 Printed-Circuit-Board Layout for High-Impedance Work It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low input current of the LMC6582/4, typically 80 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6582/4's inputs and the terminals of capacitors, diodes, conductors, resistors, rewww.national.com 12 5.0 Printed-Circuit-Board Layout for High-Impedance Work (Continued) 6.0 Compensating for Input Capacitance It is quite common to use large values of feedback resistance with amplifiers that have ultra-low input current, like the LMC6582/4. Large feedback resistors can react with small values of input capacitance due to transducers, photodiodes, and circuits board parasitics to reduce phase margins. DS012041-15 Inverting Amplifier DS012041-13 FIGURE 14. Canceling the Effect of Input Capacitance The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor (as in Figure 14), CF, is first estimated by: DS012041-16 Non-Inverting Amplifier or R1CIN R2CF which typically provides significant overcompensation. Printed circuit board stray capacitance may be larger or smaller than that of a breadboard, so the actual optimum value for CF may be different. The values of CF should be checked on the actual circuit. (Refer to the LMC660 quad CMOS amplifier data sheet for a more detailed discussion.) DS012041-17 Follower FIGURE 12. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 13. 7.0 Spice Macromodel A Spice Macromodel is available for the LMC6582/4. The model includes a simulation of: * Input common-mode voltage range * Frequency and transient response * GBW dependence on loading conditions * Quiescent and dynamic supply current * Output swing dependence on loading conditions and many more characteristics as listed on the macromodel disk. Contact the National Semiconductor Customer Response Center at 1-800-272-9959 to obtain an operational amplifier spice model library disk. DS012041-18 FIGURE 13. Air Wiring 13 www.national.com Applications Low Voltage Peak Detector Transducer Interface Circuits A. PIEZ0ELECTRIC TRANSDUCERS DS012041-21 FIGURE 15. Transducer Interface Application DS012041-26 The LMC6582/4 can be used for processing of transducer signals as shown in the circuit below. The two 11 M resistors provide a path for the DC currents to ground. Since the resistors are boot-strapped to the output, the AC input resistance of the LMC6582/4 is much higher. FIGURE 18. Low Voltage Peak Detector The accuracy of the peak detector is dependent on the leakage currents of the diodes and the capacitor, and the non-idealities of the amplifier. The parameters of the amplifer which can limit the performance of this circuit are (a) Finite slew rate (b) Input current, and (c) Maximum output current of the amplifier. The input current of the amplifier causes a slow discharge of the capacitor. This phenomenon is called "drooping". The LMC6582/4 has a typical input current of 80 fA. This would cause the capacitor to droop at a rate of dv/dt = IB/C = 80 fA/ 100 pF = 0.8 mV/s. Accuracy in the amplitude measurement is also maintained by an offset voltage of 0.5 mV, and an open-loop gain of 120 dB. Oscillators DS012041-22 FIGURE 16. LMC6582 Used for Signal Processing An input current of 80 fA and a CMRR of 82 dB causes an insignifcant error offset voltage at the output. The rail-to-rail performance of the amplifier also provides the maximum dynamic range for the transducer signals. B. PHOTODIODE AMPLIFIERS DS012041-27 FIGURE 19. 1 Hz Square-Wave Oscillator For single supply 5V operation, the output of the circuit will swing 0V to 5V. The voltage divider set by the resistors will cause the input at the non-inverting terminal of the op-amp to move 13 (1.67V) of the supply voltage to 23 (3.33V) of the supply voltage. This voltage behaves as the threshold voltage, and causes the capacitor to alternately charge and discharge. R1 and C1 determine the time constant for the circuit. The frequency of oscillation, fOSC is DS012041-23 FIGURE 17. Photodiode Amplifier Photocells can be used in light measuring instruments. An error voltage is produced at the output due to the input current and the offset voltage of the amplifier. The LMC6582/4 which can be operated off a single battery is an excellent choice for this application because of its 80 fA input current and 0.5 mV offset voltage. where t is the time the amplifier input takes to move from 1.67V to 3.33V. The calculations are shown below. where = RC = 0.68 seconds www.national.com 14 Oscillators (Continued) t1 = 0.27 seconds and The LMC6582/4, with its rail-to-rail input common mode voltage range and high gain (120 dB typical, RL = 10 k) is extremely well suited for such filter applications. The rail-to-rail input range allows for large input signals to be processed without distortion. The high gain means that the circuit can provide filtering and gain in one stage, instead of the typical two stage filter. This implies a reduction in cost, and a savings of space and power. t2 = 0.74 seconds Then, This is an illustration of a conceptual use of the LMC6582/4. The selectivity of the filter can be improved by increasing the order (number of poles) of the design. z 1 Hz Sample-and-Hold Circuits LMC6582/4 as a Comparator DS012041-28 FIGURE 20. Comparator with Hysteresis Figure 20 shows the application of the LMC6582/4 as a comparator. The hysteresis is determined by the ratio of the two resistors. Since the supply current of the LMC6582/4 is less than 1 mA per amplifier, it can be used as a low power comparator, in applications where the quiescent current is an important parameter. Typical propagation delays @ VS = 3V would be on the order of tPHL = 6 s, and tPLH = 5 s. DS012041-31 FIGURE 22. Sample-and-Hold Application When the "switch" is closed during the sample interval, CHOLD charges up to the value of the input signal. When the "switch" is open, CHOLD retains this value as it is buffered by the high input impedance of the LMC6582/4. Errors in the "hold" voltage are caused by the input current of the amplifier, the leakage current of the CD4066, and the leakage current of the capacitor. While an input current of 80 fA minimizes the accumulation rate for error in the circuit, the LMC6582/4's CMRR of 82 dB allows excellent accuracy throughout the amplifier's rail-to-rail dynamic capture range. Filters Battery Monitoring Circuit DS012041-29 DS012041-33 FIGURE 21. Wide-Band Band-Pass Filter FIGURE 23. Circuit Used to Sense Charging. The filter shown in Figure 21 is used to process "voice-band" signals. The bandpass filter has a flatband gain of 40 dB. The two corner frequencies, f1 and f2, are calculated as: 15 www.national.com Battery Monitoring Circuit The LMC6582/4 has been optimized for performance at 3V, and also has guaranteed specs at 1.8V and 2.2V. In portable applications, the RLoad represents the laptop/notebook, or any other computer which the battery is powering. A desired output voltage can be achieved by manipulating the ratios of the feedback resistors. During the charging cycle, the current flows out of the battery as shown. While during discharge, the current is in the reverse direction. Since the current can range from a few milliamperes to amperes, the amplifier will have to sense a signal below ground during the discharge cycle. At 3V, the LMC6582/4 can accept a signal up to 300 mV below ground. The common-mode voltage range of the LMC6582/4, which extends beyond both rails is thus a very useful feature in this application. A typical offset voltage of 0.5 mV, and CMRR of 82 dB maintain accuracy in the circuit outputs while the rail-to-rail output performance allows for a maximum signal range. (Continued) DS012041-34 FIGURE 24. Circuit used to Sense Discharging www.national.com 16 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin Small Outline Package Order Number LMC6582AIM or LMC6582BIM NS Package Number M08A 14-Pin Small Outline Package Order Number LMC6584AIM or LMC6584BIM NS Package Number M14A 17 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin Molded Dual-In-Line Package Order Number LMC6582AIN or LMC6582BIN NS Package Number N08E 14-Pin Molded Dual-In Line Package Order Number LMC6584AIN or LMC6584BIN NS Package Number N14A www.national.com 18 LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Francais Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. LMC6582 Dual/LMC6584 Quad Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier Notes