W24010/LL Winbond: eEchoe Electronics Carp. ore 128K x 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24010 is a normal-speed, very low-power CMOS static RAM organized as 131072 x 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES Low power consumption: Three-state outputs Active: 350 mW (max.) Battery back-up operation capability Standby: 250 pW (max.) Data retention voltage: 2V (min.) Access time: 55/70 nS (max.) Packaged in 32-pin 600 mil DIP, 450 mil SOP, Single 5V power supply standard type one TSOP (8 mm x 20 mm) and * Fully static operation small type one TSOP (8 mm x 13.4 mm) * All inputs and outputs directly TTL compatible PIN CONFIGURATIONS BLOCK DIAGRAM ne L)1 i se [] Voo Ald mete sD ae os wt oD os) | oe Alz u 4 23 U WE AP E 126 X 8 COLUMNS av [5 za L] ats Ar B as Lle o7 |] Aa as 5 as [7 ze |] Ag ~ m (Os ps LJ ant van as Ll va L] OE Was a2 [] 10 za [J aio a Tyas 22 1] esi we AISAISABATAQATIAIO ao [Jie 21 LJ vos oa vor LJ is 20 [| voz = vor [14 ia] 108 vos [jis ia [J vos vss C16 17 [woe PIN DESCRIPTION SYMBOL DESCRIPTION aicfro Be AO-A16 Address Inputs ee: 2 Se 101-08 | Data Inputs/Outputs a =i ate Si. cs2 | Chip Select Input eS ie ne Bi WE Write Enable Input eel ZB OE Output Enable Input eos @ Se VDD Power Supply Vss Ground NC No Gonnection Publication Release Date: March 1999 -_]- Revision A6W24010/LL cE, & Winbond TRUTH TABLE csi | CS2| OF | WE MODE /O1- /O8 Vpp CURRENT H Xx x Xx Not Selected High 7 Isp, IsB1 x L x x Not Selected High 2 ISB, ISB1 L H H H Output Disable High 7 IDD L H L H Read Data Out IDD L H x L Write Data In IDD DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT Supply Voltage to Vss Potential -0.5 to +7.0 Vv Input/Output to Vss Potential -0.5 to VoD +0.5 V Allowable Power Dissipation 1.0 W Storage Temperature -65 to +150 C Operating Temperature 0 ta 70 a Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VbbD = 5V +10%; Vss = OV; Ta = 0 C to 70 C) PARAMETER SYM. TEST CONDITIONS MIN. |TYP.* | MAX. | UNIT Input Low Voltage VIL - -0.5 - +0.8 Vv Input High Voltage VIH - +2.2 - VbD+0.5 Vv Input Leakage Current | ILI | VIN = Vssto VDD -1 - +1 LA Ouiput Leakage ILO | Wo =Vss to Vop, CS =Vin(min) | 71 - HI HA Current AL . or OE = Vi (min.) or WE = VIL (max.)} Output Low Voltage VoL | loL=+2.1 mA - - 0.4 Vv Output High Voltage VOH | lOH=-1.0mA 2.4 - - Vv Operating Power IDD 16S =VIL (max.), VO=0 mA 55 - - 80 mA Supply Current Cycle = min., Duty = 100% | 70 - - 70 mA Standby Power ISB_ | GS = VIH (min.), Cycle = min. - 3 mA Supply Current Duty = 100% IsB1 | CS > Vpp -0.2V - 1.0 50 nA Note: Typical parameter is measured under ambient temperature TA = 25 C and Vpp = 5V.W24010/LL Atty & Winbond CAPACITANCE (Von = 5 V, Ta = 25 C, f= 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN =0V 6 pF Input/Output Capacitance Cro VOUT = OV 8 pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels OV to 3.0V Input Rise and Fall Times 5 nS Input and Output Timing Reference Level 1.5V Output Load See the drawing below AC Test Loads and Waveform 1 TTL OUTPUT I 100 pF + Including ~ Jig and Scope 11TL OUTPUT I 5 pF L Including Jig and Scope (For Teiz, Toiz, Teuz, Touz, TwHz, Tow) 3.0V 90% Ss0% 1, ov 10% 10% 5ns 5ns Publication Release Date: March 1999 Revision A6W24010/LL Athy @ Winbond SOR Electronics Corn, SIRES I SIDS IIIS IIIS II IIIS AC Characteristics, continued (Vpp = 5V 410%; Vss = OV; Ta = 0 C to 70C) Read Cycle PARAMETER SYM. W24010-55LL W24010-70LL UNIT MIN. MAX. MIN. MAX. Read Cycle Time TRC 55 - 70 - ns Address Access Time TAA - 55 - 10 ns Chip Select Access Time TACS - 55 - 70 ns Output Enable to Output Valid TAGE - 30 - 35 ns Chip Selection to Output in Low 2 TCLz* 10 - 10 - ns Output Enable to Output in Low 2 ToLz* 5 - 5 - ns Chip Deselection to Output in High Z | TCHz* - 25 - 30 ns Output Disable to Output in High 7 TOHZ* - 25 - 30 ns Output Hold from Address Change TOH 10 - 10 - ns +These parameters are sampled but not 100% tested Write Cycle PARAMETER SYM. | W24010-55LL W24010LL-70 UNIT MIN. MAX. | MIN. MAX. Write Cycle Time Twe 55 - 70 - ns Chip Selection to End of Write Tow 40 - 50 - ns Address Valid to End of Write TAW 40 - 50 - ns Address Setup Time TAS 0 - 0 - ns Write Pulse Width TWP 40 - 50 - ns Write Recovery Time | GS1,CS2, WE | TWR 0 - 0 - ns Data Valid to End of Write TDW 30 - 30 - ns Data Hold from End of Write TDH 0 - 0 - ns Write to Output in High 7 TWHz* - 20 - 25 ns Output Disable to Output in High 7 TOHZ* - 20 - 25 ns Output Active from End of Write Tow 5 - 5 - ns *These parameters are sampled but not 100% testedW24010/LL Winbond fetthey, SPIRIT, TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TR Address TAA Dour KKM Read Cycle 2 (Chip Select Controlled) a \AAAYS CGs2 PL LLL LS Dout | | # ToLz Read Cycle 3 (Output Enable Controlled) Address csi cse2 Dout Publication Release Date: March 1999 -5- Revision A6W24010/LL ThE, Winbond ett SOP I III III TTI, Timing Waveforms, continued Write Cycle 1 Accress OE LL LL) TWH AAAAAAKL RS ALS SS SS SLL WN = SILITITS YAAANAAAN 2 | A Dour 4444 LSS TOW e TDH " << xXXXXX Write Cycle 2 (OE = Vi Fixed) Address x c = \AXXXAAA LLLLLLLLL cs2 / / / / / f/f \A AAAAAA DIN ve x Xx Xx x Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output fram Dout are the same as the data written to DIN during the write cycle. 3. Bout provides the read data for the next address. 4. Transition is measured +500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. _6-an G Winbond NE Flectronics Corn. W24010/LL SRR TITIES DATA RETENTION CHARACTERISTICS (Ta = 0 C to 70 C) PARAMETER SYM. TEST CONDITIONS MIN. | TYP. | MAX. | UNIT VoD for Data Retention VDR CS > Vpp -0.2V 2.0 - - V Data Retention Current IDDDR | CS = Vpp -0.2V, VoD = 3V - - 20 nA Chip Deselect to Data TcDR | See data retention waveform 0 - - ns Retention Time Operation Recovery Time TR TRC - - ns * Read Cycle Time DATA RETENTION WAVEFORM VDD csi CS2 WANN K CS 2 VED -0.2V Publication Release Date: March 1999 Revision A6W24010/LL an G Winbond NE Flectronics Corn. SRR TITIES ORDERING INFORMATION PART NO. ACCESS OPERATING STANDBY PACKAGE TIME (nS) CURRENT CURRENT MAX. (mA) MAX. (mA) W24010-55LL 55 80 50 600 mil DIP W24010-70LL 70 70 50 600 mil DIP W240108-55LL 55 80 50 450 mil SOP W240108-70LL 70 70 50 450 mil SOP W24019T-558LL 55 80 50 Standard type one TSOP W24010T-70LL 70 70 50 Standard type one TSOP W24010Q-55LL 55 80 50 Small type cne TSOP W24010Q-70LL 70 70 50 Small type cne TSOP Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.aq52 ! Winbond ott Electronics Corn, fetthey, W24010/LL SRR TITIES PACKAGE DIMENSIONS 32-pin P-DIP At) Base Plane Seating Plane Dimension in inches: Dimension in mm Symbol Tin [Nom | Max| Min. [Nom | Max A | |o2n!] | [533 Al oo1o | | J|o2zs | | Ae [ots 018s jotso |3e1 | as4 | 408 B o.018 |0.018 ooze | o.4t | O48 | 058 B 0048 | 0.050 | 0054 | 122 127 137 c 0.008 |0.010 |oo14 | 020 O25 0.38 D _|1-850 | 1.660 | [4191 [42.16 E 0580 | 0600 [0619 |14so |15.24 | 1549 Ei O545 | 0.550 |ops5 [1364 | 1397 | 14.10 ae 0.090 (0100 |O116 | 229 | 254 | 279 L 0120 /0130 |o0140 | 3.05 330 BBB a o | 16 o | 15 Ga 0.630 |o850 |O670 | 16.00 | 16851 | 17.02 Ss _ | 0085 _ _ B16 Notes: e 4. Dimensions DMax. & S include mold flash or lc tle bar burrs. f \ 2. Dimension E71 does not include interlead flash. i i t 3. Dimensions D & E11 include mold mismatch ant are determined at the mold parting line. 4. Dimension Bi does not include dambar protrugion/intrugion 5, Controlling dimengion: Inches a 6. General appearance spec. should be based on final visual inspection spec 32-pin SOP Wide Body SARARSSHRERARREE 4 o BHERERHSHEEE Seating Plane HEH 4 b 6 am Dimension in Inches Dimension in mm Symbal 7 7 Min. | Nom. | Max. | Min. [Nom | Max. A | [atte | | | 300 A, ooo4 | | joto | | Ae ofo1 |G1o8 |O111 | esr | zee | 2az b oot4 foots |ooz | 028 |o41 | ost G 0.008 jocos [Ootz | O15 | 0z0 | 031 Db _|os05 jost7 | |zo4s [2075 E o44o [0.445 [asso [1148 |1tao |11.43 fe] oo44 jooso jooss | ide | ter | 142 He o.sda josse fossa |ise7 [1442 [14.39 L oor joost |ooe joss jore | og Detail F Le Oof7 jooss [ooss | 149 | 140 | 120 s | |ooe | | ] ot _ | oc | | oto og o | | to O | 10 Notes: 1. Dimensions D Max. & 3 include mold flash 2 or tie bar burrs 2, Dimension b does not include dambar poo, c protrusionintrusian fi - | 3. Dimensions D & E include mold mismatch 1 i U t and determined at the mold parting line. 4. Gontrolling dimension: Inches ee Detail F 4 b wn General appearance spec should be based on final visual inspection spec. Publication Release Date: March 1999 - 9- Revision A6aq52 . inbond ott Electronics Corn, fetthey, SRR TITIES Package Dimensions, continued 32-pin Standard Type One TSOP W24010/LL Ho CTTUTTT TTT Dimension in Inches Dimension in mm Symbol Min. | Nom. | Max. | Min. | Nom. | Max. A | 7 | oo | a | 7 | 120 Ay [0002] | 0.008 | 005) | 0.15 Ae | 0.037 | 0.039 | 0.041 | 995 | 4.00 | 1.05 6 0.007 | 0.008 | po0g | 0.17 | 0.20 | 0.23 c 0.005 | 0.006 | 0.007 | O12 | O15 | O17 D 0.720 | 0.724 | a.728 | 18.30 | 18.40 | 18.50 E 0211 |0.315| o319 | 7.90 | 8.00 | 8.10 Hp | 0780 | 0.787] 0.795 |19.80) 2000) 2020 e | o020 | 050]; L 0.016 | 0.020] oo24] 0.40] 050] oso L- j|ocs1) | 0.80 _ o.coo] | 0.004] ooo} | o.10 6 1 3 5 1 3 5 Controlling dimension: Millimeters 32-pin Small Type One TSOP Ho symbol Dimension in Inches | Dimension in mm Min. |Nom. | Max. | Min. |Nom.| Max A _ 7 | 0049] 7 7 125 A, | 0002} | 0008/005} | ots A | 0.037 | 0.039] o o41| 0.95] 1.00] 1.05 b | o.cc7 |9.008] 9.008] 0.17) 220) o27 Cc |o.coss|o.005 0.0082| 0.14] 0.15] 0.16 D | 0461 | o46s| 0.469 [11.70] 11.80] 11.90 E |oai1 [0315/0319 | 7.90] 8.00] 8.10 Ho | 0820 | 0.528] 0.536 [13.20 |13.40| 13.60 e =| 0.020 [oso| L | o.e1z| 0.020] c.028 | 030] 9.50] 0.70 L: | 0027] 0.675) | - Y |oco| [ooo fooo| | o.10 8 Q a | 5 o | 3 5 Controlling dimension: Millimeters -i0-Winbond chide Flectronics Corp & TES. VERSION HISTORY & W24010/LL AIR IERIE SONI III IIIB IOI II RE SMI INI III IRIS SOI IIIB SIDI D ESI DDSI DI DID IB OOISIII ODI SOD IIIS DIDI I ISOS ISIS OS IOI I ESO DB DII ENE SID IDOI ISIS IS SSDI IBID III D DESO DIDI I ES ISII OOO SOOO SION VERSION DATE PAGE DESCRIPTION A4 Apr. 1998 Add standby power supply current (I8B1) typical parameter when operation temperature TA = 25 C AS Dec. 1998 1, 2, 8, 10, 11 Deduct reverse type one TSOP package Add access time: 55 nS (max.) A6 Mar. 1999 Change 55 ns: TACE from 27 to 30 nS TbDw from 25 to 30 nS Gh Winbond hike Electronics Corp. Sasser Ve we & Faie-nivlesviat % Taipad Ohice ee TSG805 tSvaoe Winbond Electronics (H.R) Lid, Fn. B03, Wer 425 Hol fun Rel Ryn Bowie, He ieng, SEN PI SFOOS fee. S. hMineSheng East Ag, -/ii- nig Trade Sauare, Power 8, Winbond Fhactronios Nerth &merigg Sor. Winbond Memory Lab. Winbond Microslectronics Com, Winbood Sysiams Lab. STey HL Furst Street, San lose, GA SiS. ASA, FANT 48 S447 758 Mt APRONHMots ae SURO OS ote tage DAR Tite Publication Release Date: March 1999 Revision A6