AIM5D05K060M2 AIM5D05K060M2S Dual-In-Line Package Intelligent Power Module Features External View 1 23 15 16 Size: 33.4 x 15 x 3.6 mm UL Recognized: UL1557 File E345245 600V-5A (Trench Shielded Planar Gate IGBT) 3 phase Inverter module including HVIC drivers Built-in bootstrap diodes with integrated current-limiting resistor Control supply under-voltage lockout protection (UVLO) Over-temperature (OT) protection (VOT) - pin open Temperature monitoring (VOT) - 10k resistor connection Short-circuit current protection (CSC) Fault out signal (VFO) corresponding to SC, UV and OT fault Wide input interface (3-18V), Schmitt trigger receiver circuit (Active High) Isolation ratings of 2000Vrms/min Applications AC 100-240Vrms class low power motor drives like refrigerator, dishwasher, fan motor, washing machine, and air-conditioner Internal Equivalent Circuit / Pin Configuration VB(U) (1) UVB VB(V) (2) VVB (23) NC (22) P UHO VB(W) (3) WVB UVS (21) U VHO VVS VD(H) (4) VDD IN(UH) (5) UHIN WHO WVS IN(VH) (6) VHIN IN(WH) (7) WHIN COM (8) COM IN(UL) (9) ULIN IN(VL) (10) VLIN IN(WL) (11) WLIN VD(L) (12) VDD VFO (13) FO CSC (14) CSC VOT (15) VOT (19) W ULO (18) NU VLO (17) NV WLO COM Rev. 1.1 October 2018 (20) V www.aosmd.com (16) NW Page 1 of 13 AIM5D05K060M2 / AIM5D05K060M2S Ordering Information Part Number Temperature Range Package Pin Length Description AIM5D05K060M2 AIM5D05K060M2S -40C to 150C -40C to 150C IPM-5 IPM-5A Normal Short AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. 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Pin Description Pin Number Pin Name 1 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving 2 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving 3 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving 4 VD(H) High-Side Common Bias Voltage for IC and IGBTs Driving 5 IN(UH) Signal Input for High-Side U-Phase 6 IN(VH) Signal Input for High-Side V-Phase 7 IN(WH) Signal Input for High-Side W-Phase 8 COM Common Supply Ground 9 IN(UL) Signal Input for Low-Side U-Phase 10 IN(VL) Signal Input for Low-Side V-Phase 11 IN(WL) Signal Input for Low-Side W-Phase 12 VD(L) Low-Side Common Bias Voltage for IC and IGBTs Driving 13 VFO Fault Output 14 CSC Capacitor (Low-Pass Filter) for Short-circuit Current Detection Input 15 VOT Voltage Output of LVIC Temperature 16 NW Negative DC-Link Input for W-Phase 17 NV Negative DC-Link Input for V-Phase 18 NU Negative DC-Link Input for U-Phase 19 W Output for W-Phase 20 V Output for V-Phase 21 U Output for U-Phase 22 P Positive DC-Link Input 23 NC Rev. 1.1 October 2018 Pin Function No Connection www.aosmd.com Page 2 of 13 AIM5D05K060M2 / AIM5D05K060M2S Absolute Maximum Ratings TJ = 25C, unless otherwise specified. Symbol Parameter Conditions Ratings Units Inverter VPN Supply Voltage Applied between P - NU,NV,NW 450 V VPN(surge) Supply Voltage (surge) Applied between P - NU,NV,NW 500 V VCES Collector-Emitter Voltage IC Output Phase Current 600 V TC=25C, TJ<150C 5 A TC=100C, TJ<150C 3 A 10 A IPK Output Peak Phase Current TC=25C, less than 1ms pulse width tSC Short Circuit Withstand Time VPN400V, TJ=150C, VD=15V PC Collector Dissipation TC=25C, per chip TJ Operating Junction Temperature 5 s 18.9 W -40 to 150 C Control (Protection) VD Control Supply Voltage Applied between VD(H)-COM, VD(L)-COM 25 V VDB High-Side Control Bias Voltage Applied between VB(U)-U, VB(V)-V, VB(W)-W 25 V VIN Input Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM VD0.5 V VFO Fault Output Supply Voltage Applied between VFO - COM 50.5 V IFO Fault Output Current Sink current at VFO terminal 1 mA VSC Current Sensing Input Voltage Applied between CSC - COM 50.5 V VOT Temperature Output Applied between VOT - COM 50.5 V Total System VPN(PROT) Self Protection Supply Voltage Limit (Short-circuit protection capability) VD=13.5-16.5V, Inverter part TJ=150C, Non-repetitive, less than 2s 400 V TC Module Case Operation Temperature Measurement point of TC is provided in Figure 1 -30 to 125 C TSTG Storage Temperature -40 to 150 C 2000 Vrms VISO 60Hz, sinusoidal, AC 1min, between connected all pins and heat sink plate Isolation Voltage Power pins IPM 13.03mm 0.43mm TC point IGBT chip position Heat sink side Control pins Figure 1. TC Measurement Point Thermal Resistance Symbol Parameter Rth(j-c)Q Rth(j-c)F Junction to Case Thermal Resistance (1) Conditions Min. Typ. Max. Units Inverter IGBT (per 1/6 module) - - 6.6 K/W Inverter FWD (per 1/6 module) - - 8.5 K/W Note: 1. For the measurement point of case temperature (TC), please refer to Figure 1. Rev. 1.1 October 2018 www.aosmd.com Page 3 of 13 AIM5D05K060M2 / AIM5D05K060M2S Electrical Characteristics TJ = 25C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units IC=2.5A, TJ=25C - 1.48 1.85 V IC=2.5A, TJ=125C IF=2.5A, TJ=25C - 1.69 - V - 1.75 2.15 V 0.40 0.80 1.40 s - 0.10 0.40 s - 0.85 1.45 s - 0.12 0.30 s Inverter VCE(SAT) Collector-Emitter Saturation Voltage VD=VDB=15V, VIN=5V VF FWD Forward Voltage VIN=0 tON tC(ON) tOFF VPN=300V, VD=VDB=15V IC=2.5A, TJ=25C, VIN=0V 5V Inductive load (high-side) Switching Times tC(OFF) trr ICES Collector-Emitter Leakage Current - 0.18 - s TJ=25C - - 1 mA TJ=125C - - 10 mA VD(H)=15V, IN(UH, VH, WH)=0V VD(L)=15V, IN(UL, VL, WL)=0V VD(H) - COM - - 0.1 mA VD(L) - COM - - 2.1 mA VB(U)-U, VB(V)- V, VB(W)- W - - 0.3 mA 0.48 V 600 0.51 - ns VCE=VCES Control (Protection) IQDH Quiescent VD Supply Current IQDL IQDB Quiescent VDB Supply Current VSC(ref) Short-Circuit Trip Level VDB=15V, IN(UH, VH, WH)=0V VD=15V (2) tCSC CSC Input Filter Time VSC=1V 0.45 - UVDT Trip Level 10.3 11.4 12.5 V UVDR Reset Level 10.8 11.9 13.0 V Trip Level 8.5 9.5 10.5 V Reset Level 9.5 10.5 11.5 V UVDBT Supply Circuit Under-Voltage Protection UVDBR VOT Temperature Output Pull-down (3) R=10k LVIC Temperature=80C 2.36 2.45 2.55 V LVIC Temperature=25C 0.77 1.00 1.25 V OTT Over-Temperature (4) Protection VD=15V, Detect LVIC Temperature Trip Level 110 130 150 C - 30 - C Fault Output Voltage 4.9 - - V VSC=1V, VFO Circuit: 10k to 5V pull-up OTHYS VFOH VFOL tFO Fault Output Pulse Width IIN Input Current Vth(on) ON Threshold Voltage Hysteresis of Trip Reset VSC=0V, VFO Circuit: 10k to 5V pull-up (5) Vth(off) OFF Threshold Voltage Vth(hys) ON/OFF Threshold Hysteresis Voltage VF(BSD) Bootstrap Diode Forward Voltage RBSD Built-in Limiting Resistance VIN=5V Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM - - 0.5 V 20 - - s - 1.0 - mA 2.3 2.6 V V 0.8 1.2 - 1.1 - V IF=10mA Including Voltage Drop by Limiting Resistor (6) 1.0 1.5 2.0 V Included in Bootstrap Diode 80 100 120 Notes: 2. Short-circuit protection works only for low sides. 3. The IPM does not shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level that the user defined, the controller (MCU) should stop the IPM. Temperature of LVIC vs. V OT output characteristics is described in Figure 3. 4. When the LVIC temperature exceeds OT Trip temperature level (OTT), OT protection is triggered and fault outputs. 5. Fault signal (FO) outputs when SC, UV or OT protection is triggered. FO pulse width is different for each protection mode. At SC failure, FO pulse width is a fixed width (minimum 20s), but at UV or OT failure, F O outputs continuously until recovering from UV or OT state. (But minimum FO pulse width is 20s). 6. The characteristics of bootstrap diodes are described in Figure 2. Rev. 1.1 October 2018 www.aosmd.com Page 4 of 13 140 140 30 30 120 120 25 25 20 20 IF [mA] IF (mA) AIM5D05K060M2 / AIM5D05K060M2S 15 15 10 10 5 5 8080 IF (mA) IFIF[mA] (mA) IF (mA) 100 100 6060 4040 2020 00 6 87 98 1011 9 1011 12131415 6 7 12131415 0 01 12 23 34 45 5 V VVFF [V] (V) F (V) 0 0 0 0.5 0 0.5 1 1 1.5 1.5 2 2 2.5 32.5 3.53 3.5 (V) Magnified Magnified View VF (V)VVMagnified View View FF [V] Figure 2. Built-in Bootstrap Diode VF-IF Characteristic (@TA=25C) 4.1 max typ 3.7 min 3.3 VOT Output [V] 2.9 2.55 2.45 2.36 2.5 3.5 2.1 1.7 1.3 0.9 0.5 20 30 40 50 60 70 80 90 100 110 120 130 Temperature [] Figure 3. Temperature of LVIC vs. VOT Output Characteristics Rev. 1.1 October 2018 www.aosmd.com Page 5 of 13 AIM5D05K060M2 / AIM5D05K060M2S Inside IC Temperature Signal VOT MCU Ref 10k Figure 4. VOT Output Circuit (1) Connect 10k to VOT pin if temperature monitoring function is utilized; otherwise if the VOT pin is left unconnected, the internal over-temperature shutdown function is used instead. (2) In the case of using VOT with low voltage controller like 3.3V MCU, VOT output might exceed control supply voltage 3.3V when temperature rises excessively. If system uses low voltage controller, it is recommended to insert a clamp diode between control supply of the controller and VOT output for preventing over voltage destruction. Mechanical Characteristics and Ratings Symbol Parameter Mounting torque Conditions Mounting Screw: M3 (7) Weight Flatness Refer to Figure 5 Min. Typ. Max. Units 0.59 0.69 0.78 Nm - 5.25 - g -50 - 100 m Min. Typ. Max. Units 0 300 400 V 13.5 15.0 16.5 V 13.5 15.0 18.5 V -1 - 1 V/s 1.0 - - s - - 20 kHz 0.5 - - s 0.5 - - s -5.0 - 5.0 V Note: 7. Plain washers (ISO 7089-7094) are recommended. + - Heat sink side + Heat sink side Figure 5. Flatness Measurement Positions Recommended Operation Conditions Symbol VPN Parameter Conditions Supply Voltage Applied between P-NU, NV, NW Applied between VD(H) - COM, VD(L) - COM Applied between VB(U)-U, VB(V)-V, VB(W)-W VD Control Supply Voltage VDB High-Side Bias Voltage dVD/dt, dVDB/dt Control Supply Variation tdead Arm Shoot-Through Blocking Time For each input signal fPWM PWM Input Frequency -40C < TJ < 150C PW IN(ON) PW IN(OFF) COM Minimum Input Pulse Width COM Variation (8) Between COM - NU, NV, NW (including surge) Note: 8. IPM may not respond if the input pulse width is less than PWIN(ON), PWIN(OFF). Rev. 1.1 October 2018 www.aosmd.com Page 6 of 13 AIM5D05K060M2 / AIM5D05K060M2S Time Charts of the IPM Protective Function Low-side control input 6 Protection circuit state SET RESET 3 Internal gate 4 SC trip current level 8 Output current IC 1 7 2 SC reference voltage Sense voltage of the shun resistor Delay by RC filtering 5 Fault output FO Figure 6. Short-Circuit Protection (Low-side Operation Only with the External Shunt Resistor and RC Filter) (1) (2) (3) (4) (5) (6) (7) (8) Normal operation: IGBT turns on and outputs current. Short-circuit current detection (SC triggered). All low-side IGBTs' gates are hard interrupted. All low-side IGBTs turn OFF. FO output time (tFO)=minimum 20s. Input = "L" : IGBT OFF. Fault output finishes, but output current will not turn on until next ON signal (LH). Normal operation: IGBT turns on and outputs current. Control Input Protection circuit state RESET UVDR Control supply voltage VD SET RESET 6 1 UVDT 3 2 4 7 Output current IC Fault output FO 5 Figure 7. Under-Voltage Protection (Low-side, UVD) (1) Control supply voltage VD exceeds under voltage reset level (UVDR), but IGBT turns on by next ON signal (LH). (2) Normal operation: IGBT turns on and outputs current. (3) VD level drops to under voltage trip level (UVDT). (4) All low-side IGBTs turn OFF regardless of control input condition. (5) FO output time (tFO)=minimum 20s, and FO stays low as long as VD is below UVDR. (6) VD level reaches UVDR. (7) Normal operation: IGBT turns on and outputs current. Rev. 1.1 October 2018 www.aosmd.com Page 7 of 13 AIM5D05K060M2 / AIM5D05K060M2S Control Input RESET Protection circuit state Control supply voltage VDB UVDBR 1 SET UVDBT RESET 5 3 2 6 4 Output current IC Fault output FO Keep High-Level (no fault output) Figure 8. Under-Voltage Protection (High-side, UVDB) (1) Control supply voltage VDB rises. After the voltage reaches under voltage reset level UVDBR, IGBT turns on by next ON signal (LH). (2) Normal operation: IGBT turns on and outputs current. (3) VDB level drops to under voltage trip level (UVDBT). (4) All high-side IGBTs turn OFF regardless of control input condition, but there is no FO signal output. (5) VDB level reaches UVDBR. (6) Normal operation: IGBT turns on and outputs current. Control Input Protection circuit state SET OTT RESET 2 5 Temperature of LVIC OTT - OTHYS 1 3 6 Output current 4 Fault output FO Figure 9. Over-Temperature Protection (Low-side, Detecting LVIC Temperature) (1) Normal operation: IGBT turns on and outputs current. (2) LVIC temperature exceeds over-temperature trip level (OTT). (3) All low-side IGBTs turn off regardless of control input condition. (4) FO output time (tFO)=minimum 20s, and FO stays low as long as LVIC temperature is over OTT. (5) LVIC temperature drops to over-temperature reset level (OTT-OTHYS). (6) Normal operation: IGBT turns on by the next ON signal (LH). Rev. 1.1 October 2018 www.aosmd.com Page 8 of 13 AIM5D05K060M2 / AIM5D05K060M2S Example of Application Circuit Bootstrap negative electrodes should be connected to U, V, W pin directly and separated C1 D1 C2 (1) VB(U) C1 D1 C2 (2) VB(V) C1 D1 C2 (3) VB(W) VVB (22) P UHO WVB (21) U UVS 15V VD C1 VHO D1 (4) VD(H) C2 In the case of being affected by noise, it is recommended to use RC filters of 100 and 1nF (5) IN(UH) (6) IN(UV) (7) IN(WH) MCU (11) IN(WL) C2 (13) VFO (14) CSC R2 10k C5 Long GND wiring here might Generated noise to input signal and cause IGBT malfunction. (15) VOT UHIN WHO VHIN WVS (20) V M (19) W ULIN (10) IN(VL) (12) VD(L) VVS COM (9) IN(UL) 5V VDD WHIN (8) COM If pull-down resistor connected, temperature monitoring function is enabled. Otherwise N.C., over-temperature protection function is enabled. from the main output wires. (23) NC UVB VLIN C3 ULO WLIN (18) NU VDD VLO FO (17) NV CSC VOT WLO (16) NW COM Long wiring here might cause SC level fluctuation and malfunction. B R1 C Long wiring here might cause short circuit failure D C4 A Shunt resistor Control GND wiring N1 Power GND wiring (1) If the control GND is connected with the power GND by common broad pattern, it may cause malfunction by power GND fluctuation. It is recommended to connect the control GND and power GND at a single point (N1), near the terminal of the shunt resistor. (2) A zener diode D1 (24V/1W) is recommended between each pair of control supply pins to prevent surge destruction. (3) Prevention of surge destruction can further be improved by placing the bus capacitor as close to pin P and N1 as possible. Generally a 0.1-0.22F snubber capacitor C3 between the P-N1 terminals is recommended. (4) Selection of the R1*C4 filter components for short-circuit protection is recommended to have tight tolerance, and is temperaturecompensated type. The R1*C4 time constant should be set such that SC current is shut down within 2s; (typically 1.5-2s). R1 and C4 should be placed as close as possible to the CSC pin. SC interrupting time may vary with layout patterns and components selection, therefore thorough evaluation in the system is necessary. (5) Tight tolerance and temperature-compensated components are also recommended when selecting the R2*C5 filter for VOT. The R2*C5 time constant should be set such that VOT is immune to noise. Recommended values of R2 and C5 are 2k and 10nF. (6) To prevent malfunction, traces A, B, and C should be as short as possible. (7) It is recommended that all capacitors are mounted as close to the IPM as possible. (C1: electrolytic type with good temperature and frequency characteristics. C2: ceramic type with 0.1-2F, good temperature, frequency and DC bias characteristics.) (8) Input drives are active-high. There is a minimum 3.5k pull-down resistor in the input circuit of IC. To prevent malfunction, the layout to each input should be as short as possible. When using RC coupling circuit, make sure the input signal levels meet the required turn-on and turn-off threshold voltages. (9) VFO output is open drain type. It should be pulled up to MCU or control power supply (max= 50.5V), limiting the current (IFO) to no more than 1mA. IFO is estimated roughly by the formula of control power supply voltage divided by pull-up resistor. For example, if control supply is 5V, a 10k (over 5k) pull-up resistor is recommended. (10) Direct drive of the IPM from the MCU is possible without having to use opto-coupler or isolation transformer. (11) The IPM may malfunction and erroneous operations may occur if high frequency noise is superimposed to the supply line. To avoid such problems, line ripple voltage is recommended to have dV/dt 1V/s, and Vripple 2Vp-p. (12) It is not recommended to use the IPM to drive the same load in parallel with another IPM or inverter types. Rev. 1.1 October 2018 www.aosmd.com Page 9 of 13 AIM5D05K060M2 / AIM5D05K060M2S 100% IC 100% IC trr IC VCE IC VCE VIN VIN tC(OFF) 10% VCE tC(ON) 10% IC 10% VCE tOFF VIN(OFF) tON VIN(ON) 90% IC 10% IC (b) Turn-off Waveform (a) Turn-on Waveform Figure 10. Switching Times Definition Rev. 1.1 October 2018 www.aosmd.com Page 10 of 13 AIM5D05K060M2 / AIM5D05K060M2S Package Dimensions, IPM-5 Rev. 1.1 October 2018 www.aosmd.com Page 11 of 13 AIM5D05K060M2 / AIM5D05K060M2S Package Dimensions, IPM-5A Rev. 1.1 October 2018 www.aosmd.com Page 12 of 13 AIM5D05K060M2 / AIM5D05K060M2S LEGAL DISCLAIMER Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or completeness of the information provided herein and takes no liabilities for the consequences of use of such information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes to such information at any time without further notice. This document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third party's intellectual property rights. LIFE SUPPORT POLICY ALPHA AND OMEGA SEMICOND UCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.1 October 2018 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 13 of 13