TOSHIBA TMP86CK74A/CM74A CMOS 8-Bit Microcontroller TMP86CK74AFG/TMP86CM74AFG TMP86CK74A/CM74A is a low power, high-speed and high-performance 8-bit single chip microcomputer, including large capacity ROM/RAM, input/output ports, multiple timer/counter, serial interface, 8-bit AD converter and VFT (Vacume Fluorescent Tube) driver. Product No. ROM RAM Package OTP MCU TMP K74AF 24K i 1K i settee eee BECK74AFG 24K x8 bits AK x8 bits P-QFP80-1420-0.80M TMP86PM74AFG TMP86CM74AFG 32 K x8 bits 2K x8 bits Features P-QFP80-1420-0.80M @ 8-bit single chip microcomputer TLCS-870/C series @ Minimum instruction execution time: 0.25 ws (at 16 MHz) 122 ws (at 32.768 kHz) @ 7831 basic machine instructions : 132 types @ 17 interrupt sources (External : 6, Internal : 11) @ Input/output ports : 70 pins TMP86CK74AFG @ 16-bit timer counters : 2 channels TMP86CM74AFG e TC1: Timer, Event counter, PPG (Programmable Pulse Generator) output, Pulse width measurement, External trigger timer, and Window modes @ TC2: Timer, Event counter,Window modes @ 8-bit timer counters : 2 channels e TC3: Timer, Event counter, Capture modes (Pulse width/duty measurement). e TC4: Timer, Event counter, PWM (Pulse width modulation) Output, PDO (Programmable Divider Output) 000707EBP1 @ For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and Reliability Assurance / Handling Precautions. @ TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the Handling Guide for Semiconductor Devices, or TOSHIBA Semiconductor Reliability Handbook etc.. @The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (Unintended Usage). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. @ The products described in this document are subject to the foreign exchange and foreign trade laws. @ The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 86CM74A-1 2003-01-22TOSHIBA TMP86CK74A/CM74A @ Time base timer @ Watchdog timer Interrupt source @ Divider output function @ 4Key-on wake up pins @ Serial interface 8bit SIO: 1 channel (with 32 bytes Buffer) @ 8-bit successive approximation type AD converter @ Analog input: 8 channels @ Vacume flouorescent tube driver (automatic display) @ Programmable grid scan @ High breakdown voltage ports (max 40 V X 37 bits) @ Low consumption power (9 modes) @ Dual clock operation STOP mode SLOWI1 mode SLOW2 mode IDLEO mode IDLE1 mode IDLE2 mode SLLEP0O mode SLEEP1 mode : SLEEP2 mode : Oscillation stop (Battery/Capacitor back-up). Low consumption power operation by low-frequency clock (High-frequency clock stop.) Low consumption power operation by low-frequency clock (High-frequency clock oscillate.) CPU stops, and peripherals operate using high-frequency clock of Time-Base- Timer. Release by INTTBT interrupt. CPU stops, and peripherals operate using high-frequency clock. Release by interrupts. CPU stops, and peripherals operate using high and low-frequency clock. Release by interrupts. CPU stops, and peripherals operate using low-frequency clock of Time-Base- Timer. Release by INTTBT interrupt. CPU stops, and peripherals operate using low-frequency clock. Release by interrupts. CPU stops, and peripherals operate using high and low-frequency clock. Release by interrupts. @ Single/Dual-clock mode @ Wide operating voltage: 4.5 V to 5.5 V at 16 MHz/32.768 kHz 2.7 V to 5.5 V at 8 MHz/32.768 kHz 86CM74A-2 2003-01-22TMP86CK74A/CM74A P-QFP80-1420-0.80M Pin Assignments (Top View) TOSHIBA BFaA gaaa oo0o0 FEE Ee WM Ww Neveu PG He aAos 22222222 byideciddd SEYRowntgHane- onwondtdm itetrrrrtrrtttosegcs >>dtadnanaooaoadt & AF Ae Oonmnnmnnwunwnt mani - COMA On WOH TAM HOIAMHMMHIOMNN NNN (QEA) dd Coo I+ vc z0d (SEA) Edd Com Zr et 10d (VEA) 70d Cor eer ef 100d (EEA) 1d Comore LZ@for) AQ) ESd (ZEA) Odd Com St O@HTl (INI LOL) 24d (LEA) 246d Cor 947 6 Ltr (CLINI) LSd (OA) 96d COT /r SLOT @LNI) OSd (6ZA) S6d Cor 8 1) 0199) 41d (8ZA) 76d Cor 6r 9lfor) 5) 91d (ZZA) 6d Com 0s S Slfr7 (1s) Std (97A) @6d Com 1S oY plore (LN) wld (SZA) L6d Coma zs > elf 7 dd) eld (vZA) 06d Co s o ZL OO (Ol pOdd vIWd) 71d (ZA) 8d Co vs Oo LLP) (ELNI EDL) bd (Z@ZA) 98d Com ss Ee OLM (291) Old (LZA) 8d Comm 9s 6O07 (SINI dOLS) O@d (OZA) v89d Comm<s eft) 13544 (6LA) 8d Com 8s LOr7] (LNOLX) Zed (8LA) 78d Comm 6s 90 WILX) Led (ALA) 18d Corp 09 stor jada (9LA) 08d [o77) 19 voor) Lsil (SLA) 4d Com 7z9 or 1nox (vLA) 94d =H 9 O co IN!x (ELA) Sd org [oor $ $A Mon WOROMKMK NMTMNWOM DAA S www wwonrnrenerenRnAKeKR Ke mHe Re ATSORSRER FAAS Ssass SoLES$SSSSSSS5S ane 2aeaerercCctCccCcCr Mw cS we - OM WH TMA - & TON hh OH OE HO OE HO LO NH MmMoOooaanaAaa aa oo qaaoaa 2003-01-22 86CM74A-3TOSHIBA Block Diagram VDD Power supply VDD VFT power supply Reser I/O Test pin Resonator connecting pins VSS VKK TEST XIN XOUT r P67 to P60 P77 to P70 Standby control circuit System control circuit Timing generator Hig Clock Low generator TMP86CK74A/CM74A I/O ports A ~ P87 to P80 P97 to P90 PD4 to PDO VFT driver circuit (automatic display) Address/Data bus TLCS-870/C Data memory CPU (RAM) Program memory (ROM) Interrupt controller 16-bit 8-bit 8-bit timer/counter AD Timer base timer timer/counter Ter | Tc2 Tc3 | Tea converter Watchdog timer P22toP20 P31toP30 P07 to POO P17 to P10 P53 to P50 VAREF p47 (AIN7) C VOport , AVSS to v Analog pao (AINO) VO ports reference 1/0 ports pins (Analog Input) 86CM74A-4 2003-01-22TOSHIBA TMP86CK74A/CM74A Pin Functions Pin Name Vo Function 8-bit programmable input/output port. Each bit of this port can be individually configured as an input or an output under software control. Vo - 8-bit programmable input/output port. External input for TC1 VO (Input) Each bit of this port can be individually External inout for TC1 renee configured as an input or an output under External inert +t input? deceeeeceeeesnaeeeeeesees software control. ae eer IPOS a cecceeseeees P12 rouren | (ro i er eet oat (PWMA/PDOAITCA) | Output, Input) configured. External input for TC4 a "7 When used as PWM output, PDO output, PPG Oe PIS (PPG) fin VO (Output) output, serial data output, serial clock Output, the PPG OUT DUT a cccsssssetssnvesssereeteeeen P14 (INT4) /O (Input) latch must be set to "1" and the Output mode is External interrupt input4 vieeveteaeeeesteeeeceseeeeeccepeseeecsuietesineetetesees configured. crivetevaseenniasensssssntvssecnevacenessseetiseeananscetey PTSD cccesaf see VO (Input) When used as open-drain port, P1 OUTCR Set to Serial data input ee P16 (SO) VO (Output) | 0. When used as CMOS port, P1OUTCR set to Serial data input P17 (SCK) 0 (0) V. Serial clock input/output a 3-bit input/output port. External interrupt input5 P20 (INTS/STOP) VO (Input) | Each bit of this port can be individually STOP mode rerease signal input ween eee eee PEPE eeee nae eeeeniane configured as an input or an output under Cee eee nearer nent tenet ee eee P21 (XTIN) VO (Input) software control. . Low resonator connection pin (32.768 vbueuaacceeeesettttvttetececceegfttetiesstestseeteseseness When used as input port, external interrupt : . : , . kHz). For external clock, XTIN is used input, STOP mode release signal input, the input and XTOUT is opened P22 (XTOUT) VO (Output) | mode is configured. p P30 2-bit programmable input/output port. Each bit of this port can be individually eee VO configured as an input or an output under - P31 software control. P40 (AINOQ) 8-bit programmable input/output port. AD converter analog input P41 (AIN 1) ues Each bit of this port can be individually doceeeneneeetinteneseneeeeeeee I/O (Input) configured as an input or an output under P42 (AIN2) software control. P43 (AIN3) P44 (AIN4/STOP2) AD converter analog input P45 (AIN5/STOP3) vO Key-on wake up input P46 (AING/STOP4) | (Input, Input) P47 (AIN7/STOP5) P50 (INTO) 4-bit programmable input/output port. External interrupt inputO vo revenecteenbeeeeeeseeeeeeeee Each bit of this port can be individually srovscevasecstisscessssentvnsennevarcnessscetiseeananecetes Pst (INT1) veeteeeeetaeeeee I/O (Input) configured as an input or an output under External interrupt input! veceeeeetneteeeeeeeeee software control. External input for TC1 P52 (TCV/INT2) External interrupt input2 P53 (DVO) /O (Output) Divider output 86CM74A-5 2003-01-22TOSHIBA TMP86CK74A/CM74A Pin Name vo Function PEO(VO) 8-bit programmable input/output port. P61 (V1) Each bit of this port can be individually P62 (V2) configured as an input or an output under pea 3) beteeceeenteeenaes software control. P64 (V4) VO (Output) Grid output POS (VS) P66 (V6) per v7) beteeceeenteeenaes P70 (V8) 8-bit programmable input/output port. Each bit of this port can be individually configured as an input or an output under software control. VO (Output) Grid output P77 (V15) Peo(vig) 8-bit programmable input/output port. P81 (V17) Each bit of this port can be individually P82 (18) configured as an input or an output under e3 wi 5 beeeeteeeeneeens software control, P84 (20) VO (Output) Segment output PBS V2 P86 (M22) P87 (V23) P90 (V24) 8-bit programmable input/output port. Each bit of this port can be individually configured as an input or an output under software control. VO (Output) Segment output P97 (V31) PDO (V32) 5-bit programmable input/output port. PD1 (V33) oe Each bit of this port can be individually PD2(V34) VO (Output) | configured as an input or an output under Segment output D3 (V35) beteeeeseeceees software control. Da wv36) beteeeeseeceees TEST cceenteee Input _ | Lestipin for out-going test. Be tied tO OW. a asamsntentnniesintisteiesiese RESET Reset signal input. FUN occcceeeesceeeeeefeeeeeee LTPUE Resonator connecting pins for high-frequency clock. XOUT Output For inputting external clock, XIN is used and XOUT is opened. MSS ee O.0 EV] GND) a ovcesessstsettssssttttentttttstmststssssmtusssnssssesesessetsseeseeteseee VDD Power supply AVSS oo nnnnn] Powersupply |AN@l0g reference voltage (GND: 0.0 MD a ssuuunnnnannnnrnnnninnnenne VAREF Analog reference voltage Sa Vet diner cower supply Secceseesaecesaeceseeeceescaeeccsaeecseeecsescssescaeeesaeescseegussesieessaetecsseceseestessieecaees 86CM74A-6 2003-01-22TOSHIBA TMP86CK74A/CM74A Operational Description 1. CPU Core Functions The CPU core consists of a CPU, a system clock controller, and an interrupt controller. This section provides a description of the CPU core, the program memory, the data memory, the external memory interface, and the reset circuit. 1.1. Memory Address Map : i The memory of TMP86CK74A/CM74A consists of 4 blocks: ROM, RAM, DBR (Data Buffer Register) and SFR (Special Function Register). They are all mapped in 64 Kbyte address space.Figure 1-1 shows the memory address map of TMP86CK74A/CM74A. The general-purpose registers are not assigned to the RAM address space. 0000, 00004 ROM: Read Only Memory includes : SFR : 64 bytes : 64 bytes Program memory 003FY 003Fy 0040, 0040,, Vector table : : RAM: Random Access Memory includes : 1024 bytes : Data memory RAM 2048 bytes Stack 043Fy ! : SFR: Special Function Register includes : oy : HO ports : Peripheral status registers 083FH i | System control registers : of \ Interrupt control registers I I Program Status Word i ot D4 I DBR: Data Buffer Register includes : I : I ! ji OF 80, I OF8Oy VFT display data buffer DBR { : 128 bytes : 128 bytes OFFFY | OFFFy - Ho ! | ! I I ! ! I I | | I I ! I : I I : ! ! r 1 BOOO RA ervvrrertrreterterterteneentensneettaneateneral 0000, A000h I 32704 bytes : 24512 bytes : : ROM4 32768 bytes FFBF ys FEBFys FFCOW FFCOW Vector table for vector i 32 bytes : 32 bytes call instructions (16 vectors) FEDFY oe FFDFY oe FFEO FFEQ H 32 bytes H 32 bytes (actor fable for interrupt \ FFFFy FFFFy 7FFFy TMP86CK74A TMP86CM74A TMP86PM74A MCU mode PROM mode Figure 1-1. Memory Address Maps 1.2. Program Memory (ROM) The TMP86CK74A has an 24 KX8 bits (address A000 to FFFFy) of program memory, the TMP86CM74A has 32 KX8 bits (address 8000y to FFFFy) of program memory (mask programmed ROM). However, placing program memory on the internal RAM is deregulated if a certain procedure is executed (See 2.4.5 Address trap). 86CM74A-7 2003-01-22TOSHIBA TMP86CK74A/CM74A Electrical Characteristics Absolute Maximum Ratings (VSS = 0V) Parameter Symbol Pins Ratings Unit Supply Voltage Vpb -0.3106.5 Program voltage Vpp TEST/VPP pin - 0.3 to 13.0 Input Voltage Vin -0.3 to Vpp + 0.3 Vv Output Voltage Vourt 0.3 to Von + 0:3 Vout2 | Source open drain port Vpp 41 to Vpp + 0.3 lout: | PO, P01, P2, P4, P5 ports 5 Or lout2 P3 port 40 Pet louts__| PO, P1, P4, P5 ports -3 mA 1OH loyta _ | P6, P? ports -30 louts P8, P9, PD ports -20 Output Current IOL Elout: | PO, P1, P2, P4, P5 ports 120 mA (Total) OH Zlouta | P6, P7, P8, P9, PD ports - 120 Power Dissipation [Topr = 25C] PD 1200 mW Soldering Temperture (time) Tsld 260 (105) Storage Temperature Tstg -55to 125 Operating Temperature Topr - 30 to 70 Note?: The absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. Any one of the ratings must not be exceeded. If any absolute maximum ratings is exceeded, a device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. Thus, when designing products, which include this device, ensure that no absolute maximum rating value will ever be exceeded. Note2: All VDDs should be connected externally for keeping the same voltage level. Note 3: Power Dissipation (PD); For PD, it is necessary to decrease - 14.3 mw! C. 86CM74A-131 2003-01-22TOSHIBA TMP86CK74A/CM74A Recommended Operating Conditions Parameter |Symbol Pins Condition Min Max Unit NORMAL1, 2 modes fc= 16 MHz 4.5 IDLE1, 2 modes fc=8MH NORMAL1, 2 modes Supply c= z Voltage Vop IDLE1, 2 modes 27 5.5 fs= SLOW mode 32.768 kHz | si FEP mode STOP mode Output oo, Voltage VourT3 | Source open drain pins Vpop - 38 Vpp Vv Input High | Viy1 | Except hysteresis input Vop x 0.70 Voltage Vpp Vin2 | Hysteresis input Vop x 0.75 Input Low Vv Except hysteresis input Vv 0.30 Voltage ILA xcept ny Is Inpu DD XU. 0 Vit2 | Hysteresis input Vpp x 0.25 Vpp = 2.7 to 5.5V 8.0 Clock fc | XIN, XOUT 1.0 MHz Frequency Vop=4.5to5.5V 16.0 fs XTIN, XTOUT 30.0 34.0 kHz Note : The recommended operating conditions for a device are operating conditions under which it can be guaranteed that the device will operate as specified. If the device is used under operating conditions other than the recommended operating conditions (supply voltage, operating temperature range, specified AC/DC values etc.), malfunction may occur. Thus, when designing products, which include this device, ensure that the recommended operating conditions for the device are always adhered to. 86CM74A-132 2003-01-22TOSHIBA TMP86CK74A/CM74A How to Calculate Power Consumption. The share of VFT driver loss (VFT driver output loss + pull-down resistor (RK) loss) in power consumption Pmasx of TMP86CK74/CM74 is high. When using a fluorescent display tube with a large number of segments, the maximum power consumption Pd must not be exceeded. Power consumption Pmax = operating power consumption + normal output port loss + VFT driver loss. Where, Operating power consumption: VDD x IDD Norma! output port loss :=IouT1 X 0.4 VFT driver loss : VFT driver output loss + pull-down resistor (RK) loss Example : When Ta = 10 to 50 C (When using a fluorescent display tube with a conventional type which can use only one grid output at the same time.) and a fluorescent display tube with segment output = 3mA, digit output = 12mA, Vkk = 34,5V is used. Operating conditions ; VDD = 5 V + 10%, fe = 8 MHz, VFT dimmer time (DIM) = (14/16) X tseg, Power consumption Pmax = (1) + (2) + (8) Where, (1) Operating power consumption: Vpp X Ipp = 5.5 V X 10mA = 55 mW (2) Normal output port loss : SIout2 X 0.4 = 60mA X 0.4 V = 24 mW (3) VFT driver loss : Segment pin = 3mA X 2 V X number of segments K = 6mW X X Grid pin = 12mA * 2 V x 14/16 (DIM) X number of grids Y = 21mW X Y Rk loss = (5.5V + 34.5V)?/50 kO X (number of segments X + number of grids Y) = 832 mW X (X + Y) Therefore, Pmax = 55mW + 24mW + 6mW X X + 21 mW X Y + 32mW X (X + Y) = 132mW + 88mWX'': Maximum power consumption Pd when Ta = 50 C is determined by the following equation ; PD = 1200 mW (14.3 x 25) = 842.5 mW The number of segments X that can be lit is: PD > Pmax 842.5mW > 132 + 88X 18.69 > X Thus, a fluorescent display tube with less than 18 segments can be used. If a fluorescent display tube with 18 segments or more is used, either a pull-down resistor must be attached externally, or the number of segments to be lit must be kept to less than 18 by software. 86CM74A-133 2003-01-22TOSHIBA TMP86CK74A/CM74A DC Characteristics (Vpp = 5 V) [Condition] Vpp=5.0V + 10%, Vsg=Ayss = 0 V, Topr= - 30 to 70C (Typ. : Vpp = 5.0 V, Topr = 25C, Vin = 5.0 V/OV) Parameter Symbol Pins Condition Min | Typ. | Max | Unit Hysteresis Voltage Vus Hysteresis input - 0.9 - Vv lina TEST Input Current lin2 Sink Open-drain, Tri-st Vpp = 5.5 V, Vin =5.5V /0V - - +2 uA nz | RESET, STOP Input resistance Rin RESET Pull-UP 100 220 450 ka Pull-down resistance Re Source Open Drain Vpp=5.5V,Vig= -30V 50 80 110 Output Leakage lLon Sink Open-drain, Tri-st Vpp = 5.5 V, Vout = 5.5 V - - +2 Current ILo2 | Source Open-drain Vpp = 5.5 V, Vkx= -32V = = +2 uA Output High Voltage Vou Tri-st Vpp = 4.5 V, lon = -0.7mMA 4.1 - - Vv Output Low Voltage Vou Except XOUT, P3 Vpp=4.5V,loL=1.6mA - - 0.4 lon1 | P6, P7 Vpp = 4.5 V, Voy =2.4V -18| -28] - Output High Current lon2 | P8, P9, PD Vpp = 4.5 V, Von =2.4V -9 | -14 - Output Low Current lot High-current (P3) Vpp = 4.5 V, VoL=1.0V - 20 - fc= 16.0 MHz . fs = 32.768 KHz - 12 | 18 Supply Current in NORMAL1, 2 modes fe = 8.0 MHz AD converter 6 9 fs = 32.768 KHz Disable fc=16.0MHz _|(IREF off) mA = - 6 9 Supply Current in fs = 32.768 KHz IDLEQ, 1,2 modes fc = 8.0 MHz lbp fs = 32.768 KHz - 3 4.5 fe = 16.0 MHz Supply Current in fs=32.768KHz |ADconverter | ~ 13 | 19 NORMAL1, 2 modes Enable fc = 8.0 MHz fs = 32.768 KHz - 7 10 Supply Current in Topr= to 50 C AD converter _ 05 5 STOP mode Topr= to 70 C Disable 10 eN Note 3: Note 1: Typical values show those at Topr = 25C, Vpp = SV. Note2: Input current (liny, lin3) ; The current through pull-up or pull-down resistor is not included. {DD does not include [REF current. 86CM74A-134 2003-01-22TOSHIBA TMP86CK74A/CM74A DC Characteristics (Vpp = 3 V) [Condition] Vpp=3.0V + 10%, Vsg =Ayss = 0 V, Topr = - 30 to 70C (Typ. : Vpp = 3.0 V, Topr = 25C, Vin = 3.0 V/OV) Parameter Symbol Pins Condition Min | Typ. | Max | Unit Hysteresis Voltage Vus Hysteresis input - 0.4 - Vv lina | TEST Input Current lin2 Sink Open-drain, Tri-st Vpp =3.3V,Vin=3.3 V/0OV - - +2 uA ling | RESET, STOP Input resistance Rin RESET Pull-Up 100 220 450 ko Pull-down resistance Re Source Open Drain Vpp =3.3V,Vig= -30V 45 70 105 Output Leakage lLon Sink Open-drain, Tr-st Vpp = 3.3 V, Vout = 3.3 W/0 V - - +2 Current lloz | Source Open-drain Vop = 3.3 V, Vx= -32V - - +2 | A Output High Voltage Vou Tri-st Vpp = 2.7 V, lon = -0.6mA 2.3 - - Vv Output Low Voltage Vou Except XOUT, P3 Vpop=2.7V, lo, =0.9MA - - 0.4 I P6, P7 Vpp = 2.7 V, VoH=1.5V -5.5 -8 - Output High Current on pe OH lon2 | P8, P9, PD Vpp = 2.7 V, Von = 1.5V -3 | -45] - Output Low Current lot High-current (P3) Vpp =2.7V, VoL=1.0V - 6 - Supply Current in fc = 8.0 MHz NORMAL1, 2 modes fs=32.768KHz |ADconverter - 3 4.5 mA Disable Supply Current in fe = 8.0 MHz (IREF off) 2 25 IDLEO, 1, 2 modes fs = 32.768 KHz ~ , Supply Current in fc = 8.0 MHz AD converter NORMAL1, 2 modes fs = 32.768 KHz Enable ~ 3.5 5 Supply Current in SLOW1, 2 modes lp - 3 | 60 : fs = 32.768 KHz Supply Current in AD converter _ 15 30 a SLEEPO, 1, 2 modes Disable Supply Current in Topr= to 50 C 5 - 0.5 STOP mode Topr= to 70 C 10 Note?: Typical values show those at Topr = 25C, Vop = 3V. Note2: Input current (linq, lin3) ; The current through pull-up or pull-down resistor is not included. Note 3: [DD does not include IREF current. Note4: The supply currents of SLOW2 and SLEEP2 modes are equivalent to IDLEO, 1, 2. 86CM74A-135 2003-01-22TOSHIBA TMP86CK74A/CM74A AD Characteristics (Vs5 =Ayss =O V, 4.5 V S Vpp = 5.5V, Topr= 30 to 70C) Parameter Symbol Condition Min Typ. Max Unit Analog Reference Voltage VAREF Vpp - 1.5 - Vop Vv Analog Reerence Voltage Range Z\VarRer 3.0 - - Analog Input Voltage VaIN 0 - VaAREF Vv Vop = Varer=5.5V, _ Analog Supply Current IREF V55=0.0V 0.6 1.0 mA Non linearity Error - - +1 Zero Point Error Vop = Varer = 4.5 to 5.5V, _ _ +1 Vg = OV LSB Full Scale Error - - +1 Total Error _ _ + (Vss5 =Ayss =OV, 2.7 V S Vpp < 4.5 V, Topr = 30 to 70C) Parameter Symbol Condition Min Typ. Max Unit Analog Reference Voltage VaREF Vpp- 1.5 - Vop Vv Analog Reerence Voltage Range /\Varer 2.5 - - Analog Input Voltage VAIN 0 - VaRerF Vv Vpp = Varer=4.5V, _ Analog Supply Current IREF Vsg=0.0V 0.5 0.8 mA Non linearity Error - - + Zero Point Error Vop = Varer = 2.7 to 4.5V, - _ +1 Veg = OV LSB Full Scale Error - - + Total Error - - + Note 1: Total errors includes all errors, except quantization error, and is defined as a maximum deviation from the ideal conversion line. Note2: Conversion time is differant in recommended value by power supply voltage. About conversion time, please refer to 2.11.2 Register Configuration. Note3: Please use input voltage to AIN input pin in limit of Varer - Vss. When voltage of range outside is input, conversion value becomes unsettled and gives affect to other channel conversion value. Note4: Analog Reference Voltage Range; AVarer = Varer - Vss 86CM74A-136 2003-01-22TOSHIBA TMP86CK74A/CM74A AC Characteristics (Vss = OV, 4.5 V S Vpp = 5.5 V, Topr= 30 to 70C) Parameter Symbol Conditions Min Typ. Max Unit NORMAL1,2 mode . . IDLEO,1,2 mode 0.25 ~ 4 Machine Cycle Time tcyc ys SLOW 1,2 mode 117.6 _ 133.3 SLEEPO,1,2 mode High Level Clock Pulse Width tweH For external clack operation (XIN input) 31.25 ns Low Level Clock Pulse Width tweL fc = 16 MHz . High Level Clock Pulse Width twecH For external clack operation (XTIN input) - - 15.26 - (S Low Level Clock Pulse Width tweL fs = 32.768 kHz (Vss = OV, 2.7 V S Vpp & 4.5 V, Topr = 30 to 70C) Parameter Symbol Conditions Min Typ. Max Unit NORMAL1,2 mode IDLEO,1,2 mode 0-5 7 8 Machine Cycle Time teyc SLOW12mod us ve mons 117.6 - 133.3 SLEEPO,1,2 mode High Level Clock Pulse Width twcH For external clock operation (XIN input) _ 625 _ ns Low Level Clock Pulse Width tweL fc=8 MHz . High Level Clock Pulse Width twcH For external clock operation (XTIN input) - 15.26 - us Low Level Clock Pulse Width tweL fs = 32.768 kHz 86CM74A-137 2003-01-22TOSHIBA TMP86CK74A/CM74A HSIO AC Characteristics (Vss = OV, 2.7V S Vpp = 5.5V, Topr= 30 to 70C) Parameter Symbol Conditions Min Typ. Max Unit SCK output period (internal clock) Tscx4 16/fc - - SCK output low width (internal clock) T 8MHz < fe = 16MHz 8/fe 100ns - - as SOU Vpp = 4.5V 10 5.5 V SCK output high width (internal clock) Tscu4 8/fc 100ns - - SCK output period (internal clock) Tsck2 <kK< 8/fc - - - 7 : 4 MHz c = 8MHz SCK output low width (internal clock) Tsci2 Vpp=2.7Vto5.5V 4/fc 100ns - - s SCK output high width (internal clock) Tscu2 Affe - 100ns - - $CK output period (internal clock) Tsck3 Affe - - SCK output low width (internal clock) T fc = 4MHz 2/fe 100ns - - _ SC3 Vp =2.7V to 5.5V SCK output high width (internal clock) Tscu3 2/fc 100ns - - $CK input period (external clock) Tscxa | f S 8MHz 1000 - - CK input low width (external clock) Tscia Woo ee 5.5V) 400 - _ SCK input low width (external clock) TscHa | (Vpp =4.4 V to 5.5 V) 400 - - Sl input setup time Tsup 200 - - S| input hold time TuLp 200 - - ns $O output delay time TpeL - - 200 Rising time Tr Vpp = 3.0V, CL = 50pF = - 100 Falling time Tr (Note) - - 100 $O last bit hold time Tsopy 16.5/fe - 32.5/fc Note: CL, External Capacitance Tsck SCK PD x08 Tse ig : Avbb x 0.2 f: SO = 3 :TDEL : : : ZTsup 2 TH 5 86CM74A-138 2003-01-22TOSHIBA TMP86CK74A/CM74A Recommended Oscillating Conditions (Vs5 =0 V, Topr= - 30 to 70C) Oscillation . Recommended Constant Parameter Oscillator VDD Recommended Oscillator Frequency Cc, Cy 16 MHz 45Vto5.5V MURATA 10 pF 10 pF CSA16.00MXZ040 High-frequency MURATA CSA8.00MTZ_ | 30 pF 30 pF : 8MH 2.7Vto5.5V Oscillation Ceramic Resonator 2 CST8.00MTW_ | 30 pF (built-in) | 30 pF (built-in) MURATA CSA4.19MG 30 pF 30 pF 4.19MHz | 2.7Vto5.5V CST4.19MGW | 30 pF (built-in) | 30 pF (built-in) Low-frequency . a, Crystal Oscillator 32.768 kHz | 2.7V to5.5V | SIl VT-200 6 pF 6 pF Oscillation XIN XOUT XTIN XTOUT (1) High-frequency Oscillation (2) Low-frequency Oscillation Note 1: An electrical shield by metal shield plate on the surface of IC package is recommended in order to protect the device from the high electric field stress applied from CRT (Cathodic Ray Tube) for continuous reliable operation. Note2: When using the device (oscillator) in places exposed to high electric fields such as cathode-ray tubes, we recommend electrically shielding the package in order to maintain normal operating condition. Note 3: The product numbers and specifications of the resonators by Murata Manufacturing Co., Ltd. are subject to change. For up-to-date information, please refer to the following URL; http://www.murata.co.jp/search/index.html 86CM74A-139 2003-01-22