BAT
USB
DC_IN
EN
LOUT
VOUT
LiIon Battery
USB Port
DC Adapter
LDO
CAP GND
Controller
Switched
Load
Always ON
Load
Autoswitch
TPS22933
www.ti.com
SLVSB34 OCTOBER 2011
Small, Triple-Input Power Multiplexer with Auto-Select and Low Drop-out Voltage
Regulator
Check for Samples: TPS22933
1FEATURES APPLICATIONS
Three Integrated Load Switches Automatically Smart Phones
Choose Highest Input GPS Devices
Integrated 3.6-V fixed LDO Digital Cameras
Switched and Always on LDO Outputs Portable Industrial Equipment
Small µQFN package 1.5mm ×1.5mm Portable Medical Equipment
Input Voltage Range: 2.5-V to 12-V Portable Media Players
Low ON-Resistance (rON)Portable Instrumentation
rON = 2.4Ωat VIN = 5.0-V DESCRIPTION
rON = 2.6Ωat VIN = 4.2-V The TPS22933 is a small, low rON, triple-input power
50-mA Maximum Continuous Current multiplexer with auto-input selection and a Low
Low Threshold Control Input (EN) Drop-Out linear regulator. The device contains three
Switchover time 18-µs Typical P-channel MOSFETs that can operate over an input
voltage range of 2.5-V to 12-V. The TPS22933
automatically selects the highest level (from BAT,
TYPICAL APPLICATION USB, and DC_IN) and enables that input to source
the LDO. LOUT is an always-on output from the LDO.
The Enable function (EN pin) allows VOUT to be
switched on or off, enables a quick discharge resistor,
and is capable of interfacing directly with low-voltage
control signals.
The TPS22933 is available in a small, space-saving
8-pin µQFN package and is characterized for
operation over the free-air temperature range
of 40ºC to 85ºC.
FEATURE LIST(1)
rON (typical) QUICK OUTPUT MAXIMUM
OUTPUT VOLTAGE VOUT ENABLE
at 5.0 V DISCHARGE OUTPUT CURRENT
TPS22933A 2.4 Ω3.6 V yes 50 mA Active High
(1) This feature discharges the output of the switch to ground through a 64-Ωresistor, preventing the output from floating
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
1 2 3
4
567
8
123
4
567
8
Pin 1 Index Area
Pin 1 Identifier
Top View Bottom View
TPS22933
SLVSB34 OCTOBER 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TAPACKAGE(1) ORDERABLE PART NUMBER LDO VOLTAGE TOP-SIDE MARKING
Reel of 3,000 TPS22933ARSER
RSE
40°C to 85°C 3.6 V 4Q
(0.5mm pitch) Reel of 250 TPS22933ARSET
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
RSE PACKAGE
PIN FUNCTIONS
PIN
NUMBER NAME DESCRIPTION
1 BAT Source Voltage 1 (Battery)
2 USB Source Voltage 2 (V+ USB)
3 DC_IN Source Voltage 3 (DC Adapter)
4 GND Ground
5 EN VOUT Enable (Cannot be left floating)
6 CAP Capacitor for LDO
7 VOUT Switched LDO Output
8 LOUT Always on LDO Output
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Control
Logic
BAT
USB
DC_IN
VOUT
CAP
EN
GND
LOUT
Ref
- +
LDO
TPS22933
www.ti.com
SLVSB34 OCTOBER 2011
BLOCK DIAGRAM
FUNCTION TABLE
EN LDO to LOUT LDO to VOUT VOUT to GND
L ON OFF ON
H ON ON OFF
INPUT SELECTION TABLE (V1 >V2 >V3)
BAT USB DC_IN LDO Supply
V1 V2 or V3 V2 or V3 BAT
V2 or V3 V1 V2 or V3 USB
V2 or V3 V2 or V3 V1 DC_IN
V1 V1 V1 See (1)
(1) Whichever source achieves the highest level the fastest will supply the LDO.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) VALUE UNIT
VIN Input voltage range BAT, USB, DC_IN 0.3 to 14.0 V
VOUTPUT Output voltage range VOUT, LOUT 0.3 to 6.0 V
VEN Input voltage range EN 0.3 to 6.0 V
IMAX Maximum continuous switch current 75 mA
IPLS Maximum pulsed switch current, pulse <300 µs, 2% duty cycle 100 mA
TAOperating free-air temperature range 40 to 85 °C
Tstg Storage temperature range 65 to 150 °C
Tlead Maximum lead temperature (10-s soldering time) 300 °C
Human-Body Model (HBM) 2000
ESD Electrostatic discharge protection V
Charged-Device Model (CDM) 1000
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TPS22933
SLVSB34 OCTOBER 2011
www.ti.com
THERMAL INFORMATION TPS22933
THERMAL METRIC(1) UNITS
RSE (7 PINS)
θJA Junction-to-ambient thermal resistance 115.6
θJCtop Junction-to-case (top) thermal resistance 59.9
θJB Junction-to-board thermal resistance 27.4 °C/W
ψJT Junction-to-top characterization parameter 2.1
ψJB Junction-to-board characterization parameter 27.3
θJCbot Junction-to-case (bottom) thermal resistance
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS MIN TYP MAX UNIT
VIN BAT, USB, DC_IN 2.5 12.0 V
Input voltage range
VEN EN 0.0 5.5 V
EN pin High-level input voltage, BAT = 2.5-V to 5.5-V, USB, DC_IN = 2.5-V to
VIH 1.15 5.5 V
(EN >VIH Min, VOUT = LDO 12-V
Output)
EN pin Low-level input voltage, BAT = 2.5-V to 5.5-V, USB, DC_IN = 2.5-V to
VIL 0.0 0.6 V
12-V
(EN<VIL Max, VOUT = pull-down) VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V,
IOUT-LOUT LOUT Current 50 mA
EN = 3.4 V, IOUT-VOUT = 0 mA
VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V,
IOUT-VOUT VOUT Current 50 mA
EN = 3.4 V, IOUT-LOUT = 0 mA
VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V,
IOUT-TOTAL LOUT + VOUT current 50 mA
EN = 3.4 V
LDO Capacitor (on CAP pin) 20(1) nF
CAP LOUT Capacitor 1 µF
VOUT Capacitor 1 µF
(1) Refer to the application section
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TPS22933
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SLVSB34 OCTOBER 2011
ELECTRICAL CHARACTERISTICS
BAT = 2.5-V to 12.0-V, USB = 2.5-V to 12.0-V, DC_IN = 2.5-V to 12.0-V, TA=40ºC to 85ºC (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) (2) (3) TAMIN TYP(4) MAX UNIT
IOUT = 0 mA, VBAT = 4.2 V, VUSB = 3 V,
Operating current 9.2 15
VDC_IN = 3 V, EN = 3.4 V
IIN-BAT Full µA
IOUT = 0, VBAT = 4.2 V, VUSB = 5 V, VDC_IN =
Quiescent current 0.7 2
3 V, EN = 3.4 V
IOUT = 0 mA, VBAT = 4.2 V, VUSB = 5 V,
Operating current 9.2 15
VDC_IN = 3 V, EN = 3.4 V
IIN-USB Full µA
IOUT = 0, VBAT = 4.2V, VUSB = 5V, VDC_IN =
Quiescent current 0.7 2
5.5V, EN = 3.4 V
IOUT = 0 mA, VBAT = 4.2 V, VUSB = 3 V,
Operating current 9.2 15
VDC_IN = 5 V, EN = 3.4 V
IIN-DC_IN Full µA
IOUT = 0, VBAT = 4.2V, VUSB = 5.5V, VDC_IN =
Quiescent current 0.7 2
5V, EN = 3.4 V
Hi-Voltage operating IOUT = 0 mA, VBAT = 4.2 V, VUSB = 12 V,
IIN-USB Full 10.8 20 µA
current VDC_IN = 5 V, EN = 3.4 V
Hi-Voltage operating IOUT = 0 mA, VBAT = 4.2 V, VUSB = 5 V,
IIN-DC_IN Full 10.8 20 µA
current VDC_IN = 12 V, EN = 3.4 V 25ºC 2.4 3.3
VIN = 5.0 V, IOUT = 10 mA Ω
Full 3.5
ON resistance (USB to 25ºC 2.6 3.5
RON CAP, BAT to CAP, VIN = 4.2 V, IOUT = 10 mA Ω
Full 4
DC_IN to CAP) 25ºC 3.8 5
VIN = 2.5 V, IOUT = 10 mA Ω
Full 6
25ºC 1.3 2.5
ON resistance (LDO
RONVOUT VIN = 4.2 V, IOUT-VOUT = 10 mA Ω
output to VOUT) Full 3.0
Output pull down VIN = 4.2 V, VEN = 0 V, I(into VOUT) = 10
RPD 25ºC 63.8 120 Ω
resistance mA
IEN EN input leakage VEN = 1.6 V to 5.5 V or GND Full 1 µA
Dropout voltage VOUT
VDO-VOUT IOUT = 10 mA Full 0.11 V
(5)(6)
VDO-LOUT Dropout voltage LOUT IOUT = 10 mA(5)(6) Full 0.10 V
VIN
VIN <3.4 V, IOUT = 10 mA, VEN = 1.8 V Full
Always on LDO output VDO-LOUT
VLOUT V
voltage (LOUT pin) VIN >4 V, IOUT = 10 mA, VEN = 1.8 V Full 3.42 3.6 3.78
VIN
VIN <3.4 V, IOUT = 10 m A, VEN = 1.8 V Full
Switched LDO output VDO-VOUT
VVOUT V
voltage (VOUT pin) VIN >4 V, IOUT = 10 mA, VEN = 1.8 V Full 3.39 3.57 3.75
VCO Changeover voltage VBAT = 4.2 V, VUSB = 4.0 V rising to 4.4 V Full 0.15 V
25ºC 18
VBAT=4.2 V, VUSB = 4.0 V rising to 4.4 V,
tCO Changeover time µs
CAP = 0.01 µF, IOUT = 10 mA Full 50
EN high to low, C(VOUT) = 1 µF, VOUT load µs
tOFF VOUT off time Full 32
= 360 Ω
EN low to high, C(VOUT) = open, VOUT µs
tON VOUT on time Full 65
load = 360 Ω
(1) VIN is defined as the highest voltage present on the BAT, USB and DC_IN pins.
(2) One of the voltages on BAT, USB and DC_IN must be >VIN (Min), others can be 0 V.
(3) VBAT, VUSB and VDC_IN refer to the voltages on BAT, USB and DC_IN respectively. OUT, IOUT-VOUT and IOUT-LOUT refer to the
currents for the combined output current for VOUT and LOUT, the current on VOUT and the current on LOUT respectively.
(4) TYP is 25ºC, BAT = 4.2-V, USB = 0-V, DC_IN = 0-V.
(5) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In
dropout, the output voltage is equal to: VIN VDROPOUT.
(6) Dropout voltage is measured at the VIN that causes the output to drop to 100mV below its nominal voltage. For VOUT, the voltage drop
across the output switch is included (10mA ×RONVOUT).
Copyright ©2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s) :TPS22933
360 W
VOUT
1 Fm
Load for t and t
ON OFF
USB
BAT
CAP
4.2 V
4.0 V
VCO
4.2 V
tCO
4.4 V
4.4 V
EN
VOUT
tON
tOFF
50% 50%
50%
50%
TPS22933
SLVSB34 OCTOBER 2011
www.ti.com
PARAMETRIC MEASUREMENT INFORMATION
Figure 1. Test Circuit and tON / tOFF Waveforms
Figure 2. Switchover Timing
Figure 3. VOUT Enable Timing
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TPS22933
www.ti.com
SLVSB34 OCTOBER 2011
APPLICATION INFORMATION
POWER CHANGEOVER
The TPS22933 LDO is powered by the highest level input. When input voltages change, the TPS22933 may
change which input powers the LDO. During initial power up, the input that reaches the highest value first will
power the LDO. Once that decision is made, changing between input sources is based on VCO. When an input
source becomes VCO over the input currently supplying power to the LDO, changeover will occur and the new,
higher input will power the LDO.
TPS22933A EXAMPLE:
Initial power up:
DC_IN = 0V; USB = 0V; EN = 0V
BAT is applied at 4.2V
LDO power comes from BAT
LOUT = 3.6V; CAP = 4.2V; VOUT = 0V
USB power is connected at 5.0V, BAT remains 4.2V and DC_IN remains 0V
LDO power is changed from BAT to USB in tCO
LOUT = 3.6V; CAP = 5.0V; VOUT = 0V
DC_IN power is connected at 5.0V, BAT remains 4.2V and USB remains 5V
No change in LDO power
LOUT = 3.6V; CAP = 5.0V; VOUT = 0V
EN = VIH, BAT remains 4.2V, USB remains 5.0V and DC_IN remains 5V
LOUT = 3.6V, CAP = 5.0V; VOUT = 3.6V
USB power is removed, BAT remains 4.2V and DC_IN remains 5.0V
LDO power is changed from USB to DC_IN
LOUT = 3.6V; CAP = 5.0V; VOUT = 3.6V
DC_IN power is removed, BAT remains 4.2V and USB remains 0V:
LDO power is changed from DC_IN to BAT
LOUT = 3.6V; CAP = 4.2V; VOUT = 3.6V
ON/OFF CONTROL
The EN pin controls the state of the VOUT switch and VOUT pull-down switch. EN has no control over LOUT.
Asserting EN enables the VOUT switch and disables the Quick Output Discharge (QOD) switch. Deasserting EN
disables the VOUT switch and enables the QOD switch. EN is active high and has a low threshold making it
capable of interfacing with low voltage signals. The EN pin is compatible with standard GPIO Logic threshold and
can be used with any microcontroller with 1.2-V, 1.8-V, 2.5-V or 3.3-V GPIOs.
LDO CAPACITOR (for CAP pin)
An optional capacitor on the CAP pin helps stabilize the integrated LDO. Care should be taken in capacitor sizing
to reduce inrush currents. The voltage on the CAP pin will follow the highest input. Since the max input voltage is
12-V, the capacitor voltage rating must be higher than 12-V.
BOARD LAYOUT
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal and short-circuit operation. Using wide traces for BAT, USB, DC_IN, LOUT, VOUT, and GND will help
minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.
Copyright ©2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s) :TPS22933
TPS22933A
USB Port
DC Input
MSP430C3xx
µC
Switched
Load
Battery
USB
DC_IN
BAT
LOUT
EN
VOUT
GND CAP
TPS22933A
USB Port
DC Input
Battery
USB
DC_IN
BAT
LOUT
EN
VOUT
GND CAP
Power
Multiplexer
Output
Unused
TPS22933
SLVSB34 OCTOBER 2011
www.ti.com
APPLICATION EXAMPLES
Below are two diagrams of typical applications for the TPS22933A. In all cases, the unused power inputs can be
left floating or tied to ground. The EN pin must not be left floating.
Figure 4 shows three power inputs multiplexed to source the LDO. The LDO always on output (LOUT) is tied to
an MSP430. The MSP430 then determines when to enable the switched output (VOUT) by driving the EN pin.
Figure 5 shows three power inputs multiplexed to source only through the CAP pin. In this case, the LDO outputs
are not used (EN is tied low). The highest of the inputs is chosen to drive the voltage at the CAP pin.
Note that these two applications are not mutually exclusive. An application could use the CAP pin as a power
output and use one or both of the LDO outputs.
Figure 4. Application Example 1
Figure 5. Application Example 2
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TPS22933
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SLVSB34 OCTOBER 2011
PERFORMANCE GRAPHS
Table 1. Performance Graphs and Plots
Type Description Figure
Scope Plot DC_IN to BAT switchover Figure 6
Graph RON versus VIN (BAT, USB, DC_IN) 25°CFigure 7
Graph RON versus VIN (Any input) Figure 8
Graph Quiescent Current versus Input Voltage (Any input) Figure 9
Graph Operating Current versus Input Voltage (Any Input) Figure 10
Scope Plot tOFF (VIN = 4.2-V, C(VOUT) = 1uF, 25°C) Figure 11
Scope Plot tOFF (VIN = 4.2-V, C(VOUT) = open, 25°C) Figure 12
Scope Plot tON (VIN = 4.2-V, C(VOUT) = 1uF, 25°C) Figure 13
Scope Plot tON (VIN = 4.2-V, C(VOUT) = open, 25°C) Figure 14
Graph LOUT and VOUT versus Temperature at VIN = 4.2-V Figure 15
Graph LOUT and VOUT versus IOUT (VIN = 4.2-V, Temp = 25°C) Figure 16
Graph LOUT Dropout Voltage versus Temperature (VIN = 2.5-V) Figure 17
Graph VOUT Dropout Voltage versus Temperature (VIN = 2.5-V) Figure 18
Graph Output Pull-down Resistance (RPD) versus Temperature (10mA into VOUT) Figure 19
Figure 6. DC_IN Removed, BAT Powers LDO Figure 7. RPD vs Temp
(LOUT = 3.6-V)
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TPS22933
SLVSB34 OCTOBER 2011
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Figure 8. RON vs VIN (Typical) Figure 9. RON vs VIN
Figure 10. IIN(Quiescent) vs VIN Figure 11. IIN(Operating) vs VIN
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TPS22933
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SLVSB34 OCTOBER 2011
Figure 12. VOUT tOFF (1µF on VOUT) Figure 13. VOUT tOFF (No Capacitor on VOUT)
Figure 14. VOUT tON (1-µF on VOUT) Figure 15. VOUT tON (No Capacitor on VOUT)
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SLVSB34 OCTOBER 2011
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Figure 16. LOUT-VOUT vs Temp VIN 4p2V Figure 17. LOUT-VOUT vs IOUT
Figure 18. VDOLOUT vs Temp VIN 2p5V Figure 19. VDOVOUT vs Temp VIN 2p5V
12 Submit Documentation Feedback Copyright ©2011, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com 5-Oct-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS22933ARSER ACTIVE UQFN RSE 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS22933ARSET ACTIVE UQFN RSE 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS22933ARSER UQFN RSE 8 3000 180.0 8.4 1.6 1.6 0.66 4.0 8.0 Q2
TPS22933ARSET UQFN RSE 8 250 180.0 8.4 1.6 1.6 0.66 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 4-Oct-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS22933ARSER UQFN RSE 8 3000 202.0 201.0 28.0
TPS22933ARSET UQFN RSE 8 250 202.0 201.0 28.0
PACKAGE MATERIALS INFORMATION
www.ti.com 4-Oct-2012
Pack Materials-Page 2
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