FEATURES FUNCTIONAL BLOCK DIAGRAM 32.0 Gbps maximum data rate 13 ps typical output rise time and fall time 28 GHz bandwidth Self biased, no power sequencing required Adjustable gain Integrated output peak detector Low power consumption 0.5 W with 3.3 V positive/negative external supply voltage 0.44 W with 2.5 V positive/negative external supply voltage Use with compact bias tee: 1 inch x 0402 + 1 inch x 0603, SMT only 16-terminal, 2.9 mm x 2.9 mm, leadless chip carrier (LCC) package Differential balanced outputs VDD PEAK DETECTOR (VDET, VREF) HMC7810A BIAS TEE INP OUTP OUTN INN BIAS TEE ATTENUATOR AMPLITUDE CONTROL CONTROL GND (VCTL) (VC) APPLICATIONS Communication infrastructure: 400 G 16 QAM, 100 G DP-QPSK pluggable optical modules in CFP/CFP2 Broadband gain stage and pre-amplifiers Broadband test and measurement equipment VDD_EXTP VDD_EXTN 16229-001 Data Sheet Optical Modulator Driver with Internal Attenuator and Power Detector HMC7810A Figure 1. GENERAL DESCRIPTION The HMC7810A is a differential input and differential output, broadband linear amplifier, capable of driving a differential indium phosphate (InP) Mach-Zehnder (MZ) modulator for data center interconnect fiber optics or silicon photonics, or driving a single-ended, electroabsorption modulated laser (EML) modulator for short reach or metro applications. The HMC7810A supports data rates up to 32.0 Gbps with a gain flatness of up to 20 GHz. The integrated peak detector at the Rev. A output enables system designers to maintain constant output by adjusting the gain of the amplifier via the VCTL pin through an external automatic gain control (AGC) circuit. The IC provides module designers with scalable supplies for optimizing power dissipation vs. required linearity. The IC is in a 2.9 mm x 2.9 mm leadless chip carrier (LCC) package and requires an external bias tee. The differential input and differential are externally ac-coupled. No power supply sequencing is required. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC7810A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications ....................................................................................... 1 Frequency Domain Properties ....................................................8 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 Applications Information .............................................................. 11 Revision History ............................................................................... 2 Reflow Solder Profile ................................................................. 11 Specifications..................................................................................... 3 Evaluation Board ............................................................................ 12 Timing Specifications .................................................................. 4 Evaluation Board Schematic ..................................................... 12 Absolute Maximum Ratings ............................................................ 5 Evaluation PCB Outline ............................................................ 13 Thermal Resistance ...................................................................... 5 Outline Dimensions ....................................................................... 14 ESD Caution .................................................................................. 5 Ordering Guide .......................................................................... 14 Pin Configuration and Function Descriptions ............................. 6 REVISION HISTORY 6/2018--Rev. 0 to Rev. A Changes to Charged Device Mode (CDM) Rating, Table 3 ........ 5 Changes to Ordering Guide .......................................................... 14 2/2018--Revision 0: Initial Version Rev. A | Page 2 of 14 Data Sheet HMC7810A SPECIFICATIONS All specifications with positive supply voltage (VDD) = 3.3 V, positive and negative external supply voltage (VDD_EXTP/VDD_EXTN) = 2.5 V or 3.3 V, TMIN to TMAX, typical values are specified at TA = 25C at maximum data rate, unless otherwise stated. Table 1. Parameter MAXIMUM DATA RATE Symbol BANDWIDTH High Low Cutoff VOLTAGE RANGE Differential Input Min Typ 28.3 Max 32.0 28 1 0.2 Unit Gbps GHz MHz 1.0 V Output 4.4 V Single-Ended 2.2 V SMALL SIGNAL GAIN Differential to Differential Differential to Single-Ended GAIN FLATNESS RETURN LOSS Input Differential 4 17 18 dB 2 11 1 12 dB dB Single-Ended Single-Ended Output SIGNAL-TO-NOISE RATIO (SNR) TOTAL POWER CONSUMPTION 15 10 15 10 15 10 22 dB dB dB dB dB dB dB 0.44 0.5 W W 2 3 0.5 % % V V TOTAL HARMONIC DISTORTION (THD) VC PIN VOLTAGE VCTL PIN VOLTAGE CONTROL SOURCE CURRENT IVC IVCTL COMMON-MODE REJECTION RATIO SUPPLY VOLTAGE TOLERANCE VVC VVCTL 0 -1.5 1.5 0 2 1 mA mA dB +5 +5 +5 % % % 25 -8 -8 -5 Test Conditions/Comments Nonreturn to zero (NRZ), pseudorandom binary sequence (PRBS31) = 231 - 1 Rev. A | Page 3 of 14 With adjusted control voltage (VCTL); for differential input voltage levels higher than 550 mV p-p, adjust VCTL to keep the driver in linear operation Measured with PRBS31 and differential input of 600 mV p-p and VCTL = -1.5 V Measured with PRBS31 and differential input of 600 mV p-p and VCTL = -1.5 V Adjustable through VCTL control voltage, 1 MHz to 28 GHz, maximum gain: VCTL = -1.5 V, minimum gain: VCTL = 0 V 1 MHz to 28 GHz 1 MHz to 20 GHz, -1.5 V < VCTL < 0 V 100 MHz to 20 GHz, VCTL = -1.15 V VCTL = -1.5 V 100 MHz to 10 GHz, VCTL = -1.15 V VCTL = -1.5 V 100 MHz to 10 GHz 10 GHz to 30 GHz Input voltage (VIN) = 560 mV p-p, VCTL = -1.5 V VDD = 3.3 V VDD_EXTP, VDD_EXTN = 2.5 V VDD_EXTP, VDD_EXTN = 3.3 V At 1 GHz At 3 V p-p At 4 V p-p VDD = 3.3 V VDD_EXTP/VDD_EXTN = 3.3 V VDD_EXTP/VDD_EXTN = 2.5 V HMC7810A Parameter RESISTANCE Input Differential Single-Ended Output Differential Single-Ended Data Sheet Symbol Min Typ Max Unit 100 50 100 50 Test Conditions/Comments TIMING SPECIFICATIONS Table 2. Parameter GROUP DELAY VARIATION OUTPUT Rise Time Fall Time Jitter Additive RMS Deterministic Min Typ 7.5 Max Unit ps Test Conditions/Comments 1 GHz to 30 GHz 13 13 ps ps 350 400 3 fs fs ps 20% to ~ 80% 20% to ~ 80% VCTL = -1.5 V VDD_EXTP, VDD_EXTN = 2.5 V VDD_EXTP, VDD_EXTN = 3.3 V VDD_EXTP, VDD_EXTN = 3.3 V and 2.5 V Rev. A | Page 4 of 14 Data Sheet HMC7810A ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Positive VDD Supply to GND INN and INP to GND OUTP to GND VC to GND VCTL to GND Electrostatic Discharge (ESD) Protection Human Body Model (HBM) Charged Device Mode (CDM) Maximum Reflow Temperature Moisture Sensitivity Level 3 (MSL3) Operating Temperature Range Maximum Junction Temperature (TJ) Storage Temperature Range Lead Temperature (Soldering, 60 sec) Rating 12 V 2V 12 V 2.5 V -2.5 V to +0.5 V Class 1A, 250 VRF, 500 VDC Class III, 250 VRF, 500 VDC 260C -40C to +130C 175C -65C to +150C 300C Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Table 4. Thermal Resistance Package Type1 E-16-1 JA2 53 JC3 51 Unit C/W Thermal impedance simulated values are based on JEDEC 2S2P thermal test board with nine thermal vias. JA is the natural convection, junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. 3 JC is the junction to case thermal resistance. 1 2 ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 5 of 14 HMC7810A Data Sheet VDD VDET NIC VREF PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 16 15 14 13 12 GND INN 2 HMC7810A 11 OUTN INP 3 TOP VIEW (Not to Scale) 10 OUTP GND 4 5 6 7 8 NIC VCTL NIC VC 9 GND NOTES 1. NIC = NOT INTERNALLY CONNECTED. THIS PIN IS NOT CONNECTED INTERNALLY. 2. EXPOSED PAD. THE LCC PACKAGE HAS AN EXPOSED PAD THAT MUST BE CONNECTED TO SUPPLY GND. 16229-002 GND 1 Figure 2. Pin Configuration Table 5. Pin Function and Descriptions Pin No. 1, 4, 9, 12 2 3 5, 7, 14 6 8 10 11 13 15 16 Mnemonic GND INN INP NIC VCTL VC OUTP OUTN VREF VDET VDD EPAD Description Supply GND. Data Negative Differential Input. Data Positive Differential Input. Not Internally Connected. This pin is not connected internally. Analog Attenuator Control Voltage. Amplitude Control Voltage. Positive Differential Output. Negative Differential Output. Reference Voltage for Detector. Detector Voltage Output. Supply Voltage. Exposed Pad. The LCC package has an exposed pad that must be connected to supply GND. Rev. A | Page 6 of 14 Data Sheet HMC7810A TYPICAL PERFORMANCE CHARACTERISTICS 0 OPEN -920mV 0 OPEN -920mV DCD(%) 2% RISE TIME 13.200ps EYE AMPL 2.317V CROSSING % 51.2% SNR EYE HEIGHT (AMPL) 15.52 1.869V JITTER (p-p) JITTER (rms) 767.5fs 4.6545ps JITTER RMS RISE TIME EYE SNR EYE AMP 0 LEVEL -2.28V 0 LEVEL -2.28V DCD(%) 0% RISE TIME 13.685ps EYE AMPL 4.536V CROSSING % 49.6% SNR EYE HEIGHT (AMPL) 16.59 3.716V JITTER (p-p) JITTER (rms) 5.4185ps 905.5fs JITTER RMS RISE TIME EYE SNR EYE AMP 16229-004 BIT RATE 32.060GBPS FALL TIME 13.545ps 1 LEVEL 2.26V MINIMUM 933fs 13.56ps 7.24 1.94V MAXIMUM 980fs 14.22ps 7.30 1.95V TOTAL MEAS 29 29 29 29 16229-005 CURRENT 969fs 14.22ps 7.25 1.95V MAXIMUM 699fs 13.33ps 8.37 3.19V TOTAL MEAS 28 28 28 28 CURRENT 1.058ps 14.44ps 15.46 4.76V MINIMUM 1.045ps 14.44ps 15.33 4.75V MAXIMUM 1.089ps 12.67ps 15.46 4.76V TOTAL MEAS 29 29 29 29 Figure 7. Differential Output, VCTL = -1.5 V Figure 4. Differential Output, 4.5 V p-p Swing JITTER RMS RISE TIME EYE SNR EYE AMP MINIMUM 674fs 13.11ps 8.28 3.19V Figure 6. Differential Output, VCTL = -1 V Figure 3. Single-Ended Output, 2.3 V p-p Swing 1 LEVEL 2.26V CURRENT 686fs 13.11ps 8.28 3.19V Figure 5. Differential Output, VCTL = 0 V Rev. A | Page 7 of 14 16229-007 1 OPEN 950mV 16229-003 BIT RATE 31.780GBPS FALL TIME 13.130ps 1 OPEN 950mV 16229-006 Time domain properties, typical 32 Gbps NRZ output eye diagram, measured with PRBS31 pattern and 600 mV p-p differential input. HMC7810A Data Sheet FREQUENCY DOMAIN PROPERTIES VCTL = VCTL = VCTL = VCTL = VCTL = VCTL = VCTL = VCTL = 5.0 0.4V 0.5V 0.6V 0.7V 12 10 8 6 4 2 -2 0.01 VCTL = VCTL = VCTL = VCTL = 4.79 0.8V 0.9V 1.0V 1.1V VCTL = VCTL = VCTL = VCTL = 9.57 1.2V 1.3V 1.4V 1.5V 14.35 19.13 23.91 28.69 3.0 2.5 2.0 1.0 200 300 400 500 600 700 800 DIFFERENTIAL INPUT (mV p-p) Figure 8. Differential to Single-Ended Gain (S21) vs. Frequency with Respect to the VCTL Pin, Measurement Taken with EV1HMC7810ALC3 Evaluation Board (Fixture Not De-Embedded) Figure 11. Differential Output vs. Differential Input, Measured at 1 GHz Sine Wave 0 0.12 -5 -10 0.10 VPEAK (V) = VDET - VREF -15 -20 -25 -30 -35 -40 -45 0.08 0.06 0.04 -50 VCTL = -1V VCTL = -1.1V VCTL = -1.2V -60 -65 0.01 4.79 9.57 14.35 19.13 0.02 VCTL = -1.3V VCTL = -1.4V VCTL = -1.5V 23.91 28.69 FREQUENCY (GHz) 0 -1.5 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 16229-012 -55 16229-009 -0.1 ANALOG ATTENUATION (V) Figure 9. Differential to Differential Gain (S11) vs. Frequency with Respect to the VCTL Pin, Measurement Taken with EV1HMC7810ALC3 Evaluation Board (Fixture De-Embedded) Figure 12. Peak Voltage (VPEAK) = Detector Output Voltage (VDET) - Reference Voltage (VREF) vs. Analog Attenuation 0 300 -5 -10 250 VPEAK (V) = VDET - VREF -15 -20 -25 -30 -35 -40 -45 -50 -55 -65 -70 0.01 150 100 +130C, S11 (dB) +130C, S22 (dB) +25C, S11 (dB) 4.79 9.57 +25C, S22 (dB) -40C, S11 (dB) -40C, S22 (dB) 14.35 19.13 FREQUENCY (GHz) 23.91 28.69 50 2.3 16229-010 -60 200 2.6 2.9 3.2 3.5 3.8 4.1 4.4 4.7 DIFFERENTIAL OUTPUT (V) Figure 10. Differential to Differential Gain (S11, S22) vs. Frequency, VCTL Pin = -1.5 V, Zoomed for Gain Flatness (Fixture De-Embedded) Figure 13. VPEAK = VDET - VREF vs. Differential Output Rev. A | Page 8 of 14 5.0 16229-013 DIFFERENTIAL TO DIFFERENTIAL GAIN (dB) 3.5 1.5 FREQUENCY (GHz) DIFFERENTIAL TO DIFFERENTIAL GAIN (dB) 4.0 16229-011 0 +130C +25C -40C 4.5 DIFFERENTIAL OUTPUT (V p-p) 14 0V 0.1V 0.2V 0.3V 16229-008 DIFFERENTIAL TO SINGLE-ENDED GAIN (dB) 16 Data Sheet HMC7810A 5.0 7 6 5 4 3 2 1 300 400 500 600 700 800 DIFFERENTIAL INPUT (mV p-p) Figure 14. Total Harmonic Distortion (THD) vs. Differential Input 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 800mV p-p 600mV p-p 400mV p-p 200mV p-p 1.5 1.0 0.5 -1.4 -1.3 -1.2 -1.1 VCTL (V) -1.0 -0.9 -0.8 -0.7 16229-015 TOTAL HARMONIC DISTORTION (%) 3.0 2.5 2.0 1.5 1.0 0 -1.5 -1.3 -1.1 -0.9 -0.7 VCTL (V) -0.5 -0.3 -0.1 Figure 16. Differential Output vs. VCTL, Voltage Measured at Various Differential Input Voltages, 32 Gbps PRBS31 Data at the Input 8.0 0 -1.5 4.0 3.5 0.5 16229-014 0 200 900mV p-p 700mV p-p 500mV p-p 300mV p-p 4.5 16229-016 8 5.5 +130C +25C -40C DIFFERENTIAL OUTPUT (V p-p) TOTAL HARMONIC DISTORTION (%) 9 Figure 15. Total Harmonic Distortion vs. VCTL, Voltage Measured at Various Differential Input Voltages Rev. A | Page 9 of 14 HMC7810A Data Sheet THEORY OF OPERATION The HMC7810A is a broadband linear amplifier with a differential input and output. The device supports a maximum data rate of 32.0 Gbps with a typical bandwidth of 28 GHz. The HMC7810A is self biased and does not requires any bias sequencing or current adjustment circuitry. The device has two external supply voltages: VDD = 3.3 V supply at the supply pin and VDD_EXTP/VDD_EXTN. The VDD_EXTP/VDD_EXTN supply has two options: 2.5 V, which achieves better jitter performance, and 3.3 V, which achieves higher output voltage swings. The HMC7810A includes an integrated analog that allows a gain adjustment of at least 6 dB. When VCTL is -1.5 V, the gain is maximum, and when VCTL is 0 V, the gain is minimum. The HMC7810A contains a peak detector that behaves linearly with respect to the output swing. The peak detector has two outputs, VDET and VREF. Use the difference of these voltages to read the output voltage swing. To implement an external automatic gain control, use an analog attenuator and the features of the peak detector. Rev. A | Page 10 of 14 Data Sheet HMC7810A APPLICATIONS INFORMATION Figure 18 shows the typical, Pb-free reflow solder profile. MODULAR POSITIVE BIAS RAMP UP 3C/SECOND MAX 60 TO 150 SECONDS 260 - 5C/260 + 0C 217C 150C TO 200C RAMP DOWN 6C/SECOND MAX 60 TO 180 SECONDS 480 SECONDS MAX TIME (Second) 20 TO 40 SECONDS Figure 18. Typical Pb-Free Reflow Solder Profile INN OUTN VDD_EXTN MODULAR NEGATIVE BIAS 16229-027 VDET ANALOG OR DIGITAL GAIN CONTROL VREF OUTP VCTL INP MACH-ZEHNDER MODULATOR Figure 17. Analog or Digital Gain Control Loop Rev. A | Page 11 of 14 16229-026 VDD_EXTP REFLOW SOLDER PROFILE TEMPERATURE (C) The HMC7810A can drive Mach-Zehnder modulators in differential or single-ended operation. To keep the output swing constant at a desired value, build an analog or digital gain control loop. To build a gain control loop, use the voltage difference of the VREF and VDET pins (VPEAK) as an input to an analog or digital gain control mechanism to drive the VCTL pin (see Figure 17). The HMC7810A requires an external bias from the output side; however, the modulator bias can be provided after a dc blocking capacitance. HMC7810A Data Sheet EVALUATION BOARD EVALUATION BOARD SCHEMATIC Figure 19 shows the schematic for the EV1HMC7810ALC3 evaluation board. Table 6 lists the bill of materials. TP2 VDET VREF C13 TP1 C19 1nF C18 C21 C20 1nF TP3 C16 C22 VDD C10 4.7F C17 1nF C15 100pF OUTN J2 C5 INP 4 NIC VREF U1 HMC7810ALC3 GND INN OUTN INP OUTP GND GND NIC 100nF 1492-04A-5 5 6 NIC 2 3 GND 13 7 12 L8 10H R4 475 11 VDD_EXTN 10 9 C32 100pF C33 1nF L6 10H R3 475 TP9 C34 1F VBIAS_EML_N C35 100pF C36 1nF TP11 C37 1F VC 100nF 1492-04A-5 VDD 1 14 VCTL C4 INN 15 VDET 16 1492-04A-5 FB3 470 FB4 470 J1 J4 100nF C1 8 OUTP J3 100nF TP4 TP5 1492-04A-5 VCTL L4 10H VC C29 100pF C25 C27 C26 C28 C30 1nF C31 1F L2 10H R1 475 TP7 VBIAS_EML_P C38 100pF C39 1nF GND TP8 C40 1F J7 J8 16229-017 J6 R2 475 VDD_EXTP C9 1nF J5 TP10 NIC C8 TP6 FB1 470 FB2 470 C7 1nF Figure 19. Evaluation Board Schematic Table 6. Bill of Materials Qty. 1 4 Reference Designator EV1HMC7810ALC3 C1, C4, C5, C22 Description Evaluation board 100 nF, 16 V, tin, ultra broadband capacitor 5 1 nF, 50 V, X7R, 0402, ceramic capacitor Do not populate Not applicable 1 C7, C9, C17, C19, C20, C30, C33, C36, C39 C8, C13, C16, C18, C21, C25 to C28 C10 Manufacturer/Part Number Analog Devices, Inc./EV1HMC7810ALC3 American Technical Ceramics/ATC550L101KT16T Murata/GRM15555C1H101J 5 4 4 4 3 4 4 C15, C29, C32, C35, C38 C31, C34, C37, C40 FB1 to FB4 J1 to J4 J5 to J8 L2, L4, L6, L8 R1 to R4 4.7 F, 25 V, 10%, X7R, 0603, gold terminal ceramic capacitors 100 pF, 50 V, 5%, C0G, 0402, ceramic capacitors 1 F, 16 V, 10%, X5R, 0402, ceramic capacitors Ferrite chips, 470 , 200 mA, 0402 Connectors, K connector Do not populate Inductors, 10 H, 0603, 5%, 0.18 A 475 , 1/10 W, 1%, 0402, resistors, SMD Capax Technologies, Inc./0603X475K250GW Murata/GRM155R71H102KA01D Taiyo Yuden/EMK105BJ105KV-F Murata/BLM15GG471SN1D SRI Connector Gage Co./25-146-1000-92 9 Rev. A | Page 12 of 14 Coilcraft/0603LS-103XJLB Panasonic/ERJ-2RKF470X Data Sheet Qty. 8 1 1 1 Reference Designator TP1 to TP4, TP6 to TP9 TP5 TP10 U1 HMC7810A Description Test point, PC compact, 0.063 inch, red Do not populate Test point, PC, compact, 0.063 inch, black Optical modulator driver with internal attenuator and power detector Manufacturer/Part Number Keystone Electronics/5005 Keystone Electronics/5006 Analog Devices/HMC7810ALC3 EVALUATION PCB OUTLINE THRU CAL 600-01085-00-2 GND VDD VDET VREF V_EX_N TP10 TP1 TP2 TP3 TP9 C10 J4 INN J1 C17 C19 C15 C4 C20 C5 C9 C7 U1 J2 INP OUTN C34 C33 C32 C35 L8 R4 FB3 C36 L6 FB4C22R3 C37 VB_E C40 TP8 FB2 C1 R1 L2 C39 L4 R2 FB1 C38 C29 C30 C31 SEE NOTE 4 4x OUTP VCTL VC V_EX_P TP4 TP6 TP7 J3 Figure 20. Evaluation Board PCB Rev. A | Page 13 of 14 16229-028 1 PCB NOTES 1. SOLDER QUALITY TO IPC-A-610 CLASS 2. 2. MANUALLY DISPENSE SOLDER (ITEM 5) FOR ALL COMPONENTS. 3. J1 TO J4, ATTACH TO PCB WITH CENTER PIN ON TOP SIDE TRACE. MANUALLY DISPENSE SOLDER (ITEM 5) TO CENTER PIN AND GROUND LEADS, TOP AND BOTTOM. AFTER REFLOW, SOLDER MUST JOIN CONNECTOR AND PCB EDGE. 4. TRIM EDGE PLATING WITH ITEM 6 (106356). HMC7810A Data Sheet OUTLINE DIMENSIONS 3.05 2.90 SQ 2.75 0.36 0.30 0.24 0.08 BSC 13 PIN 1 16 1 12 0.50 BSC 1.60 1.50 SQ 1.40 EXPOSED PAD 9 4 5 8 TOP VIEW PKG-004838 0.90 0.80 0.70 0.32 BSC BOTTOM VIEW 1.50 REF 2.10 BSC SIDE VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. SEATING PLANE 02-24-2017-C PIN 1 INDICATOR Figure 21. 16-Terminal Leadless Ceramic Chip Package [LCC] (E-16-1) Dimensions shown in millimeters ORDERING GUIDE Model 1 HMC7810ALC3 HMC7810ALC3TR EV1HMC7810ALC3 1 Temperature Range -40C to +130C -40C to +130C Package Description 16-Terminal Leadless Ceramic Chip Carrier [LCC] 16-Terminal Leadless Ceramic Chip Carrier [LCC] Evaluation Board with Bias Tee and AC-Coupled Input/Output Capacitors All models are RoHS compliant parts. (c)2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16229-0-7/18(A) Rev. A | Page 14 of 14 Lead Finish Nickel/gold (NiAu) NiAu Package Option E-16-1 E-16-1