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FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5
October 2011
FOD060L, FOD260L
3.3V/5V High Speed-10 MBit/s
Logic Gate Optocouplers
Features
■FOD060L in SO8 and FOD260L in 8-pin DIP
■Very high speed – 10 MBit/s
■Superior CMR — 50 kV/µs at 1,000V peak
■Fan-out of 8 over -40°C to +85°C
■Logic gate output
■Strobable output
■Wired OR-open collector
■Safety and regulatory approvals
– UL1577
– DIN EN/IEC 60747-5-2
Applications
■Ground loop elimination
■LSTTL to TTL, LSTTL or 5-volt CMOS
■Line receiver, data transmission
■Data multiplexing
■Switching power supplies
■Pulse transformer replacement
■Computer-peripheral interface
Description
These optocouplers consist of an AlGaAS LED, optically
coupled to a very high speed integrated photo-detector
logic gate. Devices include a strobable output. This
output features an open collector, thereby permitting
wired OR outputs. The coupled parameters are
guaranteed over the temperature range of -40°C to
+85°C. A maximum input signal of 5 mA will provide a
minimum output sink current of 13 mA (fan out of 8). An
internal noise shield provides superior common mode
rejection of typically 50 kV/µs at 1,000V common mode.
Package
Truth Table (Positive Logic)
*Devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 5 and 8. (See Note 1)
Input Enable Output
On H L
Off H H
On L H
Off L H
On* NC* L*
Off* NC* H*
1
2
3
45
6
7
8
N/C
_
VCC
VE
VO
GND
+
N/C
VF
8
1
8
8
1
8
1
1
8
1
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 2
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85°C)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Recommended Operating Conditions
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.
Symbol Parameter Value Units
TSTG Storage Temperature -40 to +125 °C
TOPR Operating Temperature -40 to +85 °C
EMITTER
IFDC/Average Forward Input Current 50 mA
VEEnable Input Voltage, not to exceed VCC by more than 500 mV VCC + 0.5V V
VRReverse Input Voltage 5.0 V
PIPower Dissipation 45 mW
DETECTOR
VCC
(1 minute max)
Supply Voltage 7.0 V
IOOutput Current 50 mA
VOOutput Voltage 7.0 V
POCollector Output Power Dissipation 85 mW
Symbol Parameter Min. Max. Units
IFL Input Current, Low Level 0 250 µA
IFH Input Current, High Level *6.3 15 mA
VCC Supply Voltage, Output 3.0 5.5 V
VEL Enable Voltage, Low Level 0 0.8 V
VEH Enable Voltage, High Level 2.0 VCC V
TAOperating Temperature -40 +85 °C
NFan Out (TTL load) 8
RLOutput Pull-up Resistor 330 4K Ω
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 3
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = -40°C to +85°C unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Individual Component Characteristics
Switching Characteristics (TA = -40°C to +85°C, VCC = 3.3 V, IF = 7.5 mA unless otherwise specified.
Typical value is measured at TA = 25°C and VCC = 3.3V)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
EMITTER
VFInput Forward Voltage IF = 10 mA 1.4 1.8 V
TA = 25°C 1.75
BVR Input Reverse Breakdown Voltage IR = 10 µA 5.0 V
CIN Input Capacitance VF = 0, f = 1 MHz 6.0 pF
∆VF/∆TA Input Diode Temperature Coefficient IF = 10 mA -1.9 mV/°C
DETECTOR
ICCH High Level Supply Current VE = 0.5 V, IF = 0 mA, VCC = 3.3 V 3.5 7 mA
ICCL Low Level Supply Current VE = 0.5 V, IF = 0 mA, VCC = 3.3 V 3.2 10 mA
IEL Low Level Enable Current VCC = 3.3 V, VE = 0.5 V -1.6 mA
IEH High Level Enable Current VCC = 3.3 V, VE = 2.0 V -1.6 mA
VEH High Level Enable Voltage VCC = 3.3 V, IF = 10 mA 2.0 1.27 V
VEL Low Level Enable Voltage VCC = 3.3 V, IF = 10 mA (Note 2) 1.18 0.8 V
Symbol AC Characteristics Test Conditions Min. Typ. Max. Unit
TPLH Propagation Delay Time
to Output High Level
RL = 350Ω, CL = 15 pF (Fig. 9) (Note 3) 65 90 ns
TPHL Propagation Delay Time
to Output Low Level
RL = 350Ω, CL = 15 pF (Fig. 9) (Note 4) 43 75 ns
|TPHL – TPLH|Pulse Width Distortion RL = 350Ω, CL = 15 pF (Fig. 9) 23 25 ns
tPSK Propagation Delay Skew RL = 350Ω, CL = 15 pF (Note 5) 31 40 ns
trOutput Rise Time
(10-90%)
RL = 350Ω, CL = 15 pF (Fig. 9)(Note 6) 22 ns
tfOutput Fall Time
(90-10%)
RL = 350Ω, CL = 15 pF (Fig. 12) (Note 7) 3 ns
tELH Enable Propagation
Delay Time to Output
High Level
VEH = 3 V, RL = 350Ω, CL = 15 pF
(Fig. 10) (Note 8)
47 ns
tEHL Enable Propagation
Delay Time to Output
Low Level
VEH = 3 V, RL = 350Ω, CL = 15 pF
(Fig. 10) (Note 9)
27 ns
CMHCommon Mode
Transient Immunity
(at Output High Level)
RL = 350Ω, TA =25°C, IF = 0 mA,
VOH (Min.) = 2.0V, |VCM| = 1,000 V
(Fig. 11) (Note 10)
25,000 50,000 V/µs
CMLCommon Mode
Transient Immunity
(at Output Low Level)
RL = 350Ω, TA =25°C, IF = 7.5 mA,
VOL (Max.) = 0.8 V, |VCM| = 1,000 V
(Fig. 11) (Note 11)
25,000 50,000 V/µs
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 4
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified. Typical value is measured at
TA = 25°C and VCC = 3.3V)
Notes
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package VCC and GND pins of each device.
2. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
3. tPLH – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current
pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
4. tPHL – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current
pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
5. tPSK is the worst case difference between tPHL and tPLH for any devices at the stated test conditions.
6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high
state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/µs).
11. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low
output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
Symbol DC Characteristics Test Conditions Min. Typ. Max. Unit
IOH High Level Output Current IF = 250 µA, VCC = 3.3 V, VO = 3.3 V,
VE = 2.0 V (Note 2)
0.01 50 µA
VOL Low Level Output Voltage VCC = 3.3 V, IF = 5 mA, IOL = 13 mA,
VE = 2.0 V (Note 2)
0.3 0.6 V
IFT Input Threshold Current VCC = 3.3 V, VO = 0.6 V, IOL = 13 mA,
VE = 2.0 V (Note 2)
15mA
Symbol Characteristics Test Conditions Min. Typ. Max. Unit
II-O Input-Output
Insulation Leakage Current
Relative humidity = 45%,
TA = 25°C, t = 5 s,
VI-O = 3000 VDC (Note 12)
1.0 µA
VISO Withstand Insulation Test
Voltage
FOD060L
FOD260L
IIO ≤ 2 µA, RH < 50%,
TA = 25°C, t = 1 min.(Note 12)
3750
VRMS
5000
RI-O Resistance (Input to Output) VI-O = 500 V (Note 12) 1012 Ω
CI-O Capacitance (Input to Output) f = 1 MHz (Note 12) 0.6 pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 5
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves
Fig. 2 Input Threshold Current vs.
Ambient Temperature
Fig. 1 Input Forward Current vs.
Forward Voltage
Fig. 5 Low Level Output Current vs.
Ambient Temperature
Fig. 3 Low Level Output Voltage vs.
Ambient Temperature
Fig. 6 Propagation Delay vs.
Ambient Temperature
Fig. 4 High Level Output Current
vs. Ambient Temperature
VF - Forward Voltage (V)
IF - Forward Current (mA)
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7
0.001
0.01
0.1
1
10
100
T
A
= 85°C
T
A
= 100°C
T
A
= 25°C
T
A
= 0°C
T
A
= -40°C
TA - Ambient Temperature (°C)
-40 -20 0 20 40 60 80 100
ITH - Input Threshold Current (mA)
0.0
0.5
1.0
1.5
2.0
2.5
VCC = 3.3V
VO = 0.6V
FOD060L
RL = 350Ω, 1kΩ, 4kΩ
FOD260L
RL = 350Ω, 1kΩ, 4kΩ
TA - Ambient Temperature (°C) TA - Ambient Temperature (°C)
TA - Ambient Temperature (°C)
TA - Ambient Temperature (°C)
V
OL - Low Level Output Voltage (V)
IOH - High Level Output Current (nA)
-40 -20 0 20 40 60 80 100
0.0
0.1
0.2
0.3
0.4
0.5
0.6
V
CC
= 3.3V
V
E
= 2V
I
F
= 5mA
I
O
= 13mA
-40 -20 0 20 40 60 80 100
0
4
8
12
16
20
V
O
= V
CC
= 3.3V
V
E
= 2V
I
F
= 250 µA
-40 -20 0 20 40 60 80 100
IOL - Low Level Output Current (mA)
tP - Propagation Delay (ns)
0
5
10
15
20
25
30
35
40
V
CC
= 3.3V
V
E
= 2V
V
OL
= 0.6V
I
F
= 5mA
-40 -20 0 20 40 60 80 100
20
30
40
50
60
70
80
V
CC
= 3.3V
I
F
= 7.5mA
R
L
= 350Ωt
PLH
- FOD060L
t
PHL
- FOD060L
t
PHL
- FOD260L
t
PLH
- FOD260L
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 6
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves
Fig. 8 Pulse Width Distortion vs.
Ambient Temperature
Fig. 7 Rise and Fall Times vs.
Ambient Temperature
-40 -20 0 20 40 60 80 100
V
CC
= 3.3V
I
F
= 7.5mA
RL = 350Ω
t
r
t
f
-40 -20 0 20 40 60 80 100
0
5
10
15
20
25
30
V
CC
= 3.3V
I
F
= 7.5mA
RL = 350Ω
FOD060L
FOD260L
0
5
10
15
20
25
30
35
TA - Ambient Temperature (°C)
tr, tf, - Rise, Fall Time (ns)
TA - Ambient Temperature (°C)
PWD - Pulse Width Distortion (ns)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 7
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
PHL
t
F
I = 7.5 mA
1.5 V
90%
10%
7.5 mA
+3.3V
1.5 V
3.0 V
1.5 V
3
2
1
4
8
7
6
5
PLH
t
I = 3.75 mA
F
Output
O
(V )
Input
(I )
F
Output
(V )
O
f
t
r
t
O
Z = 50Ω
Pulse
Generator
tr = 5ns
(V )
E
Input
Monitor
O
(V )
Output
L
R
L
C
(V )
Output
O
Input
(V )
E
EHL
t
ELH
0.1µF
bypass
Fig. 9 Test Circuit and Waveforms for tPLH, tPHL, trand tf.
Fig. 10 Test Circuit tEHL and tELH.
t
1
2
3
4
8
7
6
5
Pulse Gen.
tf = tr = 5 ns
ZO = 50 Ω
RL
0.1µF
Bypass
CL
+3.3V
47Ω
Input
Monitor
(IF)
Output
(VO)
GND
V
CC
GND
V
CC
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 8
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
+3.3V
Peak
3
2
1
4
8
7
6
5
GND
V
CC
O
(V )
Output
350Ω
V
CM
FF
V
A
B
Pulse Gen
I
F
CM
V
0V
O
V
3.3V Switching Pos. (A), I = 0
F
O
V (Max)
CM
0.5 V
O
VSwitching Pos. (B), I = 7.5 mA
F
H
CM
L
V (Min)
O
bypass
0.1
µf
Fig. 11 Test Circuit Common Mode Transient Immunity
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 9
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
Marking Information
Small Outline
Part Number Package Packing Method
FOD060L Small outline 8-pin Tube (50 units per tube)
FOD060LR2 Small outline 8-pin Tape and Reel (2.500 units per reel)
FOD260L DIP 8-Pin Tube (50 units per tube)
FOD260LS SMT 8-Pin (Lead Bend) Tube (50 units per tube)
FOD260LSD SMT 8-Pin (Lead Bend) Tape and Reel (1,000 units per reel)
FOD260LV DIP 8-Pin, DIN EN/IEC 60747-5-2 option Tube (50 units per tube)
FOD260LSV SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-2 option Tube (50 units per tube)
FOD260LSDV SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-2 option Tape and Reel (1,000 units per reel)
FOD260LTV DIP 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option Tube (50 units per tube)
FOD260LTSV SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option Tube (50 units per tube)
FOD260LTSR2 SMT 8-Pin, 0.4” Lead Spacing Tape and Reel (700 units per reel)
FOD260LTSR2V SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-2 option Tape and Reel (700 units per reel)
1
2
5
34
Definitions
1Fairchild logo
2Device number
3One digit year code, e.g., ‘8’
4Two digit work week ranging from ‘01’ to ‘53’
5Assembly package code
060L
S1YYX
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 10
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Marking Information (Continued)
DIP and SMT
1
2
6
43 5
Definitions
1Fairchild logo
2Device number
3VDE mark (Note: Only appears on parts ordered with
DIN EN/IEC 60747-5-2 option – See order entry table)
4Two digit year code, e.g., ‘11’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
260L
BYY
XXV
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 11
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification
Small Outline
Note:
All dimensions are in millimeters.
4.0 ± 0.10
Ø1.5 MIN
User Direction of Feed
2.0 ± 0.05
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.0 ± 0.10
0.30 MAX
8.3 ± 0.10
3.50 ± 0.20
0.1 MAX 6.40 ± 0.20
5.20 ± 0.20
Ø1.5 ± 0.1/-0
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 12
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification (Continued)
Option S
Symbol Description Dimension in mm
WTape Width 16.0 ± 0.3
tTape Thickness 0.30 ± 0.05
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
FPocket Location 7.5 ± 0.1
P22.0 ± 0.1
PPocket Pitch 12.0 ± 0.1
A0Pocket Dimensions 10.30 ±0.20
B010.30 ±0.20
K04.90 ±0.20
W1Cover Tape Width 13.2 ± 0.2
dCover Tape Thickness 0.1 max
Max. Component Rotation or Tilt 10°
R Min. Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 13
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specification (Continued)
Option TS
Symbol Description Dimension in mm
WTape Width 24.0 ± 0.3
tTape Thickness 0.40 ± 0.1
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
FPocket Location 11.5 ± 0.1
P22.0 ± 0.1
PPocket Pitch 16.0 ± 0.1
A0Pocket Dimensions 12.80 ± 0.1
B010.35 ± 0.1
K05.7 ±0.1
W1Cover Tape Width 21.0 ± 0.1
dCover Tape Thickness 0.1 max
Max. Component Rotation or Tilt 10°
R Min. Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 14
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Reflow Profile
Small Outline
300
280
260
240
220
200
180
160
140
120
100
80
60
40
20
0
Temperature
(°C)
Time (s)
0 60 180120 270
260°C
>245°C = 42 Sec
Time above
183°C = 90 Sec
360
1.822°C/Sec Ramp up rate
33 Sec
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD060L, FOD260L Rev. 1.0.5 15
FOD060L, FOD260L — 3.3V/5V High Speed-10 MBit/s Logic Gate Optocouplers
Reflow Profile (Continued)
DIP and SMT
Profile Freature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C
Temperature Max. (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60–120 seconds
Ramp-up Rate (tL to tP) 3°C/second max.
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60–150 seconds
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 seconds
Ramp-down Rate (TP to TL) 6°C/second max.
Time 25°C to Peak Temperature 8 minutes max.
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
240 360
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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