RT8086B
®
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Applications
Smart Handheld devices
Portable Instruments
Battery-Powered Equipment
Distributed Power Systems
3.5A, 1.2MHz, Synchronous Step-Down Converter
General Description
The RT8086B is a high efficiency , synchronous step-down
DC/DC converter. The available input voltage range is from
2.8V to 5.5V and the regulated output voltage is adjustable
from 0.6V to 3.3V while delivering up to 3.5A of output
current.
The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode.
The current mode constant on-time operation with internal
compensation allows the transient response to be
optimized over a wide range of loads and output ca pacitors.
TheRT8086B is available in the UQFN-12L 2x2 (FC)
package.
Simplified Application Circuit
Marking Information
Features
High Efficiency Up to 95%
Low RDS(ON) Switches : 50mΩΩ
ΩΩ
Ω/40mΩΩ
ΩΩ
Ω
0.6V Reference Allows for Low Output Voltage
Internal Compensation
Input Voltage Range : 2.8V to 5.5V
Adjustable Output Voltage from 0.6V to 3.3V
1.2MHz Switching Frequency
Start-Up into Pre-Biased Load
Built in Soft-Start
Power Good Indication
Cycle-by-Cycle Current Limit
Input Under Voltage Lockout
Output Under Voltage Protection (Hiccup)
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Ordering Information
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Package Type
QUF : UQFN-12L 2x2 (FC) (U-Type)
RT8086B
Lead Plating System
G : Green (Halogen Free and Pb Free)
0YW
0Y : Product Code
W : Date Code
PVIN
AGND
VIN
PGND
RT8086B
CIN
EN
PGOOD VOUT
VOUT
R1
LX L
R2
VIN
FB
COUT
PGOOD
Enable
RT8086B
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Functional Pin Description
Pin No. Pin Name Pin Func tion
1 PVIN
Power Input. The available input voltage range is from 2.8V to 5.5V. A 10F or
larger input capacitor is needed to reduce voltage spikes at the input.
2, 11 LX Switch Node. Output of the internal high side and low side MOSFETs.
3, 12 PGND Power Ground.
4 AGND Analog Ground.
5 NC No Internal Connection.
6 VOUT Sense Input Pin for Output Voltage.
7 FB Feedback Input. This pin used to set the output voltage of the converter to
regulate to the desired value via an external resistive divider. The feedback
reference voltage is 0.6V typically.
8 EN Enable Control Input. A logic-high (1.2V < EN < 5.5V) enables the converter; a
logic-low forces the IC into s hutdown mode.
9 PGOOD
Power Good Indicator. The output of this pin is an open drain with internal pull-up
resister to VIN. The output of this pin is pulled to high when the FB voltage is
within 10%; otherwise it is Low.
10 VIN Supply Voltage for Internal Control Circuit. It is connected to PVIN in s ide the chip.
Pin Configurations (TOP VIEW)
UQFN-12L 2x2 (FC)
PVIN
AGND
LX PGOOD
EN
FB
VOUT
PGND 8
7
6
1
2
3
4
9
NC
VIN
LX
11
12
5
10
PGND
RT8086B
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Function Block Diagram
Operation
The RT8086B is a synchronous low voltage step-down
converter that can support the input voltage range from
2.8V to 5.5V and the output current can be up to 3.5A.
The RT8086B uses a constant on-time, current mode
architecture. In normal operation, the high side P-MOSFET
is turned on when the switch controller is set by the
comparator and is turned off when the Ton comparator
resets the switch controller.
Low side MOSFET pea k current is measured by internal
RSENSE. The error amplifier EA adjusts COMP voltage
by comparing the feedback signal (VFB) from the output
voltage with the internal 0.6V reference. When the load
current increa ses, it causes a drop in the feedback voltage
relative to the reference, then the COMP voltage rises to
allow higher inductor current to match the load current.
UV Comparator
If the feedback voltage (VFB) is lower than threshold voltage
0.2V, the UV comparator's output will go high and the
switch controller will turn off the high side MOSFET. The
output under voltage protection is designed to operate in
Hiccup mode.
PGOOD Comparator
When the feedback voltage (VFB) is higher tha n threshold
voltage 0.54V and under 0.66V, the PGOOD open drain
output will be high impeda nce.
Enable Comparator
A logic-high enables the converter; a logic-low forces the
IC into shutdown mode. There is an internal pull down
1MΩ resistor at EN pin.
Soft-Start (SS)
An internal current source charges an internal capacitor
to build the soft-start ramp voltage. The VFB voltage will
track the internal ramp voltage during soft-start interval.
The typical soft-start time is 2ms.
Over Current Protection (OCP)
The RT8086B provides over current protection by detecting
low side MOSFET valley inductor current. If the sensed
valley inductor current is over the current limit threshold
(4.5A min.), the OCP will be triggered. When OCP is
tripped, the RT8086B will keep the over current threshold
level until the over current condition is removed.
Thermal Shutdown (OTP)
The device implements an internal thermal shutdown
function when the junction temperature exceeds 140°C.
The thermal shutdown forces the device to stop switching
when the junction temperature exceeds the thermal
shutdown threshold. Once the die temperature decrea ses
below the hysteresis of 20°C, the device reinstates the
power up sequence.
Ton
LX
PVIN
VIN
AGND
+
-Driver
PGND
UVLO
-
+
FB
Current
Limit
Detector
Current
Sense
Logic
Control
VIN
+
-RC
CC
VREF
-
+
Comparator
PGOOD
OTP
Shut Down
Control
Error
Amplifier
LX
LX
EN VOUT
PGND
RT8086B
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Electrical Characteristics
(VIN = 3.3V, TA = 25°C, unless otherwise specified)
Absolute Maximum Ratings (Note 1)
Supply Input V oltage, PVIN, VIN------------------------------------------------------------------------------ 0.3V to 6.5V
Switch Node Voltage, LX---------------------------------------------------------------------------------------- 0.3V to (PVIN + 0.3V)
Other Pins Voltage ----------------------------------------------------------------------------------------------- 0.3V to 6V
Power Dissipation, PD @ TA = 25°C
UQF N-12L 2x2 (FC)---------------------------------------------------------------------------------------------- 1.25W
Pa ckage Thermal Re sistance (Note 2)
UQF N-12L 2x2 (FC), θJA ---------------------------------------------------------------------------------------- 80°C/W
UQFN-12L 2x2 (FC), θJC ---------------------------------------------------------------------------------------- 7°C/W
Lead Temperature (Soldering, 10 sec.)---------------------------------------------------------------------- 260°C
Junction T emperature-------------------------------------------------------------------------------------------- 150°C
Storage T emperature Range ----------------------------------------------------------------------------------- 65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model)------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions (Note 4)
Supply Input Voltage--------------------------------------------------------------------------------------------- 2.8V to 5.5V
Junction T emperature Range----------------------------------------------------------------------------------- 40°C to 125°C
Ambient T emperature Range----------------------------------------------------------------------------------- 40°C to 85°C
Parameter Symbol Test Conditions Min Typ Max Unit
Input Voltage PVIN 2.8 -- 5.5 V
Feedback Reference Voltage VREF 0.588 0.6 0.612 V
Feedback Leakage Current IFB V
FB = 3.3 V -- -- 1 A
Quiescent Cu rrent Clo se loop, no load current -- 60 --
Shut down Current Shutdo wn -- -- 1 A
Output Voltage Line Regulation VIN = 2.8V to 5.5V -- 0.1 -- %/V
O ut put V olta ge Loa d R eg ul ation VIN = 5V, VOUT = 3.3V, IOUT = 0A to
3.5A -- 0.4 -- %
Switching Frequency V IN = 5V, VOUT = 1.2V -- 1.2 -- MHz
High-Side RPMOS I
LX = 0. 3A , V IN = 5V -- 50 --
Switch
On-Resistance Low-Side RNMOS ILX = 0.3 A , V IN = 5 V -- 40 -- m
Current Limit ILIM Valley current 4.5 -- -- A
Min. Off-Time tOFF -- 100 -- ns
VIN Rising -- 2.5 --
U nder Voltage Lockout
Threshold VIN Falling -- 2.2 -- V
Thermal Shutdown -- 140 -- °C
Logic-High 1.2 -- 5.5
Enable Voltage Logic-Low -- -- 0.4 V
RT8086B
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Parameter Symbol Test Conditions Min Typ Max Unit
EN Input Current VEN = 2V -- 2 -- A
VEN = 0V -- 0 --
PG OO D Pi n Trig ger Delay -- 90 -- s
PGOOD Pin Thres h old
(Relative to VOUT) FB with respect to the Regulation -- ±10 -- %
PGO OD Open Drain
Impedance RPGOOD PGOOD = PVIN -- 500 -- k
PGOOD On-Resistance
Impedance PGOOD = Low -- -- 100
Soft- Star t T i me TSS -- 2 -- ms
On-Time TON VIN = 5V, VOUT = 1.2V -- 200 -- ns
VIN = 3.6V, VOUT = 1.2V -- 277 --
Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
RT8086B
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Typical Application Circuit
PVIN
AGND
VIN
PGND
RT8086B
10µF
1
3, 12 4
CIN
EN
8
PGOOD
9VOUT 6
VOUT
R1
200k
LX 2, 11 L
1µH
R2
200k
VIN
10
FB 7
*CFF
PGOOD
1.2V
COUT
20µF
Enable
* : The feedforward capacitor CFF is optional for the optimization of transient response by increasing bandwidth and
acceptable pha se margin.
Where fCO is the unity gain crossover frequency of the control loop without the external feedforward ca pa citor installed.
FF CO
1111
C = 2 f R1 R1 R2



Table 1. Suggested Component Values
VOUT (V) R1 (k) R2 (k) L (H) COUT (F)
1.2V 200 200 1 20
1.8V 200 100 1 20
2.5V 200 63.4 1 20
3.3V 200 44.2 1 20
RT8086B
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Typical Operating Characteristics
Output Voltage vs. Output Current
1.10
1.12
1.14
1.16
1.18
1.20
1.22
1.24
1.26
1.28
1.30
0 0.5 1 1.5 2 2.5 3 3.5
Ou tput Cu rrent (A)
Output Vol tage (V)
VOUT = 1.2V
VIN = 3.3V
VIN = 5V
Switching Frequency v s . Te m pe rature
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
-50-25 0 25 50 75100125
TemperatureC)
Switchi ng Frequency (M Hz) 1
VOUT = 1.8V, IOUT = 0.6A
VIN = 3.3V
VIN = 5V
Switching Frequency vs . Input Voltage
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
2.5 3 3.5 4 4.5 5 5.5
In put Voltage (V )
Swit ching Frequency (MHz) 1
VOUT = 1.2V, IOUT = 0.6A
Output Voltage vs. Temperature
1.75
1.76
1.77
1.78
1.79
1.80
1.81
1.82
1.83
1.84
1.85
-50 -25 0 25 50 75 100 125
Temperatur e (°C)
Output Vol tage (V)
VOUT = 1.8V, IOUT = 0.6A
VIN = 3.3V
VIN = 5V
O utput Voltage vs. Input Voltage
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
2.5 3 3.5 4 4.5 5 5.5
In put Voltage (V)
Output Vol tage (V)
VIN = 2.8V to 5.5V, VOUT = 1.2V
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
Output Current (A)
Effici en cy (%)
VOUT = 1.2V
VIN = 3.3V
VIN = 5V
RT8086B
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VIN = 3.3V, VOUT = 1.2V, IOUT = 0A
Time (10ms/Div)
Output Ripple Voltage
VOUT
(20mV/Div)
Time (500ns/Div)
Output Ripple Voltage
VOUT
(5mV/Div)
VLX
(2V/Div)
VIN = 3.3V, VOUT = 1.2V, IOUT = 3.5A
Time (2.5ms/Div)
Power On from VIN
VOUT
(1V/Div)
PGOOD
(5V/Div)
ILX
(2A/Div)
VIN
(2V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
IOUT = 0.2A to 2A, COUT = 20μF
Time (50μs/Div)
Load Transient Response
IOUT
(1A/Div)
VOUT
(50mV/Div)
VIN = 3.3V, VOUT = 1.2V,
IOUT = 1A to 2A, COUT = 20μF
Time (50μs/Div)
Load Transient Response
IOUT
(1A/Div)
VOUT
(50mV/Div)
VIN = 3.3V, VOUT = 1.2V,
Current Lim it vs . Input Voltage
4.0
4.5
5.0
5.5
6.0
6.5
7.0
2.5 3 3.5 4 4.5 5 5.5
In put Voltage (V)
Current Li m it (A)
VOUT = 1.2V
RT8086B
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Time (25ms/Div)
Power Off from EN
VOUT
(2V/Div)
ILX
(2A/Div)
VEN
(2V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 0A
Time (1ms/Div)
Power On from EN
VOUT
(1V/Div)
PGOOD
(5V/Div)
ILX
(2A/Div)
VEN
(2V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
Time (2.5ms/Div)
Power Off from VIN
VOUT
(1V/Div)
VLX
(5V/Div)
ILX
(5A/Div)
VIN
(5V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
RT8086B
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Application Information
The RT8086B is a single-phase step-down converter. It
provides single feedback loop, current mode control with
fa st transient response. An internal 0.6V reference allows
the output voltage to be precisely regulated for low output
voltage applications. A fixed switching frequency (1.2MHz)
oscillator and internal compensation are integrated to
minimize external component count. Protection features
include over current protection, under voltage protection
and over temperature protection.
Output Voltage Setting
Connect a resistive voltage divider at the FB between VOUT
and GND to adjust the output voltage. The output voltage
is set a ccording to the f ollowing equation :
OUT REF R1
V = V 1
R2




where VREF is the feedback reference voltage 0.6V (typ.).
Figure 1. Setting VOUT with a Voltage Divider
FB
GND
VOUT
R1
R2
Chip Enable and Disable
The EN pin allows for power sequencing between the
controller bias voltage and another voltage rail. The
RT8086B remains in shutdown if the EN pin is lower than
400mV. When the EN pin rises above the VEN trip point,
the RT8086B begins a new initialization and soft-start
cycle.
Internal Soft-Start
The RT8086B provides an internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During soft-
start, the internal soft-start capacitor becomes charged
and generates a linear ramping up voltage across the
capa citor. This voltage clamps the voltage at the FB pin,
causing PWM pulse width to increase slowly a nd in turn
reduce the input surge current. The internal 0.6V reference
ta kes over the loop control once the intern al ramping-up
voltage becomes higher than 0.6V .
UVLO Protection
The RT8086B ha s input Under V oltage Lockout protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage (2.5V typ.), the converter resets and
prepares the PWM for operation. If the input voltage falls
below the UVLO falling threshold voltage during normal
operation, the device will stop switching. The UVLO rising
a nd falling thre shold voltage has a hysteresis to prevent
noise-caused reset.
Inductor Selection
The switching frequency (on-time) a nd operating point (%
ripple or LIR) determine the inductor value a s shown below:
OUT IN OUT
SW LOAD(MAX) IN
VV V
L = f LIR I V


where LIR is the ratio of the peak-to-peak ripple current to
the average inductor current.
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. The core
must be large enough not to saturate at the peak inductor
current (IPEAK) :
PEAK LOAD(MAX) LOAD(MAX)
LIR
I = I + I
2



The calculation above serves as a general reference. To
further improve transient response, the output inductor
can be further reduced. This relation should be considered
along with the selection of the output capa citor .
Input Capacitor Selection
High quality ceramic input decoupling ca p a citor , such as
X5R or X7R, with values greater than 10μF are
recommended for the in put ca pa citor. The X5R a nd X7R
ceramic capacitors are usually selected for power regulator
capacitors because the dielectric material has less
ca pacitance variation and more temperature stability .
RT8086B
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Voltage rating and current rating are the key parameters
when selecting an input ca pacitor . Generally , selecting an
input capa citor with voltage rating 1.5 tim es greater tha n
the maximum input voltage is a conservatively safe design.
The input capacitor is used to supply the input RMS
current, which can be a pproximately calculated using the
following equation :
OUT OUT
IN_RMS LOAD IN IN
VV
I = I 1
VV




The next step is selecting a proper capacitor for RMS
current rating. One good design uses more than one
capacitor with low equivalent series resistance (ESR) in
parallel to form a capacitor ba nk.
The input capacitance value determines the input ripple
voltage of the regulator. The input voltage ripple can be
approximately calculated using the f ollowing equation :




OUT(MAX) OUT OUT
IN IN SW IN IN
IVV
V = 1
Cf V V
Output Capacitor Selection
The output capacitor and the inductor form a low pass
filter in the Buck topology. In steady state condition, the
ripple current flowing into/out of the capacitor results in
ripple voltage. The output voltage ripple (VP-P) can be
calculated by the following equation :
P_P LOAD(MAX) OUT SW
1
V= LIRI ESR + 8C f





When load tra nsient occurs, the output ca pacitor supplies
the load current before the controller can respond.
Therefore, the ESR will dominate the output voltage sag
during load transient. The output voltage undershoot (VSAG)
ca n be calculated by the f ollowing equation :
SAG LOAD
V = I ESR
For a given output voltage sag specification, the ESR value
can be determined.
Another para meter that has influence on the output voltage
sag is the equivalent series inducta nce (ESL). The rapid
change in load current results in di/dt during transient.
Therefore, the ESL contributes to part of the voltage sag.
Using a ca pacitor with low ESL ca n obtain better transient
performance. Generally, using several capacitors
connected in parallel can have better transient performance
tha n using a single capa citor f or the same total ESR.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the a mbient temperature, and θJA is the junction to a mbient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
a mbient thermal resistance, θJA, is layout dependent. For
UQF N-12L 2x2(FC) package, the thermal resistance, θJA,
is 80°C/W on a sta ndard JEDEC 51-7 four-layer thermal
test board. The maxi mum power dissipation at TA = 25°C
ca n be calculated by the f ollowing formula :
PD(MAX) = (125°C 25°C) / (80°C/W) = 1.25W for
UQF N-12L 2x2 (FC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Figure 2. Derating Curve of Maximum Power Dissipation
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0 25 50 75 100 125
Ambient Tem pera ture (°C)
Maxi mum Power Di ssipation (W ) 1
Four-Layer PCB
RT8086B
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PVIN
AGND
LX PGOOD
EN
FB
VOUT
PGND 8
7
6
1
2
3
4
9
NC
VIN
LX
11
12
5
10
PGND
VOUT
GND
CIN1 CIN2
VIN
R1 R2 AGND
Input capacitor must
be placed as close to
the IC as possible.
LX should be connected to
inductor by wide and short
trace. Keep sensitive
components away from
this trace.
COUT
The output capacitor must
be place near the IC. The voltage divider must
be connected as c l ose to
the device as pos sible.
VOUT
LR3
VIN
Figure 3. PCB Layout Guide
Layout Considerations
Layout is very important in high frequency switching
converter design. The PCB can radiate excessive noise
and contribute to converter instability with improper layout.
Certain points must be considered before starting a layout
using the RT8086B.
Ma ke the tra ces of the main current paths a s short a nd
wide as possible.
Put the input ca pacitor as close a s possible to the device
pins (VIN and GND).
LX node encounters high frequency voltage swings so
it should be kept in a small area. Keep sensitive
components away from the LX node to prevent stray
ca pa citive noise pick-up.
Ensure all feedba ck network connections are short and
direct. Pla ce the feedba ck network a s close to the chip
as possible.
The GND pin and Exposed Pad should be connected to
a strong ground plane for heat sinking and noise
protection.
An example of PCB layout guide is shown in Figure 3
for reference.
RT8086B
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14F, No. 8, Tai Yuen 1 st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Outline Dimension
U-Type 12L QFN 2x2 (FC) Package
Min. Max. Min. Max.
A 0.500 0.600 0.020 0.024
A1 0.000 0.050 0.000 0.002
A3 0.100 0.152 0.004 0.006
b 0.200 0.300 0.008 0.012
D 1.900 2.100 0.075 0.083
E 1.900 2.100 0.075 0.083
e
L 0.350 0.450 0.014 0.018
L1 0.450 0.550 0.018 0.022
Symbol Dime nsions In Millime ters Dime nsions In Inche s
0.500 0.020