Preliminary W24L11 128K x 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072 x 8 bits that operates on a wide voltage range from 3.0V to 3.6V power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES * * * * * Low power consumption: - Active: 144 mW (max.) Access time: 70 nS Single 3.3V power supply Fully static operation All inputs and outputs directly TTL compatible PIN CONFIGURATIONS * * * * Three-state outputs Battery back-up operation capability Data retention voltage: 2V (min.) Packaged in 600 mil DIP, 450 mil SOP, standard type one, TSOP (8 mm x 20 mm) , small type one and TSOP (8 mm x 13.4 mm) BLOCK DIAGRAM PRECHARGE CKT. A16 A14 NC 1 32 VDD A16 2 31 A15 A14 3 30 CS2 A12 4 29 WE A7 5 28 A13 A6 6 27 A8 A9 A5 7 26 A9 I/O1 : A4 8 25 A11 A3 9 24 OE A2 10 23 A10 WE A4 A11 A9 A8 A13 WE CS2 A15 VDD NC A16 A14 A12 A7 A6 A5 A4 A3 A7 A6 A1 11 22 CS1 CS1 A0 12 21 I/O8 OE I/O1 13 20 I/O7 I/O2 14 19 I/O6 I/O3 15 18 I/O5 VSS 16 17 I/O4 1 32-pin A13 A1 A0 A10 PIN DESCRIPTION 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 SYMBOL A0-A16 I/O1-I/O8 I/O8 CS1, CS2 VSS WE OE VDD VSS NC -1- DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Input Write Enable Input Output Enable Input Power Supply Ground No Connection Publication Release Date: October 1999 Revision A1 Preliminary W24L11 TRUTH TABLE CS1 CS2 OE WE MODE VDD CURRENT H X X X Not Selected High Z ISB, ISB1 X L X X Not Selected High Z ISB, ISB1 L H H H Output Disable High Z IDD L H L H Read Data Out IDD L H X L Write Data In IDD I/O1-I/O8 DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT -0.5 to +4.6 V Input/Output to VSS Potential -0.5 to VDD +0.5 V Allowable Power Dissipation 1.0 W -65 to +150 C 0 to 70 C Supply Voltage to VSS Potential Storage Temperature Operating Temperature Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VDD = 3.0V to 3.6V; VSS = 0V; TA (C) = 0 to 70) PARAMETER SYM. TEST CONDITIONS MIN. MAX. UNIT Input Low Voltage VIL - -0.5 +0.6 V Input High Voltage VIH - +2.0 VDD +0.5 V Input Leakage Current ILI VIN = VSS to VDD -1 +1 A Output Leakage Current ILO VI/O = VSS to VDD, CS1 = VIH (min.) or CS2 = VIL (max.) or OE = VIH (min.) or WE = VIL (max.) -1 +1 A Output Low Voltage VOL IOL = +2.1 mA - 0.4 V Output High Voltage VOH IOH = -1.0 mA 2.2 - V Operating Power Supply Current IDD - 40 mA CS1 = VIL (max.) and CS2 = VIH (min.), I/O = 0 mA, Cycle = min. Duty = 100% -2- Preliminary W24L11 Operating Characteristics, continued PARAMETER Standby Power Supply Current SYM. TEST CONDITIONS ISB CS1 = VIH (min.) or CS2 = VIL (max.) Cycle = min. Duty = 100% ISB1 CS1 VDD -0.2V or CS2 0.2V MIN. MAX. UNIT - 1 mA LL - 50 A L - 100 Note: Typical parameter is measured under ambient temperature TA = 25 C and VDD = 3.3V CAPACITANCE (VDD = 3.3 V, TA = 25 C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN = 0V 6 pF Input/Output Capacitance CI/O VOUT = 0V 8 pF Note: These parameters are sampled but not 100% tested. AC characteristics AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels 0V to 3.0V Input Rise and Fall Times 5 nS Input and Output Timing Reference Level 1.5V Output Load See the drawing below AC Test Loads and Waveform 1 TTL 1 TTL OUTPUT OUTPUT 5 pF Including Jig and Scope 100 pF Including Jig and Scope (For TCLZ, TOLZ, TCHZ, TOHZ, TWHZ, TOW ) 90% 3.0 V 90% 10% 0V 10% 5 nS 5 nS -3- Publication Release Date: October 1999 Revision A1 Preliminary W24L11 AC Characteristics, continued (VDD = 3.0V to 3.6 V; VSS = 0V; TA (C) = 0 to 70) Read Cycle PARAMETER SYMBOL W24L11-70L/LL MIN. MAX. UNIT Read Cycle Time TRC 70 - nS Address Access Time TAA - 70 nS Chip Select Access Time TACS - 70 nS Output Enable to Output Valid TAOE - 35 nS Chip Selection to Output in Low Z TCLZ* 10 - nS Output Enable to Output in Low Z TOLZ* 5 - nS Chip Deselection to Output in High Z TCHZ* - 30 nS Output Disable to Output in High Z TOHZ* - 30 nS Output Hold from Address Change TOH 10 - nS SYMBOL W24L11-70L/LL These parameters are sampled but not 100% tested Write Cycle PARAMETER MIN. MAX. UNIT Write Cycle Time TWC 70 - nS Chip Selection to End of Write TCW 55 - nS Address Valid to End of Write TAW 55 - nS Address Setup Time TAS 0 - nS Write Pulse Width TWP 50 - nS TWR 0 - nS Data Valid to End of Write TDW 45 - nS Data Hold from End of Write TDH 0 - nS Write to Output in High Z TWHZ* - 25 nS Output Disable to Output in High Z TOHZ* - 25 nS Output Active from End of Write TOW 5 - nS Write Recovery Time CS1 , CS2, WE These parameters are sampled but not 100% tested -4- Preliminary W24L11 TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TOH TAA TOH DOUT Read Cycle 2 (Chip Select Controlled) CS1 CS2 TACS TCHZ TCLZ D OUT Read Cycle 3 (Output Enable Controlled) T RC Address TAA OE TOH TAOE TOLZ CS1 CS2 TACS DOUT TCHZ TOHZ TCLZ -5- Publication Release Date: October 1999 Revision A1 Preliminary W24L11 Timing Waveforms, continued Write Cycle 1 TWC Address TWR OE TCW CS1 CS2 TAW WE T WP TAS TOHZ (1, 4) DOUT TDW TDH DIN Write Cycle 2 ( OE = VIL Fixed) T WC Address TWR TCW CS1 CS2 TAW WE TOH T WP TAS TWHZ (1, 4) D OUT TDW (2) (3) TOW TDH DIN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured 500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. -6- Preliminary W24L11 DATA RETENTION CHARACTERISTICS (TA (C) = 0 to 70) PARAMETER VDD for Data Retention SYM. TEST CONDITIONS CS1 VDD -0.2V or VDR MIN. TYP. MAX. UNIT 2.0 - - V - - 50 A 0 - - nS TRC* - - nS CS2 0.2V Data Retention Current CS1 VDD -0.2V or IDDDR CS2 0.2V, VDD = 3V Chip Deselect to Data Retention Time TCDR Operation Recovery Time TR See data retention waveform * Read Cycle Time DATA RETENTION WAVEFORM VDD 0.9VDD VDR > = 2V TCDR CS1 CS2 0.9 VDD TR CS1 > = VDD - 0.2V 0V < = 0.2V = CS2 < -7- Publication Release Date: October 1999 Revision A1 Preliminary W24L11 ORDERING INFORMATION ACCESS TIME (nS) OPERATING VOLTAGE (V) OPERATING TEMPERATURE (C) STANDBY CURRENT MAX.( A) W24L11-70LL 70 3.0V to 3.6V 0 to 70 50 600 mil DIP W24L11S-70LL 70 3.0V to 3.6V 0 to 70 50 450 mil SOP W24L11T-70LL 70 3.0V to 3.6V 0 to 70 50 Standard type one TSOP W24L11Q-70LL 70 3.0V to 3.6V 0 to 70 50 Small type one TSOP W24L11-70L 70 3.0V to 3.6V 0 to 70 100 600 mil DIP W24L11S-70L 70 3.0V to 3.6V 0 to 70 100 450 mil SOP W24L11T-70L 70 3.0V to 3.6V 0 to 70 100 Standard type one TSOP W24L11Q-70L 70 3.0V to 3.6V 0 to 70 100 Small type one TSOP PART NO. PACKAGE Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. -8- Preliminary W24L11 PACKAGE DIMENSIONS 32-pin P-DIP Dimension in inches Symbol A A1 A2 B B1 c D E E1 e1 L D 17 32 E1 16 1 E S c A A2 A1 L Base Plane Seating Plane B e1 eA a B1 Dimension in mm Min. Nom. Max. Min. Nom. Max. 5.33 0.210 0.010 0.25 0.150 0.155 0.160 3.81 3.94 4.06 0.016 0.018 0.022 0.41 0.46 0.56 0.048 0.050 0.054 1.22 1.27 1.37 0.008 0.010 0.014 0.20 0.25 0.36 1.650 1.660 41.91 42.16 0.600 0.610 14.99 15.24 15.49 0.545 0.550 0.555 13.84 13.97 14.10 0.090 0.100 0.110 2.29 2.54 2.79 0.120 0.130 0.140 3.05 3.30 3.56 15 0 0.670 16.00 16.51 17.02 0.590 a 0 eA S Notes: 0.630 0.650 15 0.085 2.16 1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimensions D & E1 include mold mismatch and are determined at the mold parting line. 4. Dimension B1 does not include dambar protrusion/intrusion. 5. Controlling dimension: Inches 6. General appearance spec. should be based on final visual inspection spec. 32-pin SOP Wide Body Symbol Dimension in Inches Min. A A1 A2 b c D E e HE L LE S y 17 32 e1 E HE L Detail F 1 b 16 Nom. Max. Dimension in mm Min. Nom. 0.004 Max. 3.00 0.118 0.10 0.101 0.106 0.111 2.57 2.69 0.014 0.016 0.020 0.36 0.41 0.51 0.006 0.008 0.012 0.15 0.20 0.31 0.805 0.817 2.82 20.45 20.75 0.440 0.445 0.450 11.18 11.30 11.43 0.044 0.050 0.056 1.12 1.27 1.42 0.546 0.556 0.556 13.87 14.12 14.38 0.023 0.031 0.039 0.58 0.79 0.99 0.047 0.055 0.063 1.19 1.40 1.60 0.036 0.91 0.10 0.004 0 10 0 10 Notes: e1 D c A2 S y A e LE A1 1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimensions D & E include mold mismatch . mold parting line. and determined at the 4. Controlling dimension: Inches 5. General appearance spec should be based on final visual inspection spec. See Detail F Seating Plane -9- Publication Release Date: October 1999 Revision A1 Preliminary W24L11 Package Dimensions, continued 32-pin Standard Type One TSOP HD Dimension in Inches Dimension in mm Symbol D A c A1 1 M e E 0.10(0.004) b __ __ Min. Nom. __ __ Max. 0.006 0.05 1.20 __ 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.005 0.006 0.007 0.12 0.15 0.17 D 0.720 0.724 0.728 18.30 18.40 18.50 E 0.311 0.315 0.319 HD 0.780 0.787 0.795 19.80 20.00 __ L A 0.016 __ 0.024 0.40 __ __ 0.031 Y 0.000 A1 1 Y 0.020 __ __ 7.90 __ 0.020 A2 L1 Max. __ 0.002 L1 L Nom. 0.047 e Min. 8.10 20.20 __ 0.50 0.50 0.60 __ 0.80 0.004 0.00 5 1 3 8.00 __ 0.10 3 5 Controlling dimension: Millimeters 32-pin Small Type One TSOP HD Dimension in Inches Dimension in mm Min. Min. Nom. Symbol D A c 1 e E b A 2 A A1 L Y L1 Nom. Max. 1.25 0.006 0.05 0.15 A1 0.002 A2 b c 0.037 0.039 0.041 0.95 1.00 1.05 0.007 0.008 0.009 0.17 0.20 0.27 0.0056 0.0059 0.0062 0.14 0.15 0.16 D E 0.461 0.465 0.469 11.70 11.80 11.90 HD e L 0.520 0.528 0.536 13.20 13.40 13.60 0.012 0.020 0.028 0.30 0.50 L1 0.027 0.675 Y 0.000 0.311 0.315 0.319 7.90 0.020 0 0.004 3 8.00 8.10 0.50 5 0.00 0 Controlling dimension: Millimeters - 10 - Max. 0.049 0.70 0.10 3 5 Preliminary W24L11 VERSION HISTORY VERSION DATE PAGE A1 Oct. 1999 - Headquarters DESCRIPTION Initial Issued Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, No. 4, Creation Rd. III, 123 Hoi Bun Rd., Kwun Tong, Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5796096 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502 Note: All data and specifications are subject to change without notice. - 11 - Publication Release Date: October 1999 Revision A1