EVAL-AD5767SD2Z User Guide
UG-1070
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD5767 16-Channel, 12-Bit Serial Input, Voltage Output DAC
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 17
FEATURES
Full featured evaluation board for the AD5767 with the
ADP5071 power solution
PC control in conjunction with the Analog Devices, Inc.,
EVAL-SDP-CB1Z system demonstration platform (SDP)
Power solution generated from a single 3.3 V supply
PC software for control using analysis/control/evaluation
(ACE) software
GENERAL DESCRIPTION
The E VA L -AD5767SD2Z is a fully featured evaluation board that
allows the user to easily evaluate all the features of the AD5767
16-channel, 12-bit, voltage output digital-to-analog converter
(DAC).
This board also integrates a power solution using the ADP5071
switching regulator to generate a bipolar supply of +8 V and
−22 V from a +3.3 V input, allowing a DAC voltage output
range of −20 V to +6 V. Alternatively, supplying the DAC with a
linear power supply via the on-board connector (J9) achieves all
ranges.
The AD5767 can be controlled using the on-board connector
(J10) or the EVA L -SDP-CB1Z SDP board (via J1). The SDP
allows the evaluation board to be controlled through the USB
port of a Windows®-based PC using the AD5767 evaluation
software.
The AD5767 is a 16-channel, 12-bit voltage output denseDAC®.
The DAC generates output ranges from a 2.5 V reference. The
AD5767 also integrates output buffers allowing the device to
source or sink up to 20 mA. The range is software selectable,
and any channel can be routed to the monitor pin for external
monitoring. The integration of the reference and output buffers
allows an easy to use universal solution.
The device requires four power supplies. AVDD and AVSS are the
positive and negative high voltage power supplies, AVCC is the
analog supply for the low voltage DAC circuitry, and a VLOGIC
supply pin sets the logic levels for the digital interface pins.
The ACE software provides an intuitive graphic user interface
(GUI), allowing all of the AD5767 modes of operation to be
configured over the synchronous serial port (SPORT) interface.
The ACE software also has plugin modules for many other
Analog Devices evaluation boards and Circuits from the Lab®
(CFTL) demo boards.
Complete specifications for the AD5767 are available in the
AD5767 data sheet, which must be consulted in conjunction
with this user guide when using this evaluation board.
EVALUATION BOARD PHOTOGRAPH
Figure 1.
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TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Evaluation Board Photograph ......................................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supplies/Default Link Options ....................................... 3
On-Board Connectors ................................................................. 5
ADP5071 Switching Regulator ....................................................5
Evaluation Board Software ...............................................................7
ACE Software Installation ............................................................7
ACE Software Operation ..............................................................7
Evaluation Board Schematics and Artwork ................................ 11
Ordering Information .................................................................... 16
Bill of Materials ........................................................................... 16
REVISION HISTORY
1/2017—Revision 0: Initial Version
EVAL-AD5767SD2Z User Guide UG-1070
Rev. 0 | Page 3 of 17
EVALUATION BOARD HARDWARE
POWER SUPPLIES/DEFAULT LINK OPTIONS
Table 1. Quick Start Jumper Configurations for Both
ADP5071 and Bench Supply
Link No. ADP5071 Bench Supply
LK1 A A
LK2 A A
LK3 A A
LK4 B A
LK5 B A
LK7 A A
LK8 Inserted Removed
LK11 Removed Removed
LK12 Removed Removed
The EVAL-AD5767SD2Z evaluation board can be powered
using the on-board ADP5071, which is supplied with a 3.3 V
supply via the J12 connector. Alternatively, the J9 connector can
provide power to the board instead of the ADP5071 and is
intended for use with well regulated bench supplies. See Figure 2
for a functional block diagram.
With either option, first set the link options on the evaluation
board for the required operating setup before supplying the board.
Each supply is decoupled to the relevant ground plane with
10 μF and 0.1 μF capacitors. Each device supply pin is again
decoupled with a 10 μF and 0.1 μF capacitor pair to the relevant
ground plane.
The analog and digital planes are connected at one location
close to the DAC. To avoid ground loop problems, do not
connect AGND and DGND elsewhere in the system.
Figure 2. Powering the EVAL-AD5767 SDZ Evaluation Board
Table 2. Quick Start
Board Supply Compatible Output Voltage Ranges (V)
Power Supplies Required
AVSS (J9) Maximum (V) AVDD (J9) Minimum J12 Nominal (V)
ADP5071 −20 to 0 Not required Not required 3.3
−16 to 0 Not required Not required 3.3
−10 to 0 Not required Not required 3.3
−10 to +6 Not required Not required 3.3
−5 to +5 Not required Not required 3.3
Bench Supply −20 to 0 −22 2.97 3.3
−16 to +0 −18 2.97 3.3
−10 to +0 −12 2.97 3.3
−10 to +6 −12 8 3.3
−12 to +14 −14 16 3.3
−16 to +10 −18 12 3.3
−5 to +5 −7 7 3.3
−10 to +10 −12 12 3.3
AD5767
AV
CC
AV
SS
AV
DD
EXT_AV
DD
J9
J12 A
LK4
LK5
LK3 +3.3V
B
AGND
EXT_AV
SS
J13
+3.3V
PGND
V
LOGIC
DGND
J11
EXT_AV
CC
AGND
AB
A
B
LK2
V
LOGIC
A
B
+8V
–22V
ADP5071
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Power Solution Option (ADP5071)
The E VA L -AD5767SD2Z board is populated with an ADP5071
switching regulator. This regulator generates +8 V and −22 V
supplies from a single +3.3 V supply. The circuit was designed
using the Analog Devices ADIsimPower toolset, which selects
the components and generates the schematic and bill of
materials, and displays the performance specifications. Visit the
ADP5071 product page at www.analog.com/ADP5071 to
download the design tools.
The ADP5071 requires 3.3 V for correct operation. Following
the jumper configuration in Table 1, tie AVCC, VLOGIC, and the
ADP5071 supplies together to operate from a single 3.3 V
supply.
Alternatively, the AVCC header (J11) and VLOGIC header (J13) can
be powered with separate supplies by selecting Position B on
LK3 and LK2, respectively. Refer to Table 3 for full link options.
The −12 V to +14 V, −16 V to +10 V, or −10 V to +10 V output
voltage ranges are not available with the ADP5071 default
configuration because a minimum of 2 V headroom is required.
Refer to the Filtered 3.3 V Supply section for further information,
or supply the board using a bench supply.
Bench Power Supply Option
The evaluation board can be powered using a bench supply to
access all output voltage ranges of the AD5767. A headroom
and footroom of at least 2 V is required. Refer to Table 2 for the
supply requirements. It is important that the voltage across
AVDD to AVSS does not exceed the absolute maximum rating of
34 V. Otherwise, device reliability may be affected.
Following the jumper configuration in Table 2, tie AV CC and
VLOGIC together to operate from the same 3.3 V supply, or AVCC
(via J11) and VLOGIC (via J13) can be powered with separate
supplies by selecting Position B on LK3 and LK2, respectively.
Refer to Table 3 for full link options. Refer to Table 3 for full
link options.
Table 3. Link Options
Link No. Description
LK1 Selects the power supply for the ADR4525 reference; requires a minimum of 3 V for correct operation
Position A: supplied by the 3.3 V supply (J12)
Position B: supplied by the AV
CC
header (J11)
LK2 Selects the power supply for the DAC V
LOGIC
pin; requires 1.7 V to 5.5 V for correct operation
Position A: supplied by the 3.3 V supply (J12)
Position B: supplied by the V
LOGIC
header (J13)
LK3 Selects the power supply for the DAC AV
CC
pin; requires 2.97 V to 5.5 V for correct operation
Position A: supplied by the 3.3 V supply (J12)
Position B: supplied by the AV
CC
header (J11)
LK4 Selects the power supply for the DAC AV
DD
pin; ensure that the voltage between AV
DD
and AV
SS
does not exceed 34 V
Position A: supplied by the AV
DD
header (J9)
Position B: supplied by the ADP5071 power solution
LK5 Selects the power supply for DAC AV
SS
pin; ensure that the voltage between AV
DD
and AV
SS
does not exceed 34 V
Position A: supplied by AV
SS
header (J9)
Position B: supplied by the ADP5071 power solution
LK6 Selects the start-up sequence of the ADP5071 outputs
Position A: positive and negative output rails are sequenced based on the state of the EN1 and EN2 pins
Position B: positive and negative output rails power up simultaneously when EN2 is high
No link inserted: manual enable mode
LK7 Selects the voltage reference source
Position A: selects the ADR4525 2.5 V reference
Position B: selects an external reference source that can applied at the EXT_VREF SMB connector
LK8 Insert link to connect the ADP5071 to the 3.3 V supply header (J12)
LK9 Selects the switching frequency of ADP5071; this link is replaced with a 0 Ω resistor to Position A
Position A: 1.2 MHz switching frequency (default)
Position B: 2.4 MHz switching frequency
LK10 Selects the slew rate of the ADP5071 output; this link is replaced with a 0 Ω resistor to Position A
Position A: slowest slew rate (best noise performance)
Position B: normal slew rate
LK11 Insert link to bypass the LC filter on the ADP5071 positive output
LK12
Insert link to bypass the LC filter on the ADP5071 negative output
EVAL-AD5767SD2Z User Guide UG-1070
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PMOD Connector (J10) Pin Configuration and
Descriptions
Figure 3. Jumper J10 Pin Configuration
Table 4. Connector J10 Pin Descriptions
Pin No. Description
1 SYNC
2 SDIN/MOSI
3 SDO/MISO
4 SCLK
5
DGND
6 V
LOGIC
7 NC
1
8 RESET
9 NC1
10 NC1
11 DGND
12 V
LOGIC
1 NC means no connection.
ON-BOARD CONNECTORS
There are eight connectors on the E VA L -AD5767SD2Z, as
shown in Figure 3. For the external supply pins, refer to the
Power Supplies/Default Link Options section because AV CC and
VLOGIC can be powered using J12, depending on the jumper
configuration.
Table 5. On-Board Connectors
Connector Function
J1 Connection for the EVAL-SDP-CB1Z board
J2 Header pins for V
OUT
0 to V
OUT
7 and AGND
J3 Header pins for V
OUT
8 to V
OUT
15 and AGND
J9 Supplies AV
DD
and AV
SS
externally
J10 Peripheral module (PMOD) connection pins
J11 Supplies AV
CC
pin externally
J12 3.3 V supply for AV
CC
, V
LOGIC
, and the ADP5071
J13 Supplies V
LOGIC
pin externally
ADP5071 SWITCHING REGULATOR
Filtering the ADP5071 Outputs
The E VA L -AD5767SD2Z board has an LC filter fitted on the
ADP5071 positive and negative outputs. The filter can be
bypassed by inserting LK11 and LK12.
Figure 4 shows the output frequency spectrum of the AD5767
powered by the filtered ADP5071 supply. The dotted red line
represents 10% of 1 LSB using the −10 V to +6 V range. For
comparison, Figure 5 shows the output frequency spectrum of
the AD5767 powered by a bench power supply.
Figure 4. Output of AD5767 with ADP5071 (LC Filtered)
Figure 5. Output of AD5767 with Bench Power Supply
SIGNAL POWER (dBmV)
FRE Q UE NCY ( Hz )
1M 10M100k
–70
–60
–50
–40
–30
–20
–10
0
10
20
15163-005
V
OUT
x AT CHANNE L 1 = –10V
V
OUT
x AT CHANNE L 1 = +6V
SIGNAL POWER (dBmV)
FREQUENCY (Hz)
1M 10M100k
–100
–110
–120
–40
–50
–60
–70
–80
–90
V
OUT
x AT CHANNE L 1 = –10V
V
OUT
x AT CHANNE L 1 = +6V
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Filtered 3.3 V Supply
The EVAL-AD5767SD2Z board contains a filter on J11 to allow
users to filter the AD5767 AVCC rail. Alternatively, users can
bypass the filter by using J12. Powering the board via the J12
header allows users to evaluate the board performance with
their own supply. See Figure 6 for the functional block diagram.
When enabled with LK8, the ADP5071 can feed noise back
onto the 3.3 V rail. Users can attenuate this noise by connecting
J12 and J11 externally.
Changing the ADP5071 Output Voltages
By default, the ADP5071 output voltages are +8 V and −22 V.
To provide enough headroom to supply the −12 V to +14 V,
−16 V to +10 V, and −10 V to +10 V ranges, the feedback
resistors must be changed. These are R26 and R31 for the
positive output, and R28 and R30 for the negative output. Based
on the output supplies required and load current requirements,
the Analog Devices ADIsimPower toolset selects the recom-
mended feedback resistors for the application. ADIsimPower is
available on the ADP5071 product page at
www.analog.com/ADP5071.
It is important that the voltage across AVDD to AVSS does not
exceed the absolute maximum rating of 34 V. Otherwise, device
reliability may be affected.
Figure 6. AVCC Selection
AD5767
AVCC
J12
LK3
LK8
+3.3V
J11
EXT_AVCC
A
B
ADP5071
UNF I L TERE D + 3. 3 V
FILTERED +3.3V
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EVAL-AD5767SD2Z User Guide UG-1070
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EVALUATION BOARD SOFTWARE
ACE SOFTWARE INSTALLATION
The ACE software enables configuration of the AD5767 over a
USB port. This section introduces the key features of the program.
To download the ACE software and obtain detailed documenta-
tion on the platform, visit www.analog.com/ace. The installer
also includes the drivers for the SDP board and plugins for
multiple Analog Devices evaluation boards, including the
E VA L -AD5767SD2Z.
After the ACE software is installed, connect the evaluation
board and SDP controller board together and plug the USB
cable from the PC to the SDP controller board. Allow a few
moments for the Windows operating system to recognize the
SDP board.
ACE SOFTWARE OPERATION
To operate the ACE software, follow these steps:
1. To launch the ACE software, click Start > All Programs>
Analog Devices > ACE). The software opens in the Start
view tab and recognizes the EVAL -AD5767SD2Z (see
Figure 7).
2. Double click the AD5767 Board icon under Attached
Hardware to open the AD5767 Board tab (see Figure 8).
3. Double click the AD5767 chip shown in Figure 8 to open
the AD5767 tab (see Figure 9). This tab displays the block
diagram and allows the user to configure the DAC input
registers and control registers. The hardware registers on
the AD5767 are not altered until the Apply Changes
button is clicked.
4. Click the Proceed to Memory Map button (Label 12 in
Figure 11) to open the AD5767 Memory Map tab and
allow access to all registers (see Figure 10). The hardware
registers on the AD5767 are not altered until the Apply
Changes button is clicked.
For a detailed description of all GUI options, see Table 6 and
Figure 11.
Figure 7. Start Tab
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Figure 8. AD5767 Board Tab
Figure 9. AD5767 Chip Tab
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Figure 10. AD5767 Memory Map Tab
Figure 11. Main Window
15163-010
15163-011
12
11
10
8
7
4
3
56
9
2
1
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Figure 12. Span Selection Window
Table 6. GUI Options (See Figure 11)
Label No. GUI Element Description
1 Apply Changes This button must be clicked to submit any changes on the GUI to the evaluation board hardware.
2 Reset Chip Issues a hardware reset and reverts the software and hardware registers to their default settings.
3 Write to Input Register Allows the user to write to the input register, write to the input register and the DAC register, or
write to the input register and update all DAC registers.
4 Select output Channels displayed. Allows the user to show Channel 0 to Channel 3, Channel 4 to Channel 7,
Channel 8 to Channel 11, or Channel 12 to Channel 15 for V
OUT
in the AD5767 chip tab.
5 Input Register The user can input data to write to the input register. There is one input register per channel.
6 DAC Register This is a graphical representation of the DAC register. There is one DAC register per channel.
7 RANGE SET DAC Click RANGE SET DAC to select the output voltage range from the Span Selection window (see
Figure 12).
8 DAC x Click the DAC to apply a dither signal or to power down the selected channel.
9 Signal, Invert, and Scale Allows the user to select the dither options for each channel.
10 16-To-1 MUX Select which channel to route to the AD5767 MUX_OUT pin.
11 SOFTWARE RESET Issues a software reset and reverts the software and hardware registers to their default settings.
12 Proceed to Memory Map Click to open the AD5767 Memory Map tab (see Figure 10).
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EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 13. SDP Connector and Power Supply
Figure 14. ADP5071 Power Solution
External AVDD, AVSS supply
VSS
VDD
AGND
AGND
External AVCC Supply
VCC
AGND
+3.3V for single supply sol ution
3.3V
PGND
External 3.3V
External VLOGIC Supply
VLOGIC
DGND
DIGILENTPmodInterfaceType2A(expandedSPI)
PlaceL5andC1asclosetoJ11aspossible
L5 and C1 TBD (Footprints both 0805)
*NC on BLACKFIN SDP
*
*
*
*
*
*
*
*
*
*
*
*
*
TIMERS
INPUT/OUTPUT
GENERAL
I2C
SPI
SPORT
PORT
PARALLEL
SDP
STANDARD
CONNECTOR
120
NC
119
NC
118
GND
117
GND
116
VIO(+3.3V)
115
GND
114
PAR_D22
113
PAR_D20
112
PAR_D18
111
PAR_D16
110
PAR_D15
109
GND
108
PAR_D12
107
PAR_D10
106
PAR_D8
105
PAR_D6
104
GND
103
PAR_D4
102
PAR_D2
101
PAR_D0
100
PAR_WR
99
PAR_INT
98
GND
97
PAR_A2
96
PAR_A0
95
PAR_FS2
94
PAR_CLK
93
GND
92
SPORT_RSCLK
91
SPORT_DR0
90
SPORT_RFS
89
SPORT_TFS
88
SPORT_DT0
87
SPORT_TSCLK
86
GND
85
SPI_SEL_A
84
SPI_MOSI
83
SPI_MISO
82
SPI_CLK
81
GND
80
SDA_0
79
SCL_0
78
GPIO1
77
GPIO3
76
GPIO5
75
GND
74
GPIO7
73
TMR_B
72
TMR_D
71
CLK_OUT
70
NC
69
GND
68
NC
67
NC
66
NC
65
WAKE
64
SLEEP
63
GND
62
UART_TX
61
BMODE1
60 RESET_IN
59 UART_RX
58 GND
57 RESET_OUT
56 TWI_A0
55 NC
54 NC
53 NC
52 GND
51 NC
50 NC
49 TMR_C
48 TMR_A
47 GPIO6
46 GND
45 GPIO4
44 GPIO2
43 GPIO0
42 SCL_1
41 SDA_1
40 GND
39 SPI_SEL1/SPI_SS
38 SPI_SEL_C
37 SPI_SEL_B
36 GND
35 SPORT_INT
34 SPI_D3
33 SPI_D2
32 SPORT_DT1
31 SPORT_DR1
30 SPORT_TDV1
29 SPORT_TDV0
28 GND
27 PAR_FS1
26 PAR_FS3
25 PAR_A1
24 PAR_A3
23 GND
22 PAR_CS
21 PAR_RD
20 PAR_D1
19 PAR_D3
18 PAR_D5
17 GND
16 PAR_D7
15 PAR_D9
14 PAR_D11
13 PAR_D13
12 PAR_D14
11 GND
10 PAR_D17
9PAR_D19
8PAR_D21
7PAR_D23
6GND
5USB_VBUS
4GND
3GND
2NC
1VIN
J1
1A0
2A1
3A2
4VSS
8
VCC 7
WP 6
SCL 5
SDA
U4
24LC64-I/SN
R18
DNP
R25
100k
R24
100k
J9-1
J9-2
J9-3
1SS 2
MOSI
3MISO 4
SCK
5GND 6
VDD
7INT 8
RESET
9N/S 10
N/S
11 GND 12
VDD
J10
J11-1
J11-2
J12-1
J12-2
+C1
10uF
J13-1
J13-2
R4
100k
R8
100k
L5
2.2uH
SCLK
SYNC
RESET
DGNDDGND
SDO
SDI
+3.3V
+3.3V
EXT_AVDD
EXT_AVSS
SYNC SDI
SCLKSDO
RESET
EXT_AVCC
EXT_3.3V
DGND
EXT_VLOGIC
DGND
VLOGIC
+3.3V
PGND
15163-013
15163-014
Output Filters
Output Filters
C32 1uF
C33
12nF
C34
27nF
R32
13.7k
R34
11.8k
R28
3k57
D1
R31
9.09K
1
INBK
2SYNC
3SEQ
4SLEW
5
FB1
6COMP1
7EN1
8SS
9EN2
10 COMP2
11
FB2
12
VREF
13
AGND
14 VREG
15 PVIN1
16 PVINSYS
17 PVIN2
18
SW2
19
PGND
20
SW1
21
EP
U7
ADP5071ACPZ
C31
0.1uF
+C30
10uF
C28
10uF
C25
10uF
BA
LK10
BA
LK6
R26
82k5
R30
102K
R38
30.1k
V-
V+
C29
1uF
R37
19.6k
L4
1.5 µH
L3
4.7 µH C26
10uF
C4
33pF
C14
27pF
R23
14.7Ohm
C17
10uF
C19
10uF
C18
10uF
R14
255K
D2
L1
2.2uH
L2
2.2uH
BA
LK9
LK8 LK11
LK12
VREG
VREG
INT_AVDD
INT_AVSS
PGND
PGND
E
XT_3.3V
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Figure 15. AD5767 (WLCSP) and External Reference
C13 0.1uF
+
C12 10uF
C24 0.1uF
N1_INN0_IN
C27 0.1uF
+
C36 10uF
A B
LK4
C5 0.1uF
+
C6 10uF
A B
LK5
C9 0.1uF
+
C10 10uF
A B
LK3
EXT_VREF
2
+VIN
6VOUT
4
GND
U6
ADR4525BRZ
A
B
LK7
C68
1uF
C69
0.1uF
+C70
10uF
VREF
VLOGIC
AVCC AVDD AVSS
A B
LK2
C22 0.1uF
C23 0.1uF
AB
LK1
A1 DNC
A2
VOUT1 A3
VOUT2 A4
VOUT4 A5
VOUT5 A6
VOUT6
A7 DNC
B1
AVCC
B2AGND1
B3
VOUT0
B4
VOUT3
B5
VOUT7
B6 DGN D
B7 RESET
C1
MUX_OUT
C2
NICC3
NIC C4
NIC
C5 DNC
C6 VLOGIC
C7 SDI
D1
AVDD
D2
NIC D3
NICD4
NICD5
NICD6
NIC
D7
AVSS
E1N1
E2 NIC
E3 NIC
E4 NIC
E5 NIC
E6 SDO
E7 SCLK
F1 N0 F2
VREF
F3
VOUT15
F4
VOUT12
F5
VOUT8
F6 AGND2
F7 SYNC
G1 DNC
G2
VOUT14
G3
VOUT13
G4
VOUT11
G5
VOUT10
G6
VOUT9
G7 DNC
U1
AD5767BCBZ
N0 N1
DGND
EXT_AVDD
INT_AVDD
EXT_AVSS
INT_AVSS
EXT_AVCC
EXT_AVCC
EXT_3.3V
MUX _OUT
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
SYNC
SCLK
SD I
SDO
RESET
EXT_3.3V
EXT_VLOGIC
EXT_3.3V
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EVAL-AD5767SD2Z User Guide UG-1070
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Figure 16. Channel Outputs
Figure 17. Top Printed Circuit Board (PCB) Layer
15163-016
MUX MUX_OUT
DNP
R44
DNP
C51
DNP
VOUT0
DNP
R45
DNP
C15
DNP
VOUT1
DNP
R6
DNP
C37
DNP
VOUT2
DNP
R9
DNP
C38
DNP
VOUT3
DNP
R11
DNP
C39
DNP
VOUT4
DNP
R13
DNP
C40
DNP
VOUT5
DNP
R15
DNP
C45
DNP
VOUT6
DNP
R16
DNP
C46
DNP
VOUT7
DNP
R17
DNP
C47
DNP
VOUT8
DNP
R19
DNP
C48
DNP
VOUT9
DNP
R20
DNP
C52
DNP
VOUT10
DNP
R21
DNP
C53
DNP
VOUT11
DNP
R22
DNP
C54
DNP
VOUT12
DNP
R33
DNP
C55
DNP
VOUT13
DNP
R35
DNP
C56
DNP
VOUT14
DNP
R36
DNP
C57
DNP
VOUT15
DNP
R41
DNP
C58
DNP
R42
0r
R43
0r
R46
0r
R47
0r
R48
0r
R49
0r
R50
0r
R51
0r
R52
0r
R53
0r
R54
0r
R55
0r
R56
0r
R57
0r
R58
0r
R59
0r
R60
0r
J2-1
J2-2
J2-3
J2-4
J2-5
J2-6
J2-7
J2-8
J2-9
J2-10
J2-11
J2-12
J2-13
J2-14
J2-15
J2-16
J3-1
J3-2
J3-3
J3-4
J3-5
J3-6
J3-7
J3-8
J3-9
J3-10
J3-11
J3-12
J3-13
J3-14
J3-15
J3-16
MUX_OUT
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
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UG-1070 EVAL-AD5767SD2Z User Guide
Rev. 0 | Page 14 of 17
Figure 18. Inner First PCB Layer
Figure 19. Inner Second PCB Layer
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EVAL-AD5767SD2Z User Guide UG-1070
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Figure 20. Bottom PCB Layer
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UG-1070 EVAL-AD5767SD2Z User Guide
Rev. 0 | Page 16 of 17
ORDERING INFORMATION
BILL OF MATERIALS
Table 7.
Reference
Designator Description Part Number Stock Code
C1 Capacitor, 0805, X5R, 10 V, 10 µF, ±10% GRM219R61A106KE44D FEC 2346905
C4 Capacitor, 1210, C0G, 50 V, 33 pF, ±10% MC0402N330K500CT FEC 1845741
C5 C9, C13, C22, C23,
C24, C27, C31, C69
Capacitor, 0603, C0G, 50 V, 0.1 µF, ±10% GRM188R71H104KA93D FEC 8820023
C6, C10, C12, C30,
C36, C70,
Capacitor, 0805, C0G, 50 V, 0.1 µF, ±10% GRM21BR71A106KE51L FEC 1828828
C14 Capacitor, 0402, C0G, 50 V, 27 pF, ±10% C0402C270K5GACTU Digi-Key 399-8960-1-ND
C17, C18 Capacitor, 1206, X5R, 10 V, 10 µF, ±10% C3216X5R1A106K160AB FEC 1844306
C19, C26 Capacitor, 1206, X5R, 35 V, 10 µF, ±10% GRM31CR6YA106KA12L FEC 1797011
C25, C28 Capacitor, 0805, X5R, 10 V, 10 µF, ±10% GRM21BR61A106KE19L FEC 1828805
C29, C32 Capacitor, 0603, X5R, 6.3 V, 1 µF, ±10% GRM188R60J105KA01D FEC 9527699
C33 Capacitor, 0402, X7R, 16 V, 0.012 µF, ±10% MC0402B123K160CT FEC 1758886
C34 Capacitor, 0402, X5R, 16 V, 0.027 µF, ±10% MC0402X273K160CT FEC 1759382
C68 Capacitor, 0805, X7R, 50 V, 1 µF, ±10% GRM21BR71H105KA12L FEC 1735541
D1 Rectifier diode, single, 20 V, 500 mA, SOD-123, 2, 385 mV MBR0520L FEC 1467521
D2 Schottky diode PD3S160-7 FEC 1843697
J1 120-way connector, 0.6 mm pitch FX8-120S-SV(21) FEC 1324660
J2, J3 16-pin (2× 8), 0.1 inch pitch, single inline (SIL) header M20-9980846 FEC 1022240
J9 3-pin terminal block (5 mm pitch) CTB5000/3 FEC 151790
J10 PMOD connector 68021-212HLF Digi-Key 609-3345-ND
J11, J12, J13 2-pin terminal block (5 mm pitch) CTB5000/2 FEC 151789
L1, L2 Fixed inductor, 2.2 µH, 1.6 A, 76 MΩ SMD LQH32PN2R2NN0L Digi-Key 490-5336-2-ND
L3 Surface-mount power inductor XFL4020-472MEC FEC 2289218
L4
Fixed inductor 1.5 µH, 4.1 A, 46.8 MΩ
SPM4020T-1R5M
Digi-Key 445-172371-1-ND
L5 2.2 µH shielded multilayer inductor AIML-0805-2R2K-T Digi-Key 535-11631-2-ND
LK1 to LK5, LK7 3-pin SIL header and shorting link M20-9990345 & M7567-
05
FEC 1022248 and
FEC 150410
LK6, LK9, LK10 2-way resistor link option MC 0.063W 0603 0R FEC 9331662
LK8, LK11, LK12 2-pin (0.1 inch pitch) header and shorting shunt M20-9990246 FEC 1022247 and
FEC 150-411
R4, R8, R24, R25 Resistor, 100 kΩ, 0.063 W, 1%, 0603 MC0063W06031100K FEC 9330402
R14 Surface-mount chip resistor, ceramic, MCMR series,
255 kΩ, 62.5 mW, ±1%, 50 V
MCMR04X2553FTL FEC 2072839
R23 Surface-mount chip resistor, thick film, AEC-Q200 CRCW
series, 14.7 Ω, 63 mW, ±1%, 50 V
CRCW040214R7FKED FEC 2140591
R26 Resistor, 82.5 kΩ, 0.0625 W, 1%, 0402 MC00625W0402182K5 FEC 1803742
R28 Resistor, 3.57 kΩ, 0.0625 W, 1%, 0402 MC00625W040213K57 FEC 1803091
R30 Resistor, 102 kΩ, 0.0625 W, 1%, 0402 MC00625W04021102K FEC 1803752
R31 Resistor, 9.09 kΩ, 0.0625 W, 1%, 0402 MC00625W040219K09 FEC 1803134
R32 Resistor, 13.7 kΩ, 0.0625 W, 1%, 50 V, 0402 MCMR04X1372FTL FEC 2072621
R34 Resistor, 11.8 kΩ, 0.063 W, 1%, 50 V, 0402 CRCW040211K8FKED FEC 2140865
R37 Resistor, 19.6 kΩ, 0.0625 W, 1%, 50 V, 0402 MC00625W0402119K6 FEC 1803680
R38 Resistor, 30.1 kΩ, 0.063 W, 1%, 50 V, 0402 CRCW040230K1FKED FEC 1469704
R42, R43, R46 to R60 Resistor, 0402, 1%, 0 Ω MC00625W040210R FEC 1357983
U1 16-channel, 12-bit voltage output denseDAC AD5767 AD5767BCBZ-WP
U4 64 kb I2C serial EEPROM 24LC64-I/SN FEC 9758070
U6 2.5 V voltage reference ADR4525BRZ ADR4525BRZ
U7 2 A/1.2 A dc to dc switching regulator with independent
positive and negative outputs
ADP5071ACPZ ADP5071ACPZ
EVAL-AD5767SD2Z User Guide UG-1070
Rev. 0 | Page 17 of 17
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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UG15163-0-1/17(0)