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Rev. E1
11/1/2016
IS62WV5128ALL
IS62WV5128BLL
®Long-term Support
World Class Quality
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speedaccesstime:55ns,70ns
• CMOSlowpoweroperation
36 mW (typical) operating
9µW(typical)CMOSstandby
• TTLcompatibleinterfacelevels
• Singlepowersupply
1.65V–2.2VVdd (IS62WV5128ALL)
2.5V–3.6VVdd (IS62WV5128BLL)
• Fullystaticoperation:noclockorrefresh
required
• Threestateoutputs
• Industrialtemperatureavailable
• Lead-freeavailable
DESCRIPTION
TheISSIIS62WV5128ALL/IS62WV5128BLLarehigh-
speed,4MbitstaticRAMsorganizedas512Kwordsby
8 bits. It is fabricated using ISSI's high-performance
CMOStechnology.Thishighlyreliableprocess coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) the device assumes
a standby mode at which the power dissipation can be
reduceddownwithCMOSinputlevels.
Easy memory expansion is provided by using Chip Enable
andOutputEnableinputs.TheactiveLOWWriteEnable
(WE) controls both writing and reading of the memory.
TheIS62WV5128ALLandIS62WV5128BLLarepackaged
in the JEDEC standard 32-pinTSOP (TYPE I), 32-pin
sTSOP(TYPEI),32-pinTSOP(TypeII),32-pinSOPand
36-pinminiBGA.
FUNCTIONAL BLOCK DIAGRAM
NOVEMBER 2016
A0-A18
CS1
OE
WE
512K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
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PIN DESCRIPTIONS
A0-A18 AddressInputs
CS1 Chip Enable 1 Input
OE OutputEnableInput
WE Write Enable Input
I/O0-I/O7Input/Output
NC No Connection
Vdd Power
GND Ground
1 2 3 4 5 6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
VDD
I/O6
I/O7
A9
A1
A2
OE
A10
NC
WE
NC
A18
CS1
A11
A3
A4
A5
A17
A16
A12
A6
A7
A15
A13
A8
I/O0
I/O1
VDD
GND
I/O2
I/O3
A14
36-pin mini BGA (B) (6mm x 8mm)
(Package Code B)
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32-pinTSOP(TYPEI),(PackageCodeT)
32-pinsTSOP(TYPEI)(PackageCodeH)
32-pinSOP(PackageCodeQ)
32-pinTSOP(TYPEII)(PackageCodeT2)
PIN DESCRIPTIONS
A0-A18 AddressInputs
CS1 Chip Enable 1 Input
OE OutputEnableInput
WE Write Enable Input
I/O0-I/O7Input/Output
Vdd Power
GND Ground
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
A18
A15
V
DD
A17
A16
A14
A12
A7
A6
A5
A4
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
A15
A18
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
V
DD
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DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter TestConditions Vdd Min. Max. Unit
Voh OutputHIGHVoltage Ioh = -0.1mA 1.65-2.2V 1.4 — V
Ioh = -1mA 2.5-3.6V 2.2 — V
VoL OutputLOWVoltage IoL = 0.1mA 1.65-2.2V — 0.2 V
IoL = 2.1mA 2.5-3.6V — 0.4 V
VIh InputHIGHVoltage 1.65-2.2V 1.4 Vdd + 0.2 V
2.5-3.6V 2.2 Vdd + 0.3 V
VIL(1) InputLOWVoltage 1.65-2.2V –0.2 0.4 V
2.5-3.6V –0.2 0.6 V
ILI InputLeakage GND VIn Vdd –1 1 µA
ILo OutputLeakage GND Vout Vdd, OutputsDisabled –1 1 µA
Notes:
1. VIL (min.) = –1.0V for pulse width less than 10 ns.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter Value Unit
Vterm TerminalVoltagewithRespecttoGND –0.2toVdd+0.3 V
Vdd VddRelatedtoGND –0.2toVdd+0.3 V
tStg StorageTemperature –65to+150 °C
Pt PowerDissipation 1.0 W
Note:
1.StressgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisa
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
OPERATING RANGE (Vdd)
Range AmbientTemperature IS62WV5128ALL IS62WV5128BLL
Commercial 0°Cto+70°C 1.65V-2.2V 2.5V-3.6V
Industrial –40°Cto+85°C 1.65V-2.2V 2.5V-3.6V
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AC TEST LOADS
Figure1 Figure2
CAPACITANCE(1)
Symbol Parameter Conditions Max. Unit
CIn Input Capacitance VIn = 0V 8 pF
Cout Input/OutputCapacitance Vout = 0V 10 pF
Note:
1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters.
AC TEST CONDITIONS
Parameter IS62WV5128ALL IS62WV5128BLL
(Unit) (Unit)
InputPulseLevel 0.4VtoVdd-0.2V 0.4VtoVdd-0.3V
InputRiseandFallTimes 5ns 5ns
InputandOutputTiming Vref Vref
andReferenceLevel
OutputLoad SeeFigures1and2 SeeFigures1and2
IS62WV5128ALL IS62WV5128BLL
1.65-2.2V 2.5V-3.6V
r1() 3070 3070
R2() 3150 3150
Vref 0.9V 1.5V
Vtm 1.8V 2.8V
R1
30 pF
Including
jig and
scope
R2
OUTPUT
VTM
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
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POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
62WV5128ALL (1.65V - 2.2V)
Symbol Parameter TestConditions Max. Unit
70ns
ICC VddDynamicOperating Vdd = Max., Com. 25 mA
Supply Current Iout = 0 mA, f = fmAx Ind. 30
ICC1 OperatingSupply Vdd = Max.,CS1=0.2VCom. 10 mA
Current We = Vdd-0.2V Ind. 10
f=1mhz
ISB1 TTLStandbyCurrent Vdd = Max., Com. 0.35 mA
(TTLInputs) VIn = VIh or VIL Ind. 0.35
CS1 = VIh,
f=1MHz
ISB2 CMOSStandby Vdd = Max., Com. 15 µA
Current(CMOSInputs) CS1
Vdd – 0.2V, Ind. 15
VIn
Vdd – 0.2V, or
VIn
0.2V, f = 0
Note:
1. At f = fmAx, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
62WV5128BLL (2.5V - 3.6V)
Symbol Parameter TestConditions Max. Unit
55ns
ICC Vdd DynamicOperating Vdd = Max., Com. 40 mA
Supply Current Iout = 0 mA, f = fmAx Ind. 45
ICC1 OperatingSupply Vdd = Max.,CS1=0.2V Com. 15 mA
Current We = Vdd-0.2V Ind. 15
f=1mhz
ISB1 TTLStandbyCurrent Vdd = Max., Com. 0.35 mA
(TTLInputs) VIn = VIh or VIL Ind. 0.35
CS1 = VIh,
f=1MHz
ISB2 CMOSStandby Vdd = Max., Com. 15 µA
Current(CMOSInputs) CS1 Vdd – 0.2V, Ind. 15
VIn Vdd – 0.2V, or
VIn 0.2V, f = 0
Note:
1. At f = fmAx, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
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AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, WE = VIh)
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
DOUT
ADDRESS
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
55ns
70ns
Symbol Parameter Min. Max. Min. Max. Unit
trC ReadCycleTime 55 — 70 — ns
tAA AddressAccessTime — 55 — 70 ns
tohA OutputHoldTime 10 — 10 — ns
tACS1 CS1AccessTime — 55 — 70 ns
tdoe OEAccessTime — 25 — 35 ns
thzoe(2) OEtoHigh-ZOutput — 20 — 25 ns
tLzoe(2) OEtoLow-ZOutput 5 — 5 — ns
thzCS1 CS1toHigh-ZOutput 0 20 0 25 ns
tLzCS1 CS1toLow-ZOutput 10 — 10 — ns
Notes:
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof0.9V/1.5V,inputpulselevelsof0.4to
Vdd-0.2V/Vdd-0.3VandoutputloadingspeciedinFigure1.
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
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AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CS1, OE Controlled)
Notes:
1. WEisHIGHforaReadCycle.
2. Thedeviceiscontinuouslyselected.OE,CS1=VIL. We=VIh.
3. AddressisvalidpriortoorcoincidentwithCS1LOWtransition.
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACS1
t
LZCS1
t
HZOE
HIGH-Z DATA VALID
t
HZCS
ADDRESS
OE
CS1
DOUT
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WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
55ns
70ns
Symbol Parameter   Min. Max. Min. Max. Unit
tWC WriteCycleTime  55 — 70 — ns
tSCS1 CS1toWriteEnd 45 — 60 — ns
tAW AddressSetupTimetoWriteEnd  45 — 60 — ns
thA AddressHoldfromWriteEnd  0 — 0 — ns
tSA AddressSetupTime 0 — 0 — ns
tPWe WEPulseWidth  40 — 50 — ns
tSd DataSetuptoWriteEnd  25 — 30 — ns
thd DataHoldfromWriteEnd  0 — 0 — ns
thzWe(3) WELOWtoHigh-ZOutput  — 20 — 20 ns
tLzWe(3) WEHIGHtoLow-ZOutput   5 — 5 — ns
Notes:
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof0.9V/1.5V,inputpulselevelsof0.4Vto
Vdd-0.2V/Vdd-0.3VandoutputloadingspeciedinFigure1.
2.
TheinternalwritetimeisdenedbytheoverlapofCS1LOWandWELOW.AllsignalsmustbeinvalidstatestoinitiateaWrite,butanyonecangoinactiveto
terminatetheWrite.TheDataInputSetupandHoldtimingarereferencedtotherisingorfallingedgeofthesignalthatterminatesthewrite.
3. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CS1 Controlled, OE = HIGH or LOW)
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WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCS1
t
AW
t
HA
t
PWE
t
HZWE
HIGH-Z
t
LZWE
t
SA
t
SD
t
HD
ADDRESS
OE
CS1
WE
DOUT
DIN
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCS1
t
AW
t
HA
tPWE
tHZWE
HIGH-Z
tLZWE
tSA
tSD tHD
ADDRESS
OE
CS1
WE
DOUT
DIN
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DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter TestCondition Min. Max. Unit
VdrVddforDataRetention SeeDataRetentionWaveform 1.2 3.6 V
Idr DataRetentionCurrent Vdd=1.2V,CS1Vdd –0.2V — 15 µA
tSdr DataRetentionSetupTime SeeDataRetentionWaveform 0 — ns
trdr RecoveryTime SeeDataRetentionWaveform trC — ns
DATA RETENTION WAVEFORM (CS1 Controlled)
V
DD
CS1 V
DD
- 0.2V
tSDR tRDR
VDR
CS1
GND
Data Retention Mode
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ORDERING INFORMATION
IS62WV5128ALL(1.65V-2.2V)
IndustrialRange:–40°Cto+85°C
Speed(ns) OrderPartNo. Package
70 IS62WV5128ALL-70BI miniBGA(6mmx8mm)
ORDERING INFORMATION
IS62WV5128BLL(2.5V-3.6V)
IndustrialRange:–40°Cto+85°C
Speed(ns) OrderPartNo. Package
55 IS62WV5128BLL-55TLI TSOP,TYPEI,Lead-free
55 IS62WV5128BLL-55QLI SOP,Lead-free
55 IS62WV5128BLL-55T2LI TSOP,TYPEII,Lead-free
55 IS62WV5128BLL-55HLI sTSOP,TYPEI,Lead-free
55 IS62WV5128BLL-55BI miniBGA(6mmx8mm)
55 IS62WV5128BLL-55BLI miniBGA(6mmx8mm),Lead-free
Integrated Silicon Solution, Inc. — www.issi.com 13
Rev. E1
11/1/16
IS62WV5128ALL, IS62WV5128BLL
®Long-term Support
World Class Quality
14 Integrated Silicon Solution, Inc. — www.issi.com
Rev. E1
11/1/16
IS62WV5128ALL, IS62WV5128BLL
®Long-term Support
World Class Quality
Integrated Silicon Solution, Inc. — www.issi.com 15
Rev. E1
11/1/16
IS62WV5128ALL, IS62WV5128BLL
®Long-term Support
World Class Quality
16 Integrated Silicon Solution, Inc. — www.issi.com
Rev. E1
11/1/16
IS62WV5128ALL, IS62WV5128BLL
®Long-term Support
World Class Quality
Integrated Silicon Solution, Inc. — www.issi.com 17
Rev. E1
11/1/16
IS62WV5128ALL, IS62WV5128BLL
®Long-term Support
World Class Quality
NOTE :
1. CONTROLLING DIMENSION : MM .
2. Reference document : JEDEC MO-207
08/12/2008
Package Outline