August 1989 ee FAIRCHILD Revised November 1999 pssarearepronpaanpeanescermstsenssnsaneced SEMICONDUCTOR 100304 Low Power Quint AND/NAND Gate General Description Features The 100304 is monolithic quint AND/NAND gate. The @ Low Power Operation Function output is the wire-NOR of all five AND gate out- @ 2000V ESD protection puts. All inputs have 50 kQ pull-down resistors. ll Pin/function compatible with 100104 lf Voltage compensated operating range = 4.2V to -5.7V Bf Available to industrial grade temperature range (PLCC package only) Ordering Code: Order Number | Package Number Package Description 100304PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.400 Wide 100304QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100304Ql V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (-40C to +85C) Devices also available in Tape and Reel. Specify by appending the suffix letter Xx to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP YY b o-41 24E-Dog Des 04-42 23;Di, oy-3 22EDig Dib Oy-44 21 Dog D: 2b Fos 20F-Do, Dic Vec] 6 19}-D,, Dee Yoca | 7 180Veg Dia 0.48 17-05, Dea o.-49 16Dy, Die On 10 15 Dog Doe O41 14-Dj, Og-412 13-0, Pin Descriptions 28-Pin PLCC Pin Names Description Dog Og %VeEs On Op 0, OWeBee eG DnaPne Data Inputs 7 Function Output ae Data Outputs Oo Oo Oe Complementary Data Outputs Logic Equation So CCR F=(Dya* Dea) + (Dp * Dap) + De * Dac) + (Dra * Daa) + Dre * Dee). Dj 4D qDzeVEEs% Oe Oy 1999 Fairchild Semiconductor Corporation DS010581 www.fairchildsemi.com 3365 GNVN/GNV WIND J9MOd MOT POEO0!L100304 Absolute Maximum Ratingsinote 1) Recommended Operating Storage Temperature (Tst@) 65C to +150C Conditions Maximum Junction Temperature (Ty) +150C Vee Pin Potential to Ground Pin -7.0V to +0.5V Case Temperature (Tc) Input Voltage (DC) Veg to +0.5V Commercial 0C to +85C Output Current (DC Output HIGH) 50 mA Industrial 40C to +85C ESD (Note 2) 22000V Supply Voltage (Vee) -5.7V to -4.2V Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (note 3) Vee =-4.2V to-5.7V, Veco = Veca =GND, Te = 0C to +85C Symbol Parameter Min Typ Max Units Conditions Vou Output HIGH Voltage 1025 955 870 mV Vin =ViH (Max) Loading with Voi Output LOW Voltage 1830 1705 1620 mv or VIL (Min) 50. to -2.0V Vouc Output HIGH Voltage 1035 mv Vin = Vin(Min) Loading with Voie Output LOW Voltage 1610 mV or ViL (Max) 502 to -2.0V Vin Input HIGH Voltage 1165 870 mv Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage 1830 1475 mv Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 HA Vin = Vib min) lin Input High Current Doa-Doe 250 BA Vin = Vin(Max) Dia Die 350 lee Power Supply Current -69 43 30 mA Inputs open Note 3: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho- sen to guarantee operation under worst case conditions. DIP AC Electrical Characteristics Ver = 4.2V to -5.7V, Voo = Voca = GND Te =0C Te =+25C Te = +85C Symbol Parameter Units Conditions Min Max Min Max Min Max t Propagation Dela PH pag _ 0.40 175 | 0.40 1.65 | 0.40 1.75 ns tPHL Dna-Dne to O, O t Propagation Dela PLH Pag 1.00 2.60 1.00 2.60 1.15 3.20 ns _| Figure 1, Figure 2 tPHL Data to F ttLy Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns trHe 20% to 80%, 80% to 20% www. fairchildsemi.com 2Commercial Version (continued) PLCC AC Electrical Characteristics Veg =4.2V to-5.7V, Voc = Veca = GND Tce =0C Te = +25C Te = +85C Symbol Parameter Units Conditions Min Max Min Max Min Max t Propagation Delay PH pag 040 155 | 040 145 | 040 1.55 ns tPHL Dna-Dne to O, O tPLH Propagation Delay . . 1.00 2.40 1.00 2.40 1.15 3.00 ns Figure 1, Figure 2 tPHL Data to F ttLy Transition Time 0.35 1.10 0.35 1.15 0.35 1.10 ns tTHL 20% to 80%, 80% to 20% Industrial Version PLCC DC Electrical Characteristics (Note 4) Vee =-4.2V to -5.7V, Voc = Voca = GND, Tgp =-40C to +85C Te =-40C Te = 0C to +85C Symbol Parameter Units Conditions Min Max Min Max Vou Output HIGH Voltage 1085 -870 1025 -870 Vv Vin =VIH (Max) Loading with m VoL Output LOW Voltage 1830 1575 1830 1620 or ViL (Min) 502. to -2.0V Vouc Output HIGH Voltage 1095 1035 Vv Vin = VIH(Min) Loading with m Vote Output LOW Voltage 1565 1610 or VIL (Max) 502 to 2.0V Vin Input HIGH Voltage 1170 -870 1165 -870 mv Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage 1830 1480 1830 1475 mv Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 0.50 Vin = VIL (Min) liq Input HIGH Current Doa-Doe 250 250 Vin = Vin (Max) Dia Die 350 350 lee Power Supply Current -69 -30 -69 -30 mA Inputs OPEN Note 4: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho- sen to guarantee operation under worst case conditions. PLCC AC Electrical Characteristics Veg =4.2V to-5.7V, Voc = Veca = GND Symbol Parameter Tor aore Tom 128' Tom 188'0 Units Conditions Min Max Min Max Min Max t Propagation Delay PH pag 0.35 155 | 0.40 145 | 0.40 1.55 ns tPHL Dna-Dne to O, O t Propagation Dela: PLH Pag 1.00 2.40 1.00 2.40 1.15 3.00 ns _| Figure 1, Figure 2 tPHL Data to F ttLy Transition Time 0.35 1.10 0.35 1.15 0.35 1.10 ns trHe 20% to 80%, 80% to 20% www. fairchildsemi.com vOeool100304 Test Circuitry Notes: Veo: Veca = +2V, Veg = -2.5V 4 a SCOPE V \ 7 CHAN A CC 0.1 nF 5 LF gm, L2 PULSE ix ONDER c\ SCOPE GENERATOR[T \ , TEST vd CHAN B t L $n, Vee Fo nF o> L1 and L2 = equal length 509 impedance lines Ry = 509 terminator internal to scope Decoupling 0.1 LF from GND to Veg and Ver All unused outputs are loaded with 502 to GND C, = Fixture and stray capacitance < 3 pF FIGURE 1. AC Test Circuit Switching Waveforms (INPUT 0.7+0.1 ns] [< Pore ns + 1.05 V +0.31V on > 'PLH TRUE 50% OUTPUT tPLH - tpHL 80% 50% COMPLEMENT 20% tTLH _| Ltr FIGURE 2. Propagation Delay and Transition Times www. fairchildsemi.comPhysical DimensiON inches (millimeters) unless otherwise noted 1.194-1.214 [30.33-30.84] 0.202 24 [5.13] 13 OPI OILPI PI oi ri oi Pd Pa gp 0:035-0.045 f [0.89-1.14] ND 0.337-0.347 [8.56-8.81] u LICILCICI LILI CU LI uu 1 12 PIN NO. 1 IDENT 0.125 13.18] 0.125-0.135 5 0.060 0.039 3.18-3.43 TYP 4x 0.590-0.410 [ ] [1.52.00 | [0.99] "| 0.065 [9.91-10.41] [1.65] ty 0.145-0.200 | 30-1000 [3.68-5.08] | 86-94 0.380 0.020 jy |__ 0.125-0.140 1p too [al t p88 wn [0.51] [3.18-3.56] | | ee sau 0.050 >| Tt19-1.45] TYP 0.428 ots TYP 19-1, [1.27] [10.87 #122] 0.015-0.021 0.090-0.110 0.009-0.015 -0.38] 1015-0, ; : [o.38-0.53] |? [2.29-2.79] TYP [0.23-0.38] 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.400 Wide Package Number N24E N24e (REV A) www. fairchildsemi.com vOeool100304 Low Power Quint AND/NAND Gate Physical DimensiON inches (millimeters) unless otherwise noted (Continued) +0.006 -0.000 o 40.15 [11.43] S038 PIN #1 IDENT 1 0.450 26 0.49040.005 [12.450.13] TYP 0.02940.003 [0.740.08] 25 0.165-0.180 [4.19-4.57] nT q 0.045 45 X [1.14] 0.01740.004 f [0.4340.10] y F 0.41040.020 typ [10.4140.51] SEATING PLANE a |. 0.020 [0.51] 9.10520.015 yp [2.6740.38] MIN TYP TYP | 0.004 [0.10] V2BA (REV K} 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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